Ex Parte Kameyama et al

Patent Trial and Appeal Board

Feb 6, 2015

12346667 (P.T.A.B. Feb. 6, 2015)

UNITED STATES PATENT AND TRADEMARK OFFICE
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BEFORE THE PATENT TRIAL AND APPEAL BOARD
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Ex parte KOJIRO KAMEYAMA, AKIRA SUZUKI,
YOSHIO OKAYAMA, and MITSUO UMEMOTO

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Appeal 2013-000347
Application 12/346,667
Technology Center 2800
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Before BRADLEY R. GARRIS, TERRY J. OWENS, and
RICHARD M. LEBOVITZ, Administrative Patent Judges.

DECISION ON APPEAL
This appeal involves claims to methods of manufacturing a
semiconductor device. The Examiner has rejected the claims as obvious
under 35 U.S.C. § 103. We have jurisdiction under 35 U.S.C. § 6(b). The
Examiner’s rejections are reversed.

STATEMENT OF THE CASE
Appellants appeal the Examiner’s final rejection of claims 1–11. The
claims stand rejected by the Examiner as follows:
Appeal 2013-000347
Application 12/346,667

2
Claims 1–6 and 8–11 under 35 U.S.C. § 103(a) (pre-AIA) as obvious
in view of Noma1 and Ahn.2 Answer 5.
Claim 7 under 35 U.S.C. § 103(a) (pre-AIA) as obvious in view of
Noma, Ahn, and Applicants’ Prior art. Id. at 11.
Claim 1 is the only independent claim on appeal. Claim 1 reads as
follows:
1. A method of manufacturing a semiconductor device,
comprising:
providing a device intermediate comprising a
semiconductor substrate, a first insulation layer disposed on a
front surface of the semiconductor substrate and a pad electrode
disposed on the first insulation layer;
forming a first opening in the semiconductor substrate
from a back surface thereof so that the first insulation layer is
exposed at a bottom of the first opening and that the first
opening has a maximum lateral size thereof in a position closer
to the front surface than to the back surface;
removing the exposed first insulation layer to form a
second opening so that the pad electrode is exposed at a bottom
of the second opening and that a lateral size of the second
opening increases from the pad electrode toward the first
opening, the first opening and the second opening forming a via
hole penetrating the semiconductor substrate and the first
insulation layer; and
cutting the device intermediate so as not to cut through
the via hole and so as to produce a semiconductor device
having the via hole therein.

1 Noma et al., US 2003/0230805 A1, published Dec. 18, 2003, (hereinafter
“Noma”).
2 Ahn, US 2004/0140563 A1, published July 22, 2004.
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Application 12/346,667

3
REJECTIONS
Issue
Claim 1 is directed to a method of manufacturing a semiconductor
device. The steps include “forming a first opening in the semiconductor
substrate from a back surface thereof so that the first insulation layer is
exposed at a bottom of the first opening” and “removing the exposed first
insulation layer to form a second opening so that the pad electrode is
exposed at a bottom of the second opening.” The first and second openings
form “a via hole penetrating the semiconductor substrate and the first
insulation layer.”
The Examiner found that these two steps are met by Noma. Answer
5. Figures 4 and 5 of Noma show the steps of forming an opening in the
semiconductor substrate and exposing the pad electrode to form a via hole.
Following performance of these steps, claim 1 recites a step of
“cutting the device intermediate so as not to cut through the via hole and so
as to produce a semiconductor device having the via hole therein.” The
Examiner found this step to have been met by Noma’s disclosure of etching
a photoresist layer 11 deposited on the insulation layer 16a, both which were
added on semiconductor die 2. Answer 13. As explained in paragraphs 66
and 67 of Noma:
[0066] Then, the insulation film 16a is formed to cover the
etched side surface of the semiconductor die 2 and the exposed
portion of the first wiring 5a, as shown in FIG. 6. . . .

[0067] Next, a photoresist 11 is coated on a surface of the
insulation film 16a followed by exposure and development
processes, and an anisotropic etching is made on the insulation
film 16a using the photoresist 11 as a mask, as shown in FIG.
7A.
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Appeal 2013-000347
Application 12/346,667

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Discussion
The Examiner’s rejection is premised on the finding that “etching” as
described in paragraph 67 and Fig. 7a of Noma meets the claimed step of
“cutting the device intermediate so as not to cut through the via hole and so
as to produce a semiconductor device having the via hole therein.” The
Examiner found that the ’667 Application3 teaches that “etching” is
equivalent to “cutting.” Answer 13–14. The Examiner based this finding on
the description of “cutting” in the ’667 Application. Id. The description
cited by the Examiner is as follows:
Then, the semiconductor substrate 1 and the layers
stacked on it are cut along a predetermined dicing line into
individual semiconductor dice, although not shown in the
figure. A dicing method, an etching method, a laser cutting
method, or the like is used as the method of dividing those into
the individual semiconductor dice. A BGA type semiconductor
device, in which the pad electrode 3 and the ball-shaped
terminal 13 are electrically connected, is formed as described
above.
’667 Application 8:11–16.
The Examiner stated that the only reference to “cutting” in the ’667
Application appears in the passage reproduced above. Answer 14. This
passage, the Examiner contends, teaches that “cutting” is equivalent to
“dicing” and “etching.” Id.
The Examiner’s interpretation of “cutting” is not reasonable. During
patent prosecution, claim terms are given their broadest reasonable
interpretation consistent with specification as they would be understood by
one of ordinary skill in the art. In re Morris, 127 F.3d 1048, 1054 (Fed. Cir.

3 Application Serial No. 12/346, 667 involved in this appeal.
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Application 12/346,667

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1997). In this case, the ’667 Application describes a step in which the
semiconductor substrate and layers are “cut along a predetermined dicing
line into individual semiconductor dice.” ’667 Application 8:11–12. Id. at
7:23 to 8:10. The “dicing line” is not shown in the figures, but the
subsequent paragraph describes the via hole as being present after the dicing.
Id. at 8:17–26 and 9:9–12. The ’667 Application teaches that “the method of
dividing” the semiconductor substrates “into the individual semiconductor
dice” (that each comprises a via hole) is accomplished by a “dicing method,
an etching method, a laser cutting method, or the like.” Id. at 8:13–14. The
“dividing” can thus be accomplished by dicing, etching or cutting. The
passage does not equate “cutting” with “etching” as found by the Examiner,
but rather “dividing” with dicing, etching, and laser cutting. The fact that
“dividing” can be accomplished by these three methods does not constitute a
teaching that “cutting” is equivalent to “etching” as the Examiner found.
Answer 14.
Moreover, even if the methods were equivalent, the question is
whether “etching” would be reasonably construed to mean “cutting.” There
is insufficient evidence that one of ordinary skill in the art would have
reached such a construction. The Examiner’s interpretation of the claimed
“cutting” step to correspond to “etching” based on the ’667 Application is
therefore not reasonable nor supported by a preponderance of the evidence.
The Examiner did not show that Noma describes or suggests “cutting
the device intermediate so as not to cut through the via hole and so as to
produce a semiconductor device having the via hole therein.” Rather, the
disclosure by Noma relied upon as meeting the cutting step involved
“etching” into the formed via hole. Noma, Fig. 7A. Unlike the cutting step
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Application 12/346,667

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of the claimed invention where the cutting produces a device with a via hole,
Noma’s device is subsequently cut along a dicing line that divides the device
in the middle of the via hole breaking it apart. Noma Fig. 1A. The
Examiner did not meet the burden of showing that Noma describes the
claimed “cutting” step.
Ahn is further cited by the Examiner, but not for the cutting step.
Answer 6. Ahn therefore does not make up for the deficiencies in Noma.
Consequently, we are compelled to reverse the rejection of claim 1, and
dependent claims 2–6 and 8–11 which depend from it. Claim 7 is further
rejected based on Applicants’ Admitted Prior Art as teaching wet and dry
etch chemistries. Id. at 11–12. Claims 7 depends from claim 1. The
Admitted Prior Art does not make up for the deficiencies in Noma. We
reverse this rejection as well.

REVERSED

cdc