Ex Parte Kakehata et al

Patent Trial and Appeal Board

May 12, 2017

13467082 (P.T.A.B. May. 12, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
13/467,082 05/09/2012 Tetsuya KAKEHATA 12732-0570003 /
US11022-D
1076
26171 7590 05/16/2017
FISH & RICHARDSON P.C. (DC)
P.O. BOX 1022
MINNEAPOLIS, MN 55440-1022
EXAMINER
FOURSON III, GEORGE R
ART UNIT PAPER NUMBER
2823
NOTIFICATION DATE DELIVERY MODE
05/16/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
PATDOCTC@fr.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte TESUYA KAKEHATA and KAZUTAKA KURIKI1
Appeal 2016-005872
Application 13/467,082
Technology Center 2800
Before LINDA M. GAUDETTE, JULIA HEANEY, and
MERRELL C. CASHION, JR., Administrative Patent Judges.
CASHION, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
This is an appeal under 35 U.S.C. § 134 from the Examiner’s Non-
Final Action, dated March 18, 2015, rejecting claims 1—12. We have
jurisdiction under 35 U.S.C. § 6.
We AFFIRM.
1 Appellants identify the real party in interest as Semiconductor Energy
Laboratory Co., Ltd. App. Br. 1.
Appeal 2016-005872
Application 13/467,082
The claimed invention is directed to a method for manufacturing a
silicon-on-insulator (SOI) substrate. Independent claim 1 is illustrative of
the subject matter on appeal and is reproduced below:
1. A method for manufacturing an SOI substrate,
comprising the steps of:
forming an oxide film over a semiconductor substrate;
forming a nitrogen-containing layer over the oxide film;
irradiating the semiconductor substrate with accelerated
ions through the oxide film and the nitrogen-containing layer to
form a separation layer at a predetermined depth from a surface
of the semiconductor substrate;
disposing the semiconductor substrate and a base
substrate opposite to each other to bond a surface of the
nitrogen-containing layer and a surface of the base substrate to
each other; and
heating the semiconductor substrate to cause separation
along the separation layer, thereby forming a single crystal
semiconductor layer over the base substrate with the oxide film
and the nitrogen-containing layer interposed therebetween.
Appellants request review of the Examiner’s rejection of claims 1—12
under 35 U.S.C. § 103(a) as unpatentable over Lederer (US 2007/0032040
Al, published February 8, 2007). App. Br. 2; Non-Final Act. 2.
Appellants argue independent claims 1 and 2 together without
specifically addressing the rejection of dependent claims 3—12. App. Br. 2.
Accordingly, we select claim 1 as representative of the subject matter before
us on appeal. Claims 2—12 stand or fall with claim 1.
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Appeal 2016-005872
Application 13/467,082
OPINION
The Prior Art Rejection
After review of the respective positions provided by Appellants and
the Examiner, we AFFIRM the Examiner’s rejection of representative
claim 1 for the reasons presented by the Examiner in the Non-Final Action
and Answer. We add the following for emphasis.
The Examiner found Lederer discloses a method for manufacturing an
SOI substrate that includes forming an insulating layer comprising an oxide
layer and nitrogen containing layer (nitride). Non-Final Act. 2—3, citing
Lederer Figure 3, H 37, 43, 117. The Examiner determined the subject
matter of independent claim 1 would have been obvious to one skilled in the
art because Lederer discloses using a stack of layers for the insulation
wherein two of the possible materials are nitrogen containing materials and
oxides, as stated above. Non-Final Act. 3, citing Lederer || 43, 117. The
Examiner further determined one skilled in the art would have been led to
the recited combination of layered materials in view of the limited number
of materials disclosed. Non-Final Act. 3.
Appellants argue Lederer merely describes that an insulating layer is
provided on the second wafer 31, and does not describe or suggest the
recited arrangement of an oxide film between a semiconductor substrate and
a nitrogen-containing layer. App. Br. 2; Reply Br. 2. According to
Appellants, the choice of the materials used for each of the two layers
formed on the semiconductor substrate as well as the order in which the
layers are formed on the semiconductor substrate are important features of
the claimed invention. App. Br. 3; Reply Br. 2.
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Appeal 2016-005872
Application 13/467,082
We are unpersuaded by these arguments for the reasons presented by
the Examiner. Non-Final Act. 3; Ans. 3^4. The Examiner has reasonably
determined Lederer suggests forming an insulating layer in the form of a
stack of layers, where each layer in the stack can be selected from a limited
number of materials that includes oxides and nitrogen-containing materials.
Non-Final Act. 3; Ans. 4; Lederer || 43, 117. The Examiner also
reasonably determined one of ordinary skill in the art would have been led to
the recited combination of layers in view of the limited number of materials
disclosed. Non-Final Act. 3; Ans. 4. While Appellants argue that the order
of the layers of oxide and nitrogen-containing materials is an important
feature of the claimed invention (App. Br. 3; Reply Br. 2), Appellants have
not provided any objective evidence showing that the recited order of layers
is critical. Non-Final Act. 3; Ans. 3. Thus, Appellants have not shown error
in the Examiner’s conclusion of obviousness.
Accordingly we affirm the Examiner’s prior art rejection of claims 1—
12 under 35 U.S.C. § 103 (a) for the reasons presented by the Examiner and
given above.
ORDER
The Examiner’s prior art rejection of claims 1—12 under
35 U.S.C. § 103(a) is affirmed.
TIME PERIOD
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1).
AFFIRMED
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