Ex Parte Jouppi et al

Patent Trial and Appeal Board

Jul 15, 2016

12989981 (P.T.A.B. Jul. 15, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
12/989,981 01114/2011 Norman Paul Jouppi
56436 7590 07119/2016
Hewlett Packard Enterprise
3404 E. Harmony Road
Mail Stop 79
Fort Collins, CO 80528
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
82242719 4767
EXAMINER
CHERY, MARDOCHEE
ART UNIT PAPER NUMBER
2133
NOTIFICATION DATE DELIVERY MODE
07/19/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
hpe.ip.mail@hpe.com
mkraft@hpe.com
chris.mania@hpe.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte NORMAN PAUL JOUPPI, ALAN LYNN DA VIS,
NIDHI AGGARWAL, and RICHARD SHAW KAUFMANN
Appeal2014-009696
Application 12/989 ,981
Technology Center 2100
Before MICHAEL J. STRAUSS, JOHN F. HORVATH, and
NABEEL U. KHAN, Administrative Patent Judges.
KHAN, Administrative Patent Judge.
DECISION ON APPEAL
Appellants 1 appeal under 35 U.S.C. § 134(a) from the Final Rejection
of claims 1, 3---6, 8-14, 16, and 19-25. We have jurisdiction under 35
U.S.C. § 6(b).
We affirm-in-part.
1 According to Appellants, the real party in interest is Hewlett-Packard
Development Company, LP. App. Br. 2.
Appeal2014-009696
Application 12/989,981
THE INVENTION
Appellants' invention relates to storing checkpoint data of an
application in nonvolatile memory (Spec. i-f 1) so that, in the event of a fault,
the computation may be rolled back and restarted from the most recently
recorded checkpoint (Spec. i-f 4).
Exemplary independent claim 1 is reproduced below.
1. A data storage method comprising:
executing an application using processing circuitry;
during the executing, writing data generated by the
executing of the application to volatile memory;
after the writing, providing an indication of a checkpoint;
after the providing, copying the data from the volatile
memory to non-volatile memory;
suspending the executing of the application during the
copying; and
after the copying, continuing the executing of the
application.
REFERENCES and REJECTIONS
1. Claim 1 stands rejected under 35 U.S.C. § 102(a) as anticipated
by Raymond (US 2007/0180217 Al, publ. Aug. 2, 2007).
2. Claim 3 stands rejected under 35 U.S.C. § 103(a) as
unpatentable over Raymond and Haselden (US 2006/0156157 Al, publ. July
13, 2006).
3. Claims 3-6, 8-10, 12, 14, 16, 19, and 22-24 stand rejected as
unpatentable over Raymond and Erstad (US 2008/0059834 Al, publ. Mar. 6,
2008).
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Application 12/989,981
4. Claims 11, 13, and 20 stand rejected as unpatentable over
Raymond, Erstad, and Kanapathippillai (US 2008/0094808 Al, publ. Apr.
24, 2008).
5. Claims 21 and 25 stand rejected as unpatentable over Raymond,
Erstad, and Haselden.
ANALYSIS
I. Claim 1
The Examiner finds Raymond discloses "suspending the executing of
the application during the copying" of "data from the volatile memory to
non-volatile memory," as recited in claim 1. Specifically, the Examiner
finds Raymond's disclosure of pausing the computation of a program while
the program's data is copied to a storage device satisfies the claim limitation.
Final Act. 3 (citing Raymond Fig. 6, i-fi-1 6, 21 ).
AppeUants argue the claim requires "all execution of the appiication
during the copying is [to be] put on hold" and that pausing the program, as
Raymond discloses, is not a "complete suspension" of the application. App.
Br. 7-8. Appellants point out that in Raymond "[t]he term pause is used for
convenience ... however, in this paused situation, the system is actually
typically performing exception handling." App. Br. 8 (quoting Raymond
i-f 19) (internal quotations omitted).
We are unpersuaded by Appellants' arguments. We agree with the
Examiner that, under the broadest reasonable interpretation of the claim,
Raymond's description of pausing the computation of a program while the
program's data is copied to a storage device, discloses "suspending the
executing of the application," as recited in claim 1. See also Raymond i-fi-1 5-
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Application 12/989,981
6 (disclosing that "the program must be stopped" while copying data to
memory and that the program cannot resume until copying all data is
finished.) Appellants do not provide persuasive evidence or line of
reasoning explaining why pausing the program, as described by Raymond, is
not equivalent to "suspending the executing of the application." Appellants'
Specification describes that the purpose of suspending the application is to
ensure "the application data ... being checkpointed does not change while
the checkpoint data is copied from volatile memory 116 to non-volatile
memory 118." Spec. i-f 28. This is precisely the same reason given in
Raymond for pausing the computation of the program while copying the
program's data. Raymond i-f 6 ("This technique allows it and the utility
program to execute simultaneously without risk that the computing program
will modify its data before the utility program has a chance to copy it.")
TT
LL
Accordingly, we sustain the Examiner's rejection of claim 1.
Claim 9
The Examiner rejects claim 9 under the same rationale as claim 1.
Final Act. 7. Claim 9 recites "receiving an indication of a checkpoint
associated with [the] execution of one or more applications." App. Br. 20
(Claims App'x). Appellants argue, due to this recitation, claim 9 includes
elements and subject matter that are different than claim 1 that the Examiner
has not addressed. App. Br. 11.
We disagree. In rejecting claim 1, the Examiner finds that Figure 4 of
Raymond describes "providing an indication of a checkpoint," as recited in
claim 1. Final Act. 3. We agree that this finding also applies to claim 9 's
"receiving an indication of a checkpoint associated with execution of one or
more applications." Figure 4 of Raymond illustrates that a checkpoint
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Appeal2014-009696
Application 12/989,981
indication is provided to the system to checkpoint the data. Consequently,
the system receives an indication of the checkpoint. See also Raymond Fig.
5 (illustrating that a determination is made whether a checkpoint is
occurring.) We, therefore, conclude the Examiner's rejection has addressed
the limitations of claim 9.
Appellants' remaining arguments for the patentability of claim 9 are
similar to those presented for claim 1. See App. Br. 12-13. Accordingly,
we sustain the Examiner's rejection of claim 9.
III. Claims 6 and 16
Claim 6 recites "simultaneously copying a first subset of the data to a
first one of the plurality of integrated circuit chips and copying a second
subset of the data to a second one of the plurality of integrated circuit chips."
Similarly, claim 16 recites "simultaneously copy different portions of the
data to the non-volatile memory in parallel." The Examiner finds Erstad
teaches these iimitations by disclosing a piuraiity of integrated circuit
memory elements which enable different sets of data to be written to the
plurality of memory elements simultaneously. Ans. 15 (citing Erstad Fig.
5); see also Final Act. 7 (citing Erstad i-fi-19, 48).
Appellants argue:
Neither this general reference to multiple memory elements, nor
the earlier cited references describes the multiple subsets of the
data to be copied, let alone the simultaneous timing of the
copying of these subsets as disclosed and claimed in the present
application. The referenced figure makes no reference
whatsoever to subsets of data, and instead simply shows a
configuration of multiple memory elements connected by a bus.
Reply Br. 2; see also id. at 3 ("However, neither the Erstad figure cited nor
any of the other referenced sections cited by the Examiner describe
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Application 12/989,981
simultaneous copying 'different portions of the data to the non-volatile
memory' as claimed [in claim 16]. ")
We agree with Appellants' arguments. Erstad discloses that data can
be checkpointed in different memory elements at different times rather than
simultaneously. Erstad i-f 4 7--48 ("[I]n a first instance ... memory element
106a stores the data" and "in a second instance ... memory element 106b
stores the data .... ")(emphasis added). Erstad further discloses that each
memory element 106A-106N stores the entire set of application data that is
to be checkpointed at a given point in time, rather than different subsets or
portions of that data. Id. Thus, when data checkpointed at a given instance
of time is to be retrieved, the data is retrieved from one of the memory
elements, not from two or more of them, further indicating that different
portions of the data are not copied to different elements simultaneously as
recited in claims 6 and 16. See Erstad i-f 49.
The Examiner makes no finding that a person of ordinary skill in the
art would have found it obvious to simultaneously store data to be
checkpointed at a given instance in time in two or more non-volatile
memory elements. Accordingly, on the record before us, we do not sustain
the Examiner's rejection of claims 6 and 16.
IV. Claims 3-5, 8, 10-14, and 19-25
Appellants argue claims 3-5, 8, 10-14, and 19-25 separately, but
present the same arguments as they do for claims 1 and 9. See App. Br. 10-
13, 15-17. We, therefore, sustain the Examiner's rejections of these claims
for the aforementioned reasons.
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Application 12/989,981
DECISION
The Examiner's rejections of claims 1, 3-5, 8-14, and 19-25 are
affirmed.
The Examiner's rejection of claims 6 and 16 is reversed.
No time period for taking any subsequent action in connection with
this appeal may be extended. See 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED-IN-PART
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