Ex Parte Johns et al

Patent Trial and Appeal Board

Feb 28, 2014

11857674 (P.T.A.B. Feb. 28, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte CHARLES RAY JOHNS, ROY MOONSEUK KIM,
PEICHUN PETER LIU, SHIGEHIRO ASANO,
and ANUSHKUMAR RENGARAJAN
____________

Appeal 2011-011612
Application 11/857,674
Technology Center 2100
____________

Before JOHN A. JEFFERY, STEVEN D. A. MCCARTHY, and
DAVID M. KOHUT, Administrative Patent Judges.

JEFFERY, Administrative Patent Judge.

DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s
decision to reject claims 1, 3-8, 10-15, and 17-20. We have jurisdiction
under 35 U.S.C. § 6(b).
We affirm.

STATEMENT OF THE CASE
Appellants’ invention involves a processing engine that uses a data-
only transfer protocol in conjunction with an external bus node to transfer
Appeal 2011-011612
Application 11/857,674

2
data from an internal atomic cache to a local storage area. See generally
Abstract; Spec. ¶ 0001. Claim 1 is illustrative:
1. A computer-implemented method comprising:
receiving a direct memory access command;
determining that the direct memory access command
corresponds to an atomic cache line that is located within a
processing engine;
in response to determining that the direct memory access
command corresponds to the atomic cache line, configuring a
bus node located external to the processing engine to receive
cache line data from the atomic cache line using a data-only
transfer protocol, wherein the data-only transfer protocol is
devoid of a snoop phase;
sending the cache line data from the processing engine to
the bus node using the data-only transfer protocol, wherein the
bus node sends the cache line data back to the processing
engine; and
in response to receiving the cache line data from the bus
node, storing the cache line data in a local storage area located
in the processing engine.

THE REJECTIONS
The Examiner rejected claims 1, 3, 6-8, 10, 13-15, 17, and 20 under
35 U.S.C. § 103(a) as obvious over Day (US 2004/0236914 A1; published
Nov. 25, 2004) and Ho (US 2005/0204088 A1; published Sept. 15, 2005).
Ans. 4-11.1

1 Throughout this opinion, we refer to (1) the Appeal Brief filed February
18, 2011 (“App. Br.”); (2) the Examiner’s Answer mailed April 27, 2011
(“Ans.”); and (3) the Reply Brief filed June 23, 2011 (“Reply Br.”).
Appeal 2011-011612
Application 11/857,674

3
The Examiner rejected claims 4, 5, 11, 12, 18, and 19 under 35 U.S.C.
§ 103(a) as obvious over Day, Ho, and Pawlowski (US 5,537,640; issued
July 16, 1996). Ans. 11-18.

THE OBVIOUSNESS REJECTION OVER DAY AND HO
The Examiner finds that Day discloses every recited element of claim
1 including configuring an external bus node to receive cache line data from
an atomic cache line using a data-only transfer protocol that is said to be
taught by Day’s bus interface controller requesting data from an atomic
cache in paragraph 34. Ans. 4. Although the Examiner acknowledges that
Day’s protocol is not devoid of a snoop phase, the Examiner nonetheless
cites Ho for teaching this feature in concluding that the claim would have
been obvious. Ans. 4-5, 18-20.
Appellants argue that because Ho teaches away from using a bus node
controller that Day requires, the Examiner’s proposed combination of these
references is improper. App. Br. 6-8; Reply Br. 2-4. Appellants add that
this proposed combination also renders Day’s bus interface controller
inoperable for its intended purpose because this controller (1) receives
control when data is not found in an atomic cache, and (2) must use a snoop
command to search for cache data in this circumstance. Id.

ISSUE
Is the Examiner’s combination of teachings of Day and Ho supported
by articulated reasoning with some rational underpinning to justify the
Examiner’s obviousness conclusion? This issue turns on whether Ho
Appeal 2011-011612
Application 11/857,674

4
teaches away from the Examiner’s proposed combination, and whether this
combination would render Day inoperable for its intended purpose.

ANALYSIS
We sustain the Examiner’s obviousness rejection of claim 1. In Day’s
DMA atomic transfer method of Figure 2, DMA engine 115 orders a transfer
of data from, among other places, atomic cache 137 in step 210. Day
¶ 0034; Figs. 1-2. But if data is not found in the atomic cache, then bus
interface controller (BIC) 150 requests this data from various locations,
including APU complex(es) 192 atomic cache 137 via a snoop request in
step 215. Id.
The import of this discussion is that while Day’s DMA engine may be
unable to find the selected data in the atomic cache for transfer, the BIC may
be so capable. The BIC would, therefore, be configured to receive that data
in that circumstance. Accord Ans. 4 (noting that Day’s BIC requests data
from the atomic cache in paragraph 34). Appellants’ contention that Day’s
BIC never receives an indication that data resides in the atomic cache (Reply
Br. 2-3) is overstated, for control passes to the BIC when the DMA engine
cannot find the data—not that it does not reside in the atomic cache. That
the BIC then searches that very cache for the same data as noted in Day’s
paragraph 34 only further undercuts Appellants’ position in this regard.
Although the BIC uses a snoop request in this instance, we
nonetheless see no reason why a non-snoop protocol could not be used as the
Examiner proposes, particularly in view of the relative advantages of non-
snoop transactions over snoop transactions, namely to (1) allow the system
bus to be used by another master, and (2) predict access latency. See Ho
Appeal 2011-011612
Application 11/857,674

5
¶¶ 0003-05. Accord Ans. 5 (noting these advantages). This enhancement
predictably uses prior art elements according to their established functions—
an obvious improvement. See KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398,
417 (2007).
That Day’s BIC connects to atomic facility 130 via a data bus in
addition to a dedicated snoop bus in Figure 1 only bolsters the Examiner’s
position that a snoop phase is not required to locate data for every transfer.
See Ans. 19-20. This dual data path further undermines Appellants’
contention that the proposed combination would render Day’s bus node
controller (i.e., BIC) inoperable because it allegedly must use a snoop
request or would otherwise be unable to locate the data. App. Br. 7-8. In
any event, not only is Appellants’ contention unsupported by any persuasive
evidence on this record, it does not persuasively rebut the Examiner’s
additional reliance on Ho merely to show that using non-snoop requests
would have been obvious in view of their advantages over snoop requests.
Appellants’ contention that Ho teaches away from using a BIC as Day
requires (App. Br. 7-8; Reply Br. 3-4) is unavailing. “A reference may be
said to teach away when a person of ordinary skill, upon reading the
reference, would be discouraged from following the path set out in the
reference, or would be led in a direction divergent from the path that was
taken by the applicant.” In re Kahn, 441 F.3d 977, 990 (Fed. Cir. 2006)
(citation and internal quotation marks omitted).
That is not the case here. As the Examiner explains, the Examiner
does not propose to combine Ho’s entire structure with Day as Appellants
Appeal 2011-011612
Application 11/857,674

6
seem to suggest.2 Ans. 18-19. Rather, the Examiner cites Ho merely to
teach that non-snoop data transfers can be used to send data from a cache to
a bus node, and that providing such a feature in Day would have obvious.
Id. It is well settled that “a determination of obviousness based on teachings
from multiple references does not require an actual, physical substitution of
elements.” In re Mouttet, 686 F.3d 1322, 1332 (Fed. Cir. 2012) (citations
omitted). Nor is the test for obviousness whether a secondary reference’s
features can be bodily incorporated into the structure of the primary
reference. In re Keller, 642 F.2d 413, 425 (CCPA 1981). Rather, the test is
what the combined teachings of the references would have suggested to
those of ordinary skill in the art. Id.
We see no error in the Examiner’s position in this regard. Not only
does Ho not discourage using non-snoop techniques in a data transfer
application such as that disclosed by Day, it actually encourages such an
approach in view of the advantages of non-snoop transactions over snoop
transactions noted previously. See Ho ¶¶ 0003-05. For similar reasons, we
are likewise unpersuaded that Ho would have led skilled artisans in a
direction divergent from the path taken by Appellants whose data transfer
protocol is devoid of a snoop phase. Therefore, we disagree with Appellants
that Ho teaches away from the Examiner’s proposed combination, or that
this combination would render Day unsuitable for its intended purpose.
Rather, we find the Examiner’s proposed combination is supported by

2 See Reply Br. 4 (“[I]n order to combine Ho’s non-snoop technique with
Day’s bus interface controller, Ho’s customized north bridge circuitry must
also be combined with Day’s bus interface controller.”) (emphasis added).
Appeal 2011-011612
Application 11/857,674

7
articulated reasoning with some rational underpinning to justify the
Examiner’s obviousness conclusion.
Therefore, we are not persuaded that the Examiner erred in rejecting
representative claim 1, and claims 3, 6-8, 10, 13-15, 17, and 20 not argued
separately with particularity.

THE OTHER OBVIOUSNESS REJECTION
We also sustain the Examiner’s obviousness rejection of claims 4, 5,
11, 12, 18, and 19 over Day, Ho, and Pawlowski. Ans. 11-18. Despite
nominally arguing these claims separately, Appellants reiterate similar
arguments made in connection with claim 1 that we find unpersuasive for
the reasons previously discussed. See App. Br. 9; Reply Br. 5.

CONCLUSION
The Examiner did not err in rejecting claims 1, 3-8, 10-15, and 17-20
under § 103.

ORDER
The Examiner’s decision rejecting claims 1, 3-8, 10-15, and 17-20 is
affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED
llw