Ex Parte Jeong et al

Patent Trial and Appeal Board

Aug 30, 2018

14230908 (P.T.A.B. Aug. 30, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/230,908 03/31/2014
144016 7590 09/04/2018
Sheridan Ross P.C.
1560 Broadway, Suite 1200
Denver, CO 80202
FIRST NAMED INVENTOR
Ku Hong Jeong
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
5887-385 8274
EXAMINER
KHAN, MASUD K
ART UNIT PAPER NUMBER
2131
NOTIFICATION DATE DELIVERY MODE
09/04/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
e-docket@sheridanross.com
mreno@sheridanross.com
mellsworth@sheridanross.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte KU HONG JEONG, QI ZUO,
SHAOHUA YANG,andKAITLYNT.NGUYEN
Appeal2017-008803 1
Application 14/230,9082
Technology Center 2100
Before BARBARA A. BENOIT, JOHN D. HAMANN, and
JOYCE CRAIG, Administrative Patent Judges.
HAMANN, Administrative Patent Judge.
DECISION ON APPEAL
Appellants file this appeal under 35 U.S.C. § 134(a) from the
Examiner's Final Rejection of claims 1-20. We have jurisdiction under
35 U.S.C. § 6(b ).
We reverse.
1 Our decision relies upon Appellants' Appeal Brief ("Br.," filed June
16, 2016) and Specification ("Spec.," filed Mar. 31, 2014), as well as the
Examiner's Answer ("Ans.," mailed Dec. 1, 2016) and the Final Office
Action ("Final Act.," mailed Dec. 17, 2015).
2 Appellants identified the real party in interest as Avago Technologies
General IP (Singapore) Pte. Ltd. Br. 2.
Appeal2017-008803
Application 14/230,908
THE CLAIMED INVENTION
Appellants' claimed invention relates to the "management of memory
resources in a communication channel." Spec. ,r 2. Claim 1 is illustrative of
subject matter on appeal and is reproduced below.
1. A communication channel, comprising:
a despreader memory block configured to de-interleave
incoming memory slices associated with a plurality of data
sectors;
a buffer configured to receive the de-interleaved memory
slices and further configured to transfer the de-interleaved
memory slices of the plurality of data sectors sequentially to a
decoder for further processing; and
a resource management controller configured to monitor
a memory availability of the despreader memory block and a
memory availability of the buffer and further configured to
prevent the despreader memory block from transferring the
de-interleaved memory slices of a data sector to the buffer when
the memory availability of the buffer is below a threshold
buffer availability and the memory availability of the
despreader memory block is above a threshold despreader
availability.
REJECTIONS ON APPEAL
(1) The Examiner rejected claims 1, 3-5, 7-9, 11-13, 16, 18, and
19 under 35 U.S.C. § I02(a) as being anticipated by Gunnam, et al. (US
8,402,348 Bl; issued Mar. 19, 2013) (hereinafter "Gunnam").
(2) The Examiner rejected claims 2, 6, 10, 14, 17, and 20 under
35 U.S.C. § 103 as being unpatentable over the combination of Gunnam and
Ecclesine (US 6,351,780 Bl; issued Feb. 26, 2002) (hereinafter
"Ecclesine").
2
Appeal2017-008803
Application 14/230,908
(3) The Examiner rejected claim 15 under 35 U.S.C. § 103 as being
unpatentable over the combination of Gunnam and Lu et al. (US
2014/0071558 Al; published Mar. 13, 2014) (hereinafter "Lu").
ISSUE
The dispositive issue for this appeal is whether Gunnam discloses
transferring de-interleaved memory slices sequentially.
ANALYSIS
We have reviewed the Examiner's rejections in light of Appellants'
contentions that the Examiner errs. We find Appellants' arguments
discussed herein3 persuasive.
Appellants argue that the Examiner errs in finding that Gunnam
discloses transferring de-interleaved memory slices "sequentially," in
accordance with independent claims 1, 9, and 16. See Br. 16-19, 24--26, 29-
32. More specifically, Appellants argue that the cited portions of Gunnam
do not disclose "transferring memory slices in a sequential fashion." Id. at
16-17 (emphasis added) (citing Gunnam Fig. 1, 2: 15-35); see also id. at 26,
31. As to the Examiner's additional finding for claim 16, Appellants argue
that Gunnam's disclosure of re-ordering data is unclear and unrelated to the
disputed limitation. Id. at 31.
The Examiner finds that Gunnam discloses transferring de-interleaved
memory slices "sequentially" via Gunnam's teaching that its "system further
comprises a de-interleaver circuit and an output buffer. Upon convergence
3 Because we agree with at least one of the dispositive arguments advanced
by Appellants, we need not reach the merits of Appellants' other arguments.
3
Appeal2017-008803
Application 14/230,908
the decoder circuit writes data to the third memory region while data is
provided from the fourth memory region to the output buffer via the de-
interleaver circuit." Ans. 3 (quoting Gunnam 2:32-35). The Examiner also
finds that this portion of Gunnam shows "that the order of the data slices are
maintained, hence they are sent sequentially." Final Act. 19; see also id. at 3
(citing Gunnam Fig. 1, 2:15-35). In addition, with respect to claim 16, the
Examiner finds that Gunnam discloses transferring de-interleaved memory
slices sequentially because "re-ordering out of order data is taught by
Gunnam to make the data sequential to the buffer." Id. at 19; see also id. at
8 (citing Gunnam Fig. 1, 8: 15-20, 9:50-60).
We agree with Appellants that the portions of Gunnam cited by the
Examiner do not disclose transferring memory slices sequentially. See
Gunnam Fig. 1, 2: 15-3 5. Rather, these portions of Gunnam simply disclose
that a de-interleaver circuit receives data from a buffer (i.e., "fourth memory
region") and transfers the data (presumably de-interleaved) to an output
buffer. Id. There is no discussion of (i) how the de-interleaver circuit de-
interleaves the data, (ii) the composition of the data (i.e., whether the data
consists of memory slices), nor (iii) what ordering, if any, occurs of the de-
interleaved data before it is transferred to the output buffer. Id.; see also
Spec. ,r 17, Fig. 4 (providing an example of transferring de-interleaved
memory slices sequentially (i.e., AO, Al, A2, BO, Bl, B2, DO, DI, and D2
memory slices)). Furthermore, the Examiner's finding (Final Act. 19) "that
the order of the data slices are maintained, hence they are sent sequentially"
is unsupported by the cited portions of Gunnam. See Gunnam Fig. 1, 2: 15-
35. We also disagree with the Examiner's finding (Final Act. 8, 19) with
respect to claim 16 that Gunnam's "[r]e-ordering of[] out of order results"
4
Appeal2017-008803
Application 14/230,908
discloses sequential transferring of memory slices. There is no discussion of
how the re-ordering operates on data, including whether the data consists of
memory slices to be re-ordered sequentially. See Gunnam 9:50-56.
Thus, we find that the cited portions of Gunnam fail to disclose the
disputed limitation for any of claims 1, 9, and 16. Cf Wasica Fin. GmbH v.
Cont'! Auto. Sys., Inc., 853 F.3d 1272, 1284 (Fed. Cir. 2017) (quoting Verve,
LLC v. Crane Cams, Inc., 311 F.3d 1116, 1120 (Fed. Cir. 2002))
("Anticipation requires that a single reference 'describe the claimed
invention with sufficient precision and detail to establish that the subject
matter existed in the prior art.'").
CONCLUSION
Based on our reasoning above, we do not sustain the Examiner's
§ 102 rejection of independent claims 1, 9, and 16, as well as claims 3-5, 7,
8, 11-13, 18, and 19, as they depend from one of these independent claims.
As to the Examiner's § 103 rejection of (i) claims 2, 6, 10, 14, 17, and 20
and (ii) claim 15, the Examiner relies on the above findings from Gunnam
for the disputed limitation. Accordingly, we also do not sustain the
Examiner's§ 103 rejections of claims 2, 6, 10, 14, 15, 17, and 20.
DECISION
We reverse the Examiner's decision rejecting claims 1-20.
REVERSED
5