Ex Parte Jacobson et al

Patent Trial and Appeal Board

Dec 22, 2016

12406666 (P.T.A.B. Dec. 22, 2016)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/406,666 03/18/2009 Joseph M. Jacobson H-431DIV 5846
26245 7590 12/27/2016
E INK CORPORATION
INTELLECTUAL PROPERTY DEPARTMENT
1000 Technology Park Drive
EXAMINER
PHAM, LONG D
Billerica, MA 01821-4165 ART UNIT PAPER NUMBER
2691
NOTIFICATION DATE DELIVERY MODE
12/27/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
IP@eink.com
dcole@eink.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte JOSEPH M. JACOBSON, BARRETT COMISKEY, and
RUSSELL J. WILCOX
Appeal 2016-001052
Application 12/406,666
Technology Center 2600
Before BRUCE R. WINSOR, WILLIAM M. FINK, and
DAVID J. CUTITTAII, Administrative Patent Judges.
WINSOR, Administrative Patent Judge.
DECISION ON APPEAL
Appellants1 appeal under 35 U.S.C. § 134(a) from the final rejection
of claims 17—19, which constitute all the claims pending in this application.
We have jurisdiction under 35 U.S.C. § 6(b). Claims 1—16 are cancelled.
Br. 5.
We affirm-in-part.
1 The real party in interest identified by Appellants is E INK Corporation.
Br. 3.
Appeal 2016-001052
Application 12/406,666
STATEMENT OF THE CASE
According to Appellants, the disclosed invention relates to
“addressing schemes for electronic displays” (Spec. 1 5). More specifically,
Appellants’ invention involves an electronic display, such as a multi-page
electronic book “having a plurality of pixels, and separate first, second and
third sets of addressing means for addressing these pixels” (see Spec.,
Abstract). In addition, Appellants’ invention involves each of the pixels
being “associated with one addressing means in each of the three sets, such
that addressing of any specific pixel requires application of signals within
predetermined ranges to each of the three addressing means associated with
the specific pixel being addressed” (id.). Claims 17 and 18 are illustrative:
17. An electronic display comprising an electro-optic
material having a plurality of separately addressable pixels
wherein the number of driver outputs to the pixel array is less
than the square root of the number of pixels.
18. An electronic display comprising an electro-optic
material having a plurality of pixels, and separate first, second
and third sets of addressing means for addressing said pixels,
the first, second and third sets of addressing means being
independent of each other such that each of said pixels is
associated with a unique combination of one addressing means
in each of said three sets, such that any specific pixel of the
display can be addressed by application of signals within
predetermined ranges to each of the three addressing means
associated with said specific pixel.
Claim 17 stands rejected under 35 U.S.C. § 102(b)2 as being
anticipated by Sato (US 4,041,481; Aug. 9, 1977). See Final Act. 2—3.
2 All rejections are under the provisions of 35 U.S.C. in effect prior to the
effective date of the Leahy-Smith America Invents Act of 2011. Final
Act. 2.
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Appeal 2016-001052
Application 12/406,666
Claims 18 and 19 stand rejected under 35 U.S.C. § 102(b) as being
anticipated by DiSanto et al. (US 5,359,346; Oct. 24, 1994). See Final Act.
3^4.
Rather than repeat the arguments here, we refer to the Appeal Brief
(“Br.” filed December 9, 2014) and the Specification (“Spec.” filed Mar. 18,
2009, amended Dec. 4, 2012) for the positions of Appellants and the Final
Office Action (“Final Act.” mailed Oct. 25, 2013) and Answer (“Ans.”
mailed Aug. 20, 2015) for the reasoning, findings, and conclusions of the
Examiner. Only those arguments actually made by Appellants have been
considered in this decision. Arguments that Appellants did not make in the
Brief have not been considered and are deemed to be waived. See 37 C.F.R.
§ 41.37(c)(l)(iv) (2013).
RELATED CASE
The instant application claims priority from Application 10/906,019
(filed Jan. 31, 2005), which was the subject of Appeal 2010-000013 (mailed
Sept. 13, 2011). See Spec. 12. Although not identified as such by
Appellants (see Br. 4)3, Appeal 2010-000013 is related to the instant appeal.
See, e.g., MPEP § 706.03(W).
ISSUES
The issues presented by Appellants’ arguments are as follows:
3 Appellants and their counsel are reminded of the obligation to identify
prior and pending related appeals, interferences, trials before the Board, and
judicial proceedings. See 37 C.F.R. § 41.37(c)(l)(ii).
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Appeal 2016-001052
Application 12/406,666
Does the Examiner err in finding Sato discloses “the number of driver
outputs to [a] pixel array is less than the square root of the number of
pixels,” as recited in claim 17?
Does the Examiner err in finding DiSanto discloses “that any specific
pixel of the display can be addressed by application of signals within
predetermined ranges to each of the three addressing means associated with
said specific pixel,” as recited in claim 18?
ANALYSIS
Claim 17
The Examiner finds Sato’s X-line driving circuit 20 and Y-line
driving circuit 30 comprise “driver outputs to the pixel array” such that the
two driving circuits are fewer than the square root of the number of pixels in
a driven array, i.e., fewer than the square root of the 25 pixels in an
exemplary five-by-five pixel array. Final Act. 2—3 (citing Sato col. 3,1. 44-
col. 4,1. 41, Fig. 1); see also Ans. 4—5. Appellants contend as follows:
Claim 17 does not relate to the number of driving circuit boards
(which is essentially an engineering matter depending upon how
many conductors it is convenient to provide on a single board)
but to the number of driver outputs, i.e., the number of
connections between the driving circuit boards and the display
itself.
Br. 11—12. We agree with Appellants.
During examination, claims are to be given their broadest reasonable
interpretation consistent with the specification, and the language should be
read in light of the specification as it would be interpreted by one of ordinary
skill in the art. In re Am. Acad. ofSci. Tech Ctr., 367 F.3d 1359, 1364 (Fed.
Cir. 2004). In this case, we agree with Appellants that one of ordinary skill
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Application 12/406,666
in the art would understand the recited “driver outputs to the pixel array” to
refer to the outputs of driving circuit boards that connect the driving circuit
boards to the pixels of a pixel array, and not to the circuit boards themselves.
Indeed, the Examiner’s claim construction would improperly read “outputs”
and “to the pixel array” out of the claim.
Referring to Sato’s Figure 1, the driver outputs, properly construed,
map to the connections between each of line drivers Si through Sm and the
corresponding electrodes Xi though Xm and between each of line drivers f
through In and the corresponding electrodes Yi through Yn. Assuming m
and n both equal 5, for a five-by-five exemplary pixel array having 25
pixels, there would be ten driver outputs, which is greater than the square
root of 25, i.e., greater than five.
On this record, Appellants have shown error in the rejection of claim
17. Accordingly, we do not sustain the rejection of claim 17.
Claim 18
We have reviewed Appellants’ arguments and contentions (Br. 12—15)
in light of the Examiner’s findings (Final Act. 3) and explanations (Final
Act. 5; Ans. 5—6) regarding claim 18. We agree with the Examiner’s
findings and explanations and we adopt them as our own. The following
discussion, findings, and conclusions are for emphasis.
The Examiner finds that the recited first, second, and third sets of
addressing means are disclosed by DiSanto’s grid members 20, cathode
members 18, and anode elements 32, respectively. Final Act. 3 (citing
DiSanto col. 3,1. 60-col. 4,1. 34, col 5,11. 1—19, 33—51, col. 7,1. 5—col. 8,1.
24, Figs. 1, 2); see also Ans. 5—6 (additionally citing DiSanto col. 6,11. 33—
37).
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Application 12/406,666
Appellants contend “no pixel in the DiSanto display is associated with
a unique combination of one addressing means in each of three sets of
addressing means, as required by present claim[] 18.” Br. 13. Appellants
explain as follows:
[I]n DiSanto only two sets of addressing means are needed to
address any individual pixel, as in a conventional two-
dimensional pixel array, and the third set of addressing means is
used only to obtain ‘special effects’ from the display. Thus, any
given pixel is not addressed by a unique combination of the three
addressing means; a given pixel is addressed by a unique
combination of the first and second addressing means, regardless
of the state of the third addressing means.
Br. 14—15. We are not persuaded of error.
As pointed out by the Examiner, DiSanto discloses an embodiment
where individual pixels are controllable by controlling individual anode lines
(Final Act. 5 (citing DiSanto col. 6,11. 26—36)), which one of ordinary skill
in the art would understand to disclose an embodiment in which the
individual anode lines are a single pixel wide. Furthermore, DiSanto
discloses that, to address a given pixel, the relevant addressing means from
each of the three sets of DiSanto’s addressing means (grid member 20,
cathode member 18, and anode element 32) must be set to the correct
voltage (see DiSanto col. 7,1. 5—col. 8,1. 24), so that to address any specific
pixel it is necessary to independently apply a signal (voltage) within a
predetermined range to each of the three relevant addressing means. Thus,
the Examiner is correct that each pixel is associated with a unique
combination of the individual ones of the three addressing means. See Final
Act. 5. The fact that each of DiSanto’s anode elements 32 may be
associated with a plurality of pixels does not change this analysis — each of
the addressing means in Appellants’ preferred embodiment is also associated
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Application 12/406,666
with a plurality of pixels (see Spec. 196, Fig. 8) as are each of DiSanto’s
grid members 20 and cathode members 18 (see DiSanto Fig. 1).
Appellants point out that DiSanto does not achieve the advantages of
“allowing] control of a very large number of pixels with a limited,
practicable number of addressing means.” Br. 13—14. However, this
advantage is not recited in the claim.
Appellants have not persuaded us of error in the rejection of claim 18.
Accordingly, we sustain the rejection of claim 18 and claim 19, which was
argued together with claim 18 (see Br. 12—15).
DECISION
The decision of the Examiner to reject claims 18 and 19 is affirmed.
The decision of the Examiner to reject claim 17 is reversed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1). See 37 C.F.R.
§§ 41.50(f), 41.52(b).
AFFIRMED-IN-PART
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