Ex Parte Ito

Board of Patent Appeals and Interferences

Aug 23, 2010

10863777 (B.P.A.I. Aug. 23, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/863,777 06/09/2004 Akira Ito 2635-220 6607
23117 7590 08/24/2010
NIXON & VANDERHYE, PC
901 NORTH GLEBE ROAD, 11TH FLOOR
ARLINGTON, VA 22203
EXAMINER
KIM, HONG CHONG
ART UNIT PAPER NUMBER
2185
MAIL DATE DELIVERY MODE
08/24/2010 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
________________

Ex parte AKIRA ITO
________________

Appeal 2009-006267
Application 10/863,777
Technology Center 2100
________________

Before JAMES D. THOMAS, ANTON W. FETTING, and
JOSEPH A. FISCHETTI, Administrative Patent Judges.

THOMAS, Administrative Patent Judge.

DECISION ON APPEAL1

1 The two-month time period for filing an appeal or commencing a civil
action, as recited in 37 C.F.R. § 1.304, or for filing a request for rehearing,
as recited in 37 C.F.R. § 41.52, begins to run from the “MAIL DATE”
(paper delivery mode) or the “NOTIFICATION DATE” (electronic delivery
mode) shown on the PTOL-90A cover letter attached to this decision.
Appeal 2009-006267
Application 10/863,777

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STATEMENT OF THE CASE

This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1 through 20, and 24 through 39. Claims 21 through 23
have been canceled. We have jurisdiction under 35 U.S.C. § 6(b).
We reverse.

Representative Claim
We and Appellant consider independent claim 1 as representative of
the disclosed invention and the claimed subject matter on appeal:
1. An electronic system having a first electronic unit for
carrying out a first predetermined operation and a second
electronic unit for carrying out a second predetermined
operation, said first and second electronic units being
electrically communicable with each other, said electronic
system comprising:

a nonvolatile storage unit provided in the first electronic
unit and configured to store therein control data, said second
electronic unit requiring at least one of first and second pieces
of the control data for carrying out the second predetermined
operation on or after boot-up, the second electronic unit being
configured to receive, on or after boot-up, at least one of the
first and second pieces of the control data stored in the
nonvolatile storage unit and sent from the first electronic unit;
and

request sending means provided in the second electronic
unit for sending to the first electronic unit a request to send at
least one of the first and second pieces of the control data when
the second electronic unit is reset.

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Application 10/863,777

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Prior Art and Examiner’s Rejections
The examiner relies on the following references as evidence of
unpatentability:
Struger US 4,882,702 Nov. 21, 1989
Bellinger US 6,003,396 Dec. 21, 1999
Oohara US 6,243,630 B1 June 5, 2001
Iwai ’080 US 6,334,080 B1 Dec. 25, 2001
Iwai ’161 US 6,374,161 B1 Apr. 16, 2002
Lindsay US 6,907,503 B2 June 14, 2005
(filed Sept. 27, 2001)

IEEE 100: THE AUTHORITATIVE DICTIONARY OF IEEE STANDARDS
TERMS “Nonvolatile random-access memory (NVRAM)” 743 (7th ed. 2000)
(hereinafter “NVRAM”).

Michael Barr, Introduction to Watchdog Timers,
http://www.embedded.com/shared/printableArticle.jhtml?articleID=990324
(last visited Sept. 28, 2006) (hereinafter “Barr”).

All claims on appeal, claims 1 through 20, and 24 through 39, stand
rejected under 35 U.S.C. § 103. In an initial rejection, the Examiner relies
upon Iwai ’080 and Lindsay, further in view of NVRAM, as to claims 1
through 4, 17, and 24 through 27. To this combination of references, the
Examiner adds Oohara as to claims 9, 18 through 20, and 32. Likewise, to
the initial combination of references, the Examiner adds Iwai ’161 as to
claims 5 through 7, and 28 through 30. Still further, as to claims 10 through
12, 14, 32 through 35, and 37, the Examiner relies upon this latter
combination of references further in view of Oohara. Next, the Examiner
rejects claims 8 and 31 in view of the initial combination of references,
further in view of Bellinger. To this latter combination of references, the
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Examiner adds Oohara as to claims 13 and 36. The Examiner relies upon
the initial combination of references, further in view of Struger, as to claims
15 and 38. Lastly, the Examiner relies again upon this latter combination of
references, further in view of Barr as to claims 16 and 39.

ANALYSIS

The arguments and issue before us focus upon the last clause of the
representative independent claim 1 on appeal that requires a “request
sending means provided in the second electronic unit for sending to the first
electronic unit a request to send at least one of the first and second pieces of
the control data when the second electronic unit is reset.”
Corresponding language also appears at the end of independent claims
17 and 24 on appeal.
To simplify our consideration of the prior art applied in the initial
rejection in which all three independent claims 1, 17, and 24 on appeal are
rejected, we will assume for the sake of argument that the applied prior art is
properly combinable within 35 U.S.C. § 103. Our conclusion to reverse this
rejection, and all additional rejections of their respective dependent claims,
is based upon our conclusion that the combined teachings of Iwai ’080,
Lindsay and NVRAM do not reasonably teach or suggest to one of ordinary
skill in the art the subject matter of the request sending means clause at the
end of representative independent claim 1 on appeal.
On the one hand, Iwai ’080 teaches two control units A1 and A2 in
representative figure 1A that share data by use of shared memories
illustrated in this figure. There appears to be no discussion of a resetting
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functionality between these control units. This view is recognized by the
Examiner in formulating the rejection as expressed at page 4 of the Answer.
On the other hand, the Examiner relies upon Lindsay to teach the
functionality of the request sending means clause at issue in this appeal that
we reproduced earlier in this opinion. Like Appellant, we do not agree with
this view of the Examiner. Lindsey’s figure 1 shows two control units, an
engine control 14 and a transmission control 16, that both functionally share
a common memory identified as a dual port memory 10, which has its own
control logic 50. (Lindsay, fig. 1.) This control logic sends respective
interrupts to each of these controls in figure 1 and also illustrates reset
signals associated with each control unit.
Because our studied understanding of Lindsay is consistent with that
set forth in the Appeal Brief, we reproduce Appellant’s arguments relating to
his assessment of the teachings of this reference at the bottom of page 14
through the top of page 16 of the principal Brief on appeal:
Lindsay fails to resolve the admitted deficiency of Iwai
[’080] relating to the claim limitation sending a request for a
piece of control data from a second electronic unit to a first
electronic unit when a second electronic unit is reset. That is,
no request in Lindsay is sent from a second unit to a first unit
upon reset of the second unit, let alone a request for control data
for enabling the second unit to carry out a predetermined
operation. Instead of using reset for requesting for and sending
a piece of control data, col. 9 and Fig. 4 of Lindsay clearly and
unambiguously discloses utilize the reset for determining the
validity of communicated information - a completely different
purpose.
Lindsay discloses a dual port RAM 12 being accessible
by an engine control unit 14 and a transmission control unit 16.
Each of the engine control unit 14 and the transmission control
unit 16 is capable of being reset. As an example, the
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transmission control unit 16 is capable of being reset by a
transmission control unit reset 40. When the transmission
control unit 16 is reset, a transmission reset bit is set in a
transmission status register 28 of the dual port RAM 12. This
transmission reset bit set in the transmission status register 28
enables the engine control unit 14 to be informed of the reset
state of the transmission control unit 16. (See col. 4, lines 36-52
of Lindsay.) In a reciprocal manner, an engine reset bit in an
engine status register 32 enables the transmission control unit
16 to be informed of the reset state of the engine control unit
14. (See col. 4, lines 53-65 of Lindsay.)
As described above, Lindsay merely discloses that the
engine control unit 14 can recognize the reset state of the
transmission control unit 16 based on the reset bit set in the
dual port RAM 12. Accordingly, Lindsay does not teach
sending a request from a second electronic unit to a first
electronic unit, let alone doing so when the second electronic
unit is reset or doing so to receive control data for enabling the
second electronic unit to carry out a predetermined operation.
Specifically, Lindsay fails to teach or suggest sending a request
from the transmission control unit 16 (a second electronic unit)
to the engine control unit 14 (a first electronic unit) when the
transmission control unit 16 (the second electronic unit) is reset.
Lindsay thus fails to resolve the admitted deficiency of Iwai
[’080]. Even if Lindsay and Iwai [’080] were forcibly
combined (along with NVRAM) as proposed by the Final
Rejection, the combination would still not have taught or
suggested all of the claim limitations.

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Application 10/863,777

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CONCLUSION AND DECISION
The examiner’s decision rejecting all claims on appeal under 35
U.S.C. § 103 is reversed.

REVERSED

llw

NIXON & VANDERHYE, PC
901 NORTH GLEBE ROAD, 11TH FLOOR
ARLINGTON, VA 22203