Ex Parte Ishwar et alDownload PDFBoard of Patent Appeals and InterferencesAug 13, 201210431556 (B.P.A.I. Aug. 13, 2012) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 10/431,556 05/07/2003 Prashanth Ishwar RSTN-098 4793 96916 7590 08/13/2012 Wilson Ham & Holman 1811 Santa Rita Road, Ste. 130 Pleasanton, CA 94566 EXAMINER WAI, ERIC CHARLES ART UNIT PAPER NUMBER 2195 MAIL DATE DELIVERY MODE 08/13/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________________ Ex parte PRASHANTH ISHWAR, APURVA MEHTA, SHIVA SHENOY, and SATINDER SINGH ____________________ Appeal 2009-015331 Application 10/431,556 Technology Center 2100 ____________________ Before JOSEPH L. DIXON, THU A. DANG, and JAMES R. HUGHES, Administrative Patent Judges. DANG, Administrative Patent Judge. DECISION ON APPEAL Appeal 2009-015331 Application 10/431,556 2 I. STATEMENT OF THE CASE Appellants appeal under 35 U.S.C. § 134(a) from a Final Rejection of claims 1-28. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. A. INVENTION Appellants’ invention relates to executing kernel work and non-kernel work concurrently in an operating system with single-threaded kernel (Spec. 1, ¶ [0002]). B. ILLUSTRATIVE CLAIM Claim 1 is exemplary: 1. A method of performing single-threaded kernel work in an operating system of a computer device, the method comprising: intermittently suspending execution of a single-threaded kernel work; and executing at least part of one or more processes when execution of the single-threaded kernel work is suspended. C. REJECTION The prior art relied upon by the Examiner in rejecting the claims on appeal is: Browning US 6,732,138 Bl May 04, 2004 (filed Jul. 26, 1995) Fletcher US 5,012,409 Apr. 30, 1991 Jeffay et al, “Proportional share scheduling of operating system services for real-time applications,” The 19th IEEE Real-Time Systems Symposium, 480-491(repaginated herein as 1-12) (1998). Appeal 2009-015331 Application 10/431,556 3 Claims 1, 2, 7-10, 13-16, 21-24, 27, and 28 stand rejected under 35 U.S.C. § 102(b) as being anticipated by Jeffay. Claims 4-6, and 18-20 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Jeffay in view of Browning. Claims 3, 11, 12, 17, 25, and 26 stand rejected under 35 U.S.C. § 103(a) as being unpatentable overy Jeffay in view of Fletcher. II. ISSUE The dispositive issue before us is whether the Examiner has erred in finding that Jeffay discloses “intermittently suspending execution of a single-threaded kernel work” (claim 1 (emphasis added)). III. FINDINGS OF FACT The following Findings of Fact (FF) are shown by a preponderance of the evidence. Jeffay 1. Jeffay discloses a monolithic, single-threaded operating system kernel that allows proportional share execution of network packets and protocol processing (Section 1, p. 2). 2. Processing within each layer is controlled by events external to the kernel such as hardware interrupts from the network interface or software interrupts from user processes making system calls to receive network messages (Section 4.1, p. 4). 3. Interrupts from the network interface device are serviced by a device-specific interrupt handler that is executed at a high priority level (splimp) that preempts all other network-related processing; software Appeal 2009-015331 Application 10/431,556 4 interrupt with an intermediate priority level (splnet) will cause the protocol layer to be executed when no higher priority hardware or software activities are pending; and lower priority level (spl0) is used for all normal kernel processing when no higher priority interrupts are pending (Fig. 1; Section 4.1, pp. 4-5). IV. ANALYSIS Claims 1, 2, 7-10, 13-16, 21-24, 27, and 28 Appellants contend that “Jeffay does not disclose a system that intermittently suspends execution of single-threaded kernel work” because “Jeffay does not address the possibility of suspending a kernel activity after the kernel activity has been dispatched” (App. Br. 7). However, the Examiner finds that, in Jeffay, “only one thread or task can only execute at any given point in time” and “it is clear that all executing processes are suspended during their execution in order to allow other processes share of the resources” (Ans. 10). Jeffay discloses performing single-threaded kernel work (FF 1). Furthermore, Jeffay also discloses that, in scheduling of Operating System Activities, processing within each layer is controlled by hardware and software interrupts (FF 2-3). In fact, even Appellants concede that “the cited portion of Jeffay … addresses interrupts” (App. Br. 12). We find an “interrupt” to comprise suspending the current execution, proceeding to process the interrupt, and when the interrupt has been processed, resuming the suspended execution. That is, when interrupts are received during the execution of a kernel work, the execution of the work is suspended and the interrupting processes are executed during the suspension of the work. As Appeal 2009-015331 Application 10/431,556 5 the Examiner finds, “executing processes are suspended during their execution in order to allow other processes share of the resources” (Ans. 10). Thus, we find that “intermittently suspending execution of a single-threaded kernel work” (claim 1) reads on Jeffay’s intermittent interrupt processing. Accordingly, we find that Appellants have not shown that the Examiner erred in rejecting claim 1 over Jeffay. Appellants do not provide arguments for independent claims 9, 15, and 23 separate from those of claim 1 (App. Br. 11). Accordingly, independent claims 9, 15, and 23 and claims 7, 8, 10, 13, 14, 21, 22, 24, 27, and 28 depending respectively from claims 1, 9, 15, and 23 fall with claim 1. As for claims 2 and 16, although Appellants concede that Jeffay “addresses interrupts” (App. Br. 12), Appellants contend that “there is no disclosure of interrupts occurring, or being handled, when execution of a single-threaded kernel work is suspended” (id.). However, as discussed above with respect to claim 1, we find Jeffay to disclose execution of a single-threaded kernel work (FF 1) and receiving of interrupts during the execution of the work (FF 2-3). As discussed, we find that, when interrupts are received during the execution of a kernel work, the execution of the work is suspended and the interrupting processes are executed during the suspension of the work. Further, interrupts are handled by an interrupt handler (FF 3). Thus, contrary to Appellants’ contentions, there is teaching in Jeffay of interrupts being “handled.” Claims 4-6, and 18-20 As for claims 4-6 and 18-20, Appellants contend that “Browning is directed to multithreaded operation” and “Jeffay teaches away from using Appeal 2009-015331 Application 10/431,556 6 multi-threaded implementations” (App. Br. 13). However, the Examiner finds that “Browning teaches allowing kernel processing to occur as a user level task” and concludes that “[i]t would have been obvious based on the teachings of Browning that the kernel process in Jeffay can execute in the user level” (Ans. 13-14). We find no error in the Examiner’s findings and conclusion. In particular, Appellants appear to have viewed the references from a different perspective than the Examiner. The issue here is not whether Jeffay’s system for single-thread kernel work would have implemented multi- threaded operations, but rather whether a person of ordinary skill, upon reading Browning, would be discouraged from processing Jeffay’s kernel at the user level. We find that the skilled artisan would have found it obvious to process Jeffay’s kernel at the user level as taught by Browning. The skilled artisan would “be able to fit the teachings of multiple patents together like pieces of a puzzle” since the skilled artisan is “a person of ordinary creativity, not an automaton.” KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 419-21 (2007). That is, we find no teaching in Jeffay that “criticize, discredit, or otherwise discourage” processing kernels at the user level. In re Fulton, 391 F.3d 1195, 1201 (Fed. Cir. 2004). Accordingly, we find that Appellants also have not shown that the Examiner erred in rejecting claims 4-6 and 18-20 over Jeffay in view of Browning. Claims 3, 11, 12, 17, 25, and 26 Appellants do not provide arguments for claims 3, 11, 12, 17, 25, and 26 separate from claims 1, 9, 15, and 23 from which they respectively Appeal 2009-015331 Application 10/431,556 7 depend (App. Br. 14). As discussed above, we find no error with respect to the rejection of claims 1, 9, 15, and 23 over Jeffay. Accordingly, we also affirm the rejection of claims 3, 11, 12, 17, 25, and 26 over Jeffay in further view of Fletcher. V. CONCLUSION AND DECISION The Examiner’s rejection of claims 1, 2, 7-10, 13-16, 21-24, 27, and 28 under 35 U.S.C. § 102(b) and of claims 3-6, 11, 12, 17-20, 25, and 26 under 35 U.S.C. § 103(a) is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED peb Copy with citationCopy as parenthetical citation