Ex Parte Hurd

Board of Patent Appeals and Interferences

Sep 14, 2011

11074451 (B.P.A.I. Sep. 14, 2011)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte KEVIN ALTAIR HURD
____________

Appeal 2009-008096
Application 11/074,451
Technology Center 2100
____________

Before JOSEPH L. DIXON, LANCE LEONARD BARRY, and
JEAN R. HOMERE, Administrative Patent Judges.

BARRY, Administrative Patent Judge.

DECISION ON APPEAL

STATEMENT OF THE CASE
The Patent Examiner rejected claims 1-25. The Appellant appeals
therefrom under 35 U.S.C. § 134(a). We have jurisdiction under 35 U.S.C.
§ 6(b).

Appeal 2009-008096
Application 11/074,451

2
INVENTION
The Appellant describe the invention at issue on appeal as follows.
[S]ystems and methods . . . control[ ] instruction
throughput. The system and methods determine a difference
value between a target instructions per clock cycle setting and
actual instructions per clock cycle for a plurality of clock
cycles. A plurality of difference values are employed to
provide an average difference value that is used to adjust
instruction throughput.
(Spec. ¶ 0008.)

ILLUSTRATIVE CLAIM
1. A system for controlling instruction throughput of a
processor, the system comprising:
a comparator that determines a difference value in an
actual instructions per clock cycle throughput and a target
instructions per clock cycle throughput setting; and
a throttle control that sums a plurality of difference
values to determine an average difference value over a plurality
of clock cycles and adjusts the actual instructions per clock
cycle throughput based on the average difference value.

REJECTIONS
Claims 1-8,11-15,17-18,20-23, and 25 stand rejected under 35 U.S.C.
§103(a) as being unpatentable over U.S. Patent No. 6,931,559 B2 ("Burns")
and U.S. Patent No. 6,826,704 B1 ("Pickett").
Claims 9-10, 16, 19, and 24 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over Burns; Picket; and U.S. Patent No. 5,719,800
("Mittal").

Appeal 2009-008096
Application 11/074,451

3
DISCUSSION
The issue before us is whether the Examiner erred in concluding that
it would have been obvious to have modified the teachings of Burns to
determine a difference value in an actual instructions per clock cycle
throughput and a target instructions per clock cycle throughput setting, as
required by independent claims 1, 11, 17, and 21.
"In rejecting claims under 35 U.S.C. § 103, the examiner bears the
initial burden of presenting a prima facie case of obviousness." In re
Rijckaert, 9 F.3d 1531, 1532 (Fed. Cir. 1993) (citing In re Oetiker, 977 F.2d
1443, 1445 (Fed. Cir. 1992)). The question of obviousness is "based on
underlying factual determinations including . . . what th[e] prior art teaches
explicitly and inherently . . . ." In re Zurko, 258 F.3d 1379, 1383 (Fed. Cir.
2001) (citations omitted).
Here, Burns describes its invention as follows.
The present invention provides a mechanism for
controlling the power dissipation of a processor using multiple
power control modes. A computer system includes a processor
having a digital throttle. The digital throttle monitors the
activity of the processor to estimate the processor's power state.
The digital throttle triggers one of the multiple power control
modes, if warranted by the estimated power state.
(Col. 2, l. 63 – col. 3, l. 3.)
The Examiner admits that "Burns fail[s] to teach a comparator that
determines a difference value in an actual instructions per clock cycle
throughput and a target instructions per clock cycle throughput setting."
(Ans. 4.) He turns to Pickett, finding that it "disclose[s] a comparator that
determines a difference value in an actual instructions per clock cycle
throughput and a target instructions per clock cycle throughput setting . . .
Appeal 2009-008096
Application 11/074,451

4
(Pickett: Figure 3 elements 50 and 51, column 14 lines 63-67 continued to
column 15 lines 1-34) . . . ." (Id.) We agree with the Appellant, however,
that these parts of "Pickett do[ ] not teach or suggest a comparison of actual
instructions and target instructions such as to determine a difference value,
but instead discloses issuing a number of instructions equal to a
predetermined value." (Appeal Br. 13.) The disclosure relied on by the
Examiner follows in pertinent part.
[T]he programmable registers/counters unit 51 of power
management control unit 50 may be programmed through
software such that instruction dispatcher 52, rather than
dispatching instructions at the normal maximum dispatch rate
of three instructions per cycle (in this particular embodiment),
dispatches instructions at a rate of only two instructions per
cycle or at a rate of only one instruction per cycle, depending
upon a value stored within programmable registers/counters
unit 51.
(Pickett, col. 15, ll. 3-12.) For our part, we are uncertain what value(s), if
any, Pickett uses to determine whether to dispatch instructions at a lowered
rate.
The Examiner then returns to Burns. We find that the reference's
aforementioned "[p]rocessor 110 includes multiple units 124, which form an
instruction execution pipeline 120." (Col. 3, ll. 46-47.) The Examiner finds
that "Burns compares power consumption of the execution units through
weight values at gate units . . . ." (Ans. 4.) He then offers the following
findings and conclusions.
Burns doesn't disclose if the weight values among execution
units are static or dynamic. If the values are static, then each
instruction executed causes a static value to be added within
element 434, which then is essentially comparing an actual
number of instructions executed to a target number of
Appeal 2009-008096
Application 11/074,451

5
instructions executed. If the values are dynamic, then the
maximum number of instructions that are executed is also
dynamic due to the fact that individual instruction weight
values are different. One of ordinary skill in the art would
realize that the dynamic approach would require additional
complexity to determine a proper weight for all types of
instructions executed. Such additional complexity would
require storing the dynamic values for instructions in memory
and accessing them each cycle for each execution unit. This
dynamic method would require additional power consumption
to implement. Thus, one of ordinary skill in the art would have
been motivated to use the simpler approach of limiting
instruction throughput for the advantage of reducing
complexity, cost, and further reducing power consumption.
Thus, it would have been obvious to one of ordinary skill in the
art at the time of the invention to implement Pickett's method of
limiting instruction throughput by using a simple weighting
approach on the processor of Burns for the advantages of
reduced costs and power savings from a much simpler
approach.
(Id. at 5.)
A proposed modification to a reference should not change the basic
principles of operation of the reference. In re Ratti, 270 F.2d 810, 813
(CCPA 1959).
Here, we agree with the Appellant that "Burns discloses that the
purpose of the weighting of the active units is to account for the different
execution resources of the units in monitoring the power of the units (Burns,
col. 5, ll. 7-9 and 15-17; col. 5, 1l. 40-42)." (Reply Br. 4.) More
specifically, a "first weight represents the current or power drawn by
unit 124 when it is activated" (Burns, col. 5, ll. 36-37), and a "second weight
represents the current or power drawn by unit 124 when it is deactivated."
(Id.at ll. 39-40.) Consequently, we agree with the Appellant that "if all of
Appeal 2009-008096
Application 11/074,451

6
the weights of the active units taught by Burns were equal static values, as
proposed by the Examiner, then the different execution resources taught by
Burns could not be accounted for." (Reply Br. 4.) In other words, the
proposed modification "would require a substantial reconstruction and
redesign of the elements shown in [Burns] as well as a change in the basic
principles under which the [reference] was designed to operate." Ratti,
270 F.2d at 813.
The Examiner does not allege, let alone show, that the addition of
Mittal cures the aforementioned deficiency of Burns and Pickett. Therefore,
we conclude that the Examiner erred in concluding that it would have been
obvious to have modified the teachings of Burns to determine a difference
value in an actual instructions per clock cycle throughput and a target
instructions per clock cycle throughput setting, as required by independent
claims 1, 11, 17, and 21.

DECISION
We reverse the rejection of claims 1, 11, 17, and 21 and those of
claims 2-10, 12-16, 18-20, and 22-25, which depend therefrom.

REVERSED

tkl