Ex Parte Hsiao et al

Patent Trial and Appeal Board

Aug 5, 2016

12619468 (P.T.A.B. Aug. 5, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
12/619,468 11/16/2009
43859 7590 08/09/2016
SLATER MATSIL, LLP
17950 PRESTON ROAD, SUITE 1000
DALLAS, TX 75252
FIRST NAMED INVENTOR
Ching-Wen Hsiao
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TSM09-0468 8654
EXAMINER
PIZARRO CRESPO, MARCOS D
ART UNIT PAPER NUMBER
2814
NOTIFICATION DATE DELIVERY MODE
08/09/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
docketing@slatermatsil.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte CHING-WEN HSIAO, JIUN YI WU, RU-YING
HUANG, and CHEN-SHIEN CHEN 1
Appeal2015-002167
Application 12/619,468
Technology Center 2800
Before BRADLEY R. GARRIS, ADRIENE LEPIANE HANLON, and
DEBRA L. DENNETT, Administrative Patent Judges.
DENNETT, Administrative Patent Judge.
DECISION ON APPEAL 2
1 Appellants state the real party in interest is Taiwan Semiconductor
Manufacturing Co., Ltd. App. Br. 3.
2 In this opinion we refer to the Final Action mailed February 21, 2014
("Final Act."); the Appeal Brief filed July 21, 2014 ("Br."); the Examiner's
Answer mailed September 25, 2014 ("Ans."), and the Reply Brief ("Reply")
filed November 25, 2014.
Appeal2015-002167
Application 12/619,468
STATEMENT OF CASE
Appellants appeal under 35 U.S.C. § 134 from a rejection of claims 1,
4--6, 9--11, and 23-27. We have jurisdiction under 35 U.S.C. § 6(b).
We affirm-in-part.
The claims are directed to an integrated circuit structure comprising a
first and second work piece and a solder layer between, wherein the first
work piece comprises an alloy layer over a barrier layer over a copper bump
over a semiconductor substrate, and the second work piece comprises a bond
pad. Claim 1, reproduced below, is illustrative of the claimed subject
matter:
1. An integrated circuit structure comprising:
a first work piece comprising:
a semiconductor substrate;
a copper bump over the semiconductor substrate;
a barrier layer over the copper bump; and
an alloy layer over the barrier layer, wherein the
alloy layer comprises palladium and a metal selected from the
group consisting essentially of copper, nickel, and combinations
thereof;
a second work piece comprising a bond pad; and
a solder layer between and adjoining the first work piece
and the second work piece, wherein the alloy layer is between
the barrier layer and the solder layer, with opposite surfaces of
the alloy layer contacting the barrier layer and the solder layer,
wherein the solder layer electrically connects the copper bump
to the bond pad, and wherein the solder layer comprises
palladium-rich grains distributed in the solder layer.
App. Br. 14 (Claims App'x).
2
Appeal2015-002167
Application 12/619,468
REFERENCES
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Petit et al.,
("Petit")
Watanabe et al.,
("Watanabe")
Lu et al.,
("Lu")
US 6,399,475 Bl
US 6,614,113 B2
US 7,361,990 B2
REJECTIONS
June 4, 2002
Sept. 2, 2003
Apr. 22, 2008
The claims stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over the combination of Lu, Petit, and Watanabe. Final Act. 3.
OPINION
Claims 1, 4---6, 9--11, and 23-27 are argued as a group, thus will stand
or fall together with the exception of claim 4 as subsequently explained.
App. Br. 8; see also 37 C.F.R. § 41.37(c)(l)(iv). Appellants also separately
argue patentability of claim 4 over Petit. Id. at 10.
The Examiner finds that Lu teaches most aspects of the claimed
invention. Final Act. 3. Referring to the Figures 1-3 of Lu, the Examiner
specifies that Lu shows: (a) a first work piece comprising a semiconductor
substrate (2) and a copper bump (contact pad 6 of Lu); (b) an alloy layer
(under bump metallurgy (UBM) 8 of Lu) comprising palladium and a metal
selected form the group consisting essentially of copper or nickel; ( c) a
second work piece comprising a package substrate (12) and a copper bond
pad (bump pad 16 of Lu); (d) a solder layer (10) between the two work
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Appeal2015-002167
Application 12/619,468
pieces and establishing electrical contact between the copper bump (contact
pad 6 of Lu) and bond pad (bump pad 16 of Lu) and in contact with the alloy
layer (UBM 8 of Lu); and (e) a barrier layer (protecting layer 18 of Lu)
between the bond pad (bump pad 16 of Lu) and the solder layer (10). Final
Act. 3. Figures 1 and 2 of Lu are reproduced below:
Fig. 1 of Lu
4
Figure 1 of Lu illustrates a semiconductor substrate (2) having a solder
bump (10).
Fig. 2 of Lu
Figure 2 of Lu illustrates a package substrate (12).
In claim 1, a semiconductor substrate (e.g., Lu Figure 1) is flipped
upside down and soldered to a package substrate (e.g., Lu Figure 2). This
arrangement is shown in Figure 2 of the claimed invention below:
Fig. 2 of the
CLAIMED
INVENTION
Appeal2015-002167
Application 12/619,468
Figure 2 of the invention illustrates the bonding of a semiconductor chip
comprising a copper bump and a palladium layer over the copper bump and
a package substrate comprising a bond pad with a solder ball thereon.
Appellants dispute the Examiner's finding that contact pad 6 of Lu is
the copper bump of the claimed invention. App. Br. 9. Appellants contend
that contact pad 6 of Lu is not a bump according to the commonly accepted
meaning of "bump," which Appellants define in their brief as "a small area
raised above the level of the surrounding surface." Id. (citing
dictionary.reference.com for the definition). Appellants argue that, when
viewed upside down, Lu's contact pad 6 is embedded under, and does not
project above, the surface of layer 4 (the passivation layer), thus Lu does not
support rejection of claim 1. Id. at 10.
The Examiner responds that Figure 1 of Lu (shown above) clearly
shows bump 6 raised above the surface of (semiconductor) substrate 2. Ans.
5. We agree. Feature 6 of Lu is between UBM 8 and portions of passivation
layer 4 and semiconductor substrate 2 in Figure 1. However, it is "raised
above" the surface of the semiconductor substrate 2 (viewed from any
angle), which is all that is required by Appellants' definition. See Lu Fig. 1.
Appellants' argument is based on semantics and does not address the content
of the rejection, which defines the claims based on the broadest reasonable
interpretation. See Cuozzo Speed Tech., LLCv. Lee, 136 S.Ct. 2131, 2146
(2016). Appellants have not shown the Examiner erred in finding Lu
discloses a copper bump as required by the claims.
The Examiner acknowledges that Lu does not teach a barrier layer
(36) over a copper bump (34) and in contact with the alloy layer (38) of the
first work piece as recited in claim 1, or the solder layer (130) comprising
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Appeal2015-002167
Application 12/619,468
palladium-rich grains distributed such that the palladium weight percentages
gradually reduce from a surface of said solder ball to its center as recited in
dependent claim 4. 3 Final Act. 3.
Appellants urge that protection layer 18 of Lu cannot be the barrier
layer required in the first work piece of the claims. App. Br. 10.
Importantly, the Examiner does not find that it is. The Final Action recites
that what it calls "barrier layer 18" is between the bond pad and the solder
layer. Final Act. 3. The Examiner does not find that "barrier layer 18" is
the required barrier layer between the copper bump and the alloy layer;
rather, the Examiner specifically states that Lu does not show this latter
feature. Id. (stating "Lu []does not show a barrier layer over the copper
bump and in contact with the alloy layer of the first work piece"). Thus,
Appellants' argument that Lu does not disclose the barrier layer is of no
moment.
The Examiner turns to Watanabe to teach forming a barrier layer
(second conductive metal layer 32 of Watanabe) between a conductive bump
(electrode 5 of Watanabe) and an alloy layer (third conductive metal layer
33A of Watanabe), as in the first work piece of claim 1. Final Act. 4. This
is illustrated in Figure 3 of Watanabe, shown below:
3 The Final Action also states that Lu does not show a palladium layer
between the bond pad and barrier layer of the second work piece, and the
first work piece comprising a package substrate, and the specific weight
percentages of palladium. Final Act. 3. However, these elements are in
dependent claims that are not addressed by Appellants, thus are not further
considered here.
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Appeal2015-002167
Application 12/619,468
~-'~-- 4 //- y
/ \ 23A Fig. 3 of Watanabe
I \/
I -'"'/l i // •,- 33.t\ ·1
\ 1/ /i 30.11.
3~;:_~2j l
r:- -~/==t~:J-\ 6
L ,/ .._ ~
~ n-nni~ )\ "
5 l 2
7
Figure 3 of Watanabe shows a barrier metal structure of an electrode pad
provided on a semiconductor device.
The Examiner concludes that it would have been obvious to form
these layers of Watanabe in the device of Lu to ensure good adherence with
the bump and realize resistance to oxidation. Final Act. 4 (citing Watanabe
col. 5, 11. 1-10).
In the Appeal Brief, Appellants fail to address the Examiner's
rejection based on Watanabe disclosing the claimed barrier layer. The
entirety of Appellants' discussion of the rejection of claim 1 over Watanabe
is limited to "the office action interpreted Lu incorrectly. Petit and
Watanabe fail to cure the deficiency in Lu and Watanabe."
Appellants' disagreement with the Examiner's reason for combining
the references, without more, is insufficient to establish reversible error in
this regard. KSR Int'! Co. v. Teleflex, Inc., 550 U.S. 398, 420 (2007)
(explaining that any need or problem known in the art can provide a reason
for combining the elements in the manner claimed); cf also SmithKline
Beecham Corp. v. Apotex Corp., 439 F.3d 1312, 1320 (Fed. Cir. 2006)
("[M]ere statements of disagreement ... as to the existence of factual
disputes do not amount to a developed argument.").
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Appeal2015-002167
Application 12/619,468
Appellants waited until the Reply Brief to address the clearly
articulated rejection over Watanabe found in the Final Action. Reply 5---6.
Appellants thus waived these arguments. 3 7 C.F .R. § 41.41 (b )(2) ("Any
argument raised in the reply brief which was not raised in the appeal briet~ or
is not responsive to an argument raised in the examiner's answer, including
any designated new ground of rejection, will not be considered by the Board
for purposes of the present appeal, unless good cause is sho\vn.").
Appellants had full opportunity to address the Examiner's Final Action
rejection of the claims over \Vatanabe, and failed to do so. Thus, we do not
address the merits of Appellants' Reply Brief arguments regarding the
combination of Lu and \Vatanabe in this opinion.
The Examiner urges that Petit teaches solder comprising palladium-
rich grains, that the palladium-rich grains are distributed in the solder ball
such that the palladium weight percentages gradually reduce from a surface
of said solder ball to its center, and the specific weight percentages claimed.
Final Act. 3 (citing Petit Fig. 2, col. 3, 11. 38-56).
Appellants dispute the applicability of Petit only specifically to
dependent claim 4, pointing to Petit's disclosure that "when soldering the
solder drop 5, the metal layer 4 of gold (Au) or palladium (Pd) diffuses or
dissolves in the volume of the metal drop 5 and disappears." App. Br. 11
(quoting Petit col. 3, 11. 11-13 ). Appellants contend that the solder ball in
Petit has to be reflowed again in order to join the first and second work
pieces of Lu together and the effect of this additional reflow is not taught by
Petit or the other applied references. Id. Thus, Appellants argue that it
cannot be concluded that after the additional reflow, the resulting package
still has the property required by claim 4 of "wherein the palladium-rich
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Appeal2015-002167
Application 12/619,468
grains are distributed from a surface region of the solder layer to a center of
the solder layer, wherein from the surface region to the center, palladium
weight percentages reduce gradually." Id.
We find Appellants have the better argument regarding Petit, as
nothing in Petit suggests any kind of gradual reduction in weight percentages
of palladium from the surface region of the solder ball to the center. In fact,
Petit teaches that any tin-palladium particles that remain in the solder drop
will form deposits, shown in Figure 2 of Petit as collecting on the surface of
the first metal layer. Petit col. 3, 11. 38--43, fig. 2.
On this record, the Examiner has not identified adequate facts to
support prima facie obviousness of claim 4 over the disclosures in Petit.
DECISION
For the reasons above, the Examiner's rejection of claims 1, 5, 6, 9--
11, and 23-27 is AFFIIUvfED. The Examiner's rejection of claim 4 is
REVERSED.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED-IN-PART
9