Ex Parte Houston et al

Patent Trial and Appeal Board

May 10, 2016

13478839 (P.T.A.B. May. 10, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/478,839 05/23/2012
23494 7590 05/12/2016
TEXAS INSTRUMENTS IN CORPORA TED
P 0 BOX 655474, MIS 3999
DALLAS, TX 75265
FIRST NAMED INVENTOR
Theodore W. Houston
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TI-36169.2 1045
EXAMINER
DIAZ,JOSER
ART UNIT PAPER NUMBER
2815
NOTIFICATION DATE DELIVERY MODE
05/12/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
uspto@ti.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte THEODORE W. HOUSTON, SHYH-HORNG YANG, and
KAYVANSADRA
Appeal2015-000332
Application 13/478,839
Technology Center 2800
Before JESSICA C. KAISER, SHARON PENICK, and JOHN R. KENNY,
Administrative Patent Judges.
KAISER, Administrative Patent Judge.
DECISION ON APPEAL
Appellants 1 appeal under 35 U.S.C. § 134(a) from the Examiner's
final rejection of claims 1--4, all of the claims pending in this application.
We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
1 According to Appellants, the real party in interest is Texas Instruments
Incorporated. (Br. 3.)
Appeal2015-000332
Application 13/478,839
EXEMPLARY CLAIM
Claim 1 is exemplary and is reproduced below:
1. An SRAM memory cell, comprising:
a storage node of the SRAM memory cell;
a bitline node of the SRAM memory cell; and
an asymmetrical access transistor connected between the
storage node and bitline node of the SRAM memory cell,
wherein the asymmetrical access transistor has a first threshold
voltage when said storage node is positive with respect to the
bitline node and said asymmetrical access transistor has a
second threshold voltage of greater magnitude than the first
threshold voltage when the storage node is negative with
respect to the bitline node.
REJECTION
The Examiner has rejected claims 1--4 under 35 U.S.C. § 103(a) as
being unpatentable over Lien (US 5, 790,452; issued Aug. 4, 1998) and
\Vang (US 6,566,204 Bl; issued ~v1ay 20, 2003). (Final Act. 2-5.)
ANALYSIS
We have reviewed the Examiner's rejections in light of Appellants'
arguments that the Examiner has erred. We disagree with Appellants'
conclusions. In so far as they relate to issues raised in this appeal, we adopt
as our own the findings and reasons set forth by the Examiner in the Final
Action from which the appeal is taken and the reasons set forth in the
Examiner's Answer in response to Appellants' Appeal Brief (see Ans. 5-
12). We highlight and address specific findings and arguments for emphasis
as follows.
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Application 13/478,839
Claim 1
Appellants argue the Examiner errs in finding Lien or Wang teaches
"an asymmetrical access transistor having a first threshold voltage when the
storage node is positive with respect to the bitline node and a second
threshold voltage of greater magnitude than the first threshold voltage when
the storage node is negative with respect to the bitline node," as recited in
claim 1. (Br. 7-8.) We are not persuaded of Examiner error.
The Examiner finds, and we agree, that Lien teaches the asymmetrical
access transistor recited in claim 1. (Ans. 7 (citing Lien Fig. 3, 4:22-30).)
Figure 3 of Lien is reproduced below.
11 '
"'"""'""""-----t""""""""'"''"""'·---------------
\
1
Figure 3 depicts a cross-sectional view of asymmetrical transistor 202. Lien
teaches that region 3 is connected to the bitline, and region 2/4 is connected
to the storage node. (Lien 4:33-36, Fig. 2.) Lien further teaches that
asymmetrical transistor 202 has a threshold voltage of 0.5 volts when region
4 is biased as the source of the transistor (i.e., when the storage node is
positive with respect to the bitline node), and has a threshold voltage of 0. 7
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Application 13/478,839
volts when region 3 is biased as the source of the transistor (i.e., when the
storage node is negative with respect to the bitline node). (Id. at 4:22-36,
Fig. 3.) Therefore, we agree with the Examiner (Ans. 7) that Lien teaches an
asymmetrical access transistor having "a first threshold voltage when the
storage node is positive with respect to the bitline node" (i.e., 0.5 volts when
the storage node is biased as the source) and "a second threshold voltage of
greater magnitude than the first threshold voltage when the storage node is
negative with respect to the bitline node" (i.e., 0.7 volts when the bitline is
biased as the source). Appellants have not persuasively responded to the
Examiner's findings regarding these teachings in Lien. (See Br. 7-8.)
Appellants further argue that Wang and Lien teach away "by teaching
the opposite halo structure," and that Wang teaches away because its device
has a permanent source and drain. (Br. 8-10.) We disagree. To teach away,
a reference must actually "criticize, discredit, or otherwise discourage"
investigation into the claimed solution. In re Fulton, 391 F.3d 1195, 1201
(Fed. Cir. 2004). We observe that claim 1 does not require any particular
halo (or pocket implant) region. Thus, Appellants' alleged teaching away
based on halo structure is not commensurate in scope with claim 1. In
addition, Appellants have not persuasively shown that merely describing one
type of halo structure or device configuration criticizes, discredits, or
discourages investigation into any other type of halo structure or device
configuration.
Appellants argue Lien is not analogous art. 2 (Br. 10.) The Examiner
finds Lien is analogous art because it is in the same field of endeavor as
2 To the extent Appellants intended to argue Wang is not analogous art, we
are unpersuaded for similar reasons.
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Application 13/478,839
Appellants' invention. (Final Act. 4; see also Ans. 9-10.) We agree with
the Examiner and also observe that Appellants' Specification expressly
discusses Lien and Wang and incorporates both by reference. (Spec. i-fi-1 5-
8.)
Appellants argue "a person of ordinary skill in the art would not
combine a unidirectional transistor (Wang et al.) with a bidirectional
transistor ([Lien])." (Br. 10.) In support, Appellants argue only that "[t]he
IGFET [('insulated-gate field-effect transistor')] taught by Wang et al.
cannot operate as a pass transistor." (Id.) The test for obviousness,
however, "is not whether the features of a secondary reference may be
bodily incorporated into the structure of the primary reference." In re
Keller, 642 F.2d 413, 425 (CCPA 1981). Rather, "if a technique has been
used to improve one device, and a person of ordinary skill in the art would
recognize that it would improve similar devices in the same way, using the
technique is obvious unless its actual application is beyond his or her skill."
KSR Int'! Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007). Appellants'
argument is unpersuasive because the Examiner does not rely on a bodily
incorporation of Wang's transistor in Lien, but rather "modifying the
pocke[t] region of Lien in view of Wang." (Ans. 10.)
For the reasons discussed above, we sustain the Examiner's§ 103
rejection of claim 1.
Claims 2--4
Claims 2--4 depend directly or indirectly from claim 1 and are
reproduced below.
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Application 13/478,839
2. The SRAM memory cell of claim 1, wherein a
difference between said second threshold voltage and said first
threshold voltage is approximately 1 OOm V.
3. The SRAM memory cell of claim 1, wherein the
asymmetrical access transistor includes a pocket implant region
on a storage node side.
4. The SRAM memory cell of claim 3, wherein said
asymmetrical access transistor comprises a source region and a
drain region of a first conductivity type and wherein said pocket
implant region is of a second conductivity type, opposite said
first conductivity type.
Regarding claim 2, Appellants argue "[Lien] teaches away from the
advantageously claimed invention by teaching that the difference between
the forward threshold voltage and the reverse threshold voltage is [OJ .2
volts." (Br. 12 (citing Lien 4:22-32).) We disagree because Appellants
have not shown that disclosing a certain voltage difference teaches away
from other voltage differences. In addition, the Examiner finds that
discovering the optimum range (e.g., 100 m V) would have involved only
routine skill. (Ans. 10-11; Final Act. 5.) Appellants have not persuasively
responded to this finding.
Regarding claim 3, Appellants argue that Lien teaches away "by
teaching that the pocket implant is on the bit line side." (Br. 13 (citing Lien
4:33-34, 38-39).) As discussed above, Appellants have not shown that Lien
teaches away. Appellants further argue that Wang "cannot teach a pocket
implant region on a storage node side because the IGFET of Wang et al. is a
unidirectional transistor (whereas, a transistor having a 'storage node side'
must be a bidirectional transistor)." (Id.) We find this argument
unpersuasive because it addresses Wang individually. Keller, 642 F.2d at
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Application 13/478,839
426 ("[O]ne cannot show non-obviousness by attacking references
individually where ... the rejections are based on combinations of
references.") (citation omitted). The Examiner finds that Lien (not Wang)
teaches the recited access transistor, and the Examiner relied on Wang as
teaching "the shape of [Wang's] pocket region (108) [was] known in the art
and that changing the shape of the pocket region in Lien yields nothing more
than predictable results to one of ordinary skill in the art." (Ans. 7-8, 11.)
Appellants' arguments do not persuasively address these findings.
Appellants' arguments regarding claim 4 are substantially similar to
their arguments regarding claim 3 (Br. 13-15), and we find them
unpersuasive for the reasons discussed above. In addition, we agree with the
Examiner's finding that Lien teaches "a source region and a drain region of a
first conductivity type" (i.e., in Lien Figure 3, regions 2/4 and 3 are N-type)
and "wherein said pocket implant region is of a second conductivity type,
opposite said first conductivity type" (i.e., in Lien Figure 3, pocket region 5
is P-type ). (Ans. 12.) Appellants' arguments do not persuasively address
this teaching or the Examiner's combination of Lien's and Wang's teachings
(Final Act. 4--5).
For the reasons discussed above, we sustain the Examiner's§ 103
rejections of claims 2--4.
DECISION
We affirm the Examiner's decision to reject claims 1--4 under 35
U.S.C. § 103(a).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
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Application 13/478,839
AFFIRMED
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