Ex Parte Hopper et al

Board of Patent Appeals and Interferences

Mar 17, 2004

10120116 (B.P.A.I. Mar. 17, 2004)

The opinion in support of the decision being entered today was not written
for publication and is not binding precedent of the Board.
Paper No. 19
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte DAWN M. HOPPER, MINH V. NGO, and MARK S. CHANG
____________
Appeal No. 2004-0660
Application No. 10/120,116
____________
ON BRIEF
____________
Before GARRIS, WARREN, and MOORE, Administrative Patent Judges.
GARRIS, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on an appeal from the final rejection of
claims 1-11. The only other claims remaining in the application,
which are claims 12-18, stand withdrawn from further consideration
by the Examiner.
The subject matter on appeal relates to a method for filling
isolation trenches during a semiconductor fabrication process by
depositing a silicon-rich liner onto the isolation trenches and
filling the isolation trenches with an oxide utilizing a biased
high density plasma deposition process. This appealed subject
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matter is adequately illustrated by independent claim 1 and
dependent claim 4 which read as follows:
1. A method for filling isolation trenches during a
semiconductor fabrication process comprising the steps of:
(a) depositing a silicon-rich liner onto the isolation
trenches; and
(b) filling the isolation trenches with an oxide utilizing a
biased high density plasma deposition process.
4. The method of claim 1, wherein step(a) further includes
the step of depositing a silicon-rich in-situ high density plasma
liner in a non-biased environment.
The references set forth below are relied upon by the Examiner
as evidence of obviousness:
Park et al. (Park) 6,326,282 B1 Dec. 4, 2001
Yew et al. (Yew) 6,228,742 B1 May 8, 2001
Fukumoto et al. (Fukumoto) 6,441,426 B1 Aug. 27, 2002
(filed Jun. 16, 1999)
Vossen “Thin Film Processes,” Academic Press, p. 54 (1978).
Wolf “Silicon Processing for the VSLI ERA,” Lattice Press, Vol. 1
pp. 171-173, 191-193 (1986).
Wolf “Silicon Processing for the VSLI ERA,” Lattice Press, Vol. 1,
Second edition , pp. 795-796 (2000).
Claims 4 and 10 stand rejected under the first paragraph of
35 U.S.C. § 112. The Examiner considers these claims to be not
enabled by the Appellants’ disclosure with respect to the here
claimed “non-biased” feature. Relying on prior art of record as
support for his position, the Examiner argues that “all plasma
Appeal No. 2004-0660
Application No. 10/120,116
3
deposition systems are biased” and that “[i]t is unclear what type
of plasma system is being used, or how a process that uses bias to
deposit material is non-biased [as required by rejected claims 4
and 10]” (answer, page 4).
Claims 1-3, 6, 8 and 9 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over Park in view of Yew and Vossen.
Claims 4, 5, 10 and 11 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over Park, Yew and Vossen, as applied above,
and further in view of Wolf.
Finally, claim 7 stands rejected under 35 U.S.C. § 103(a) as
being unpatentable over Park, Yew and Vossen, as applied above, and
further in view of Fukumoto.
On page 4 of the brief (also see page 2 of the reply brief),
the Appellants set forth the following claim groupings:
Claims 1, 2, 3, 6, 8-9 form a first group.
Claims 5 and 11 form a second group.
Claims 4, 7 and 10 should not be grouped
together and should be considered separately.
We refer to the brief and reply brief and to the answer for
a thorough discussion of the opposing viewpoints expressed by
the Appellants and by the Examiner concerning the above noted
rejections.
Appeal No. 2004-0660
Application No. 10/120,116
4
OPINION
For the reason which follow, we cannot sustain the Examiner’s
§ 112, first paragraph, rejection of claims 4 and 10 or his § 103
rejection of claims 4 and 10, but we will sustain the Examiner’s
§ 103 rejections of claims 1-3, 5-9 and 11.
In response to the § 112, first paragraph, rejection, the
Appellants have submitted a declaration (i.e., paper no. 13½, filed
with the brief on July 17, 2003) under 37 CFR § 1.132 by Dawn M.
Hopper. According to the Appellants, “as indicated in the
Declaration submitted herewith, a person of ordinary skill in
the art would recognize that a non-biased high density plasma
deposition process refers to not applying an external RF bias to
the wafer” (brief, page 6). Thus, the Appellants do not challenge
the Examiner’s reliance on the Vossen reference of record that
“substrates (even if they are grounded) are at a potential that is
negative with respect to the plasma” (page 54) vis-à-vis the
proposition that plasma deposition systems necessarily are biased.
Rather, it is the Appellants’ position that one having an ordinary
level of skill in the art would consider the “non-biased”
recitation in claims 4 and 10 as well as in the subject
specification as referring to “not applying an external RF bias
to the wafer” (brief, page 6).
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In the first full paragraph on page 9 of the answer, the
Examiner replies to the above noted argument in the following
manner:
The examiner is not rejecting the claims
because it is not known to deposit without an
external bias, but that depositing without a
bias in a plasma system that requires a bias to
create the plasma is contradictory. The
specification as originally presented does not
recite or teach without a bias as “not applying
an external bias to the wafer”. Further, even
if one were to accept that non-biased means no
external bias to the water, claim 4 clearly
recites “a non-biased environment.” This is
broader than referring to the wafer alone.
Claim 10 recites “a non-biased high density
plasma process.” This is also broader than
referring to the wafer alone. Adding this
meaning would change the scope of the invention
as originally presented.
Under the circumstances recounted above, it is apparent
that the pivotal question raised by the Examiner’s § 112, first
paragraph, rejection is whether the artisan would consider the
“non-biased” feature recited in claims 4 and 10 and disclosed in
the Appellants’ specification as referring to the circumstance of
“not applying an external RF bias to the wafer” (brief, page 6).
While the Examiner is correct that the subject specification
does not expressly teach this circumstance, the fundamental
consideration is not the presence or absence of an express
teaching in the specification but rather how the artisan would
Appeal No. 2004-0660
Application No. 10/120,116
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have interpreted the specification and claims. With respect to
this fundamental consideration, the § 1.132 declaration of record
by one skilled in this art constitutes probative evidence that
the artisan would interpret the “non-biased” feature under
consideration in the manner urged by the Appellants. Such an
interpretation would render the “non-biased” recitation of the
specification and claims meaningful as well as enabled and
operative. On the other hand, to regard “non-biased” as referring
to a complete absence of bias, as the Examiner seems to urge, would
be contradictory to what is known in the prior art (e.g., the
Vossen reference) and thus nonsensical to the artisan.
Viewed from this perspective, the record before us supports a
determination that the artisan would not interpret the Appellants’
claimed and disclosed invention in a manner which would render
it nonsensical, not enabled and inoperative but instead would
interpret the “non-biased” feature in question as referring to “not
applying an external RF bias to the wafer” (id.) in accordance with
the Appellants’ argument. As so interpreted, claims 4 and 10 would
not be subject to the Examiner’s enablement-based § 112, first
paragraph, rejection since, as indicated above, “[t]he examiner is
not rejecting the claims because it is not known to deposit without
an external bias” (answer, page 9). As for the Examiner’s above
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quoted point that the recitation in claims 4 and 10 is “broader
than referring to the wafer alone” (id.), this point relates to
breadth rather than to enablement vis-à-vis practicing the here
claimed invention by not applying an external RF bias to the wafer.
In light of the foregoing, we cannot sustain the Examiner’s
§ 112, first paragraph, rejection of claims 4 and 10.
Concerning the § 103 rejection of independent claims 1 and 8
(and of non argued dependent claims 2, 3, 6, and 9), the Examiner
correctly points out that Park discloses a method for filling
isolation trenches during semiconductor fabrication wherein
patentee “deposits a silicon-rich trench liner (114) of a thickness
between 30-[sic] and 200 angstroms” (answer, page 5; also see lines
32-43 in column 4 of Park). Patentee’s method also includes the
subsequent step of filling the isolation trench with an oxide
(e.g., see lines 53-65 in column 4). However, Park does not
identify the specific process by which this filling step is
achieved. As a consequence, the Appellants’ independent claims
distinguish over the Park reference by requiring that the filling
step be achieved via “a biased high density plasma deposition
process.”
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With respect to this distinction, the Examiner proffers the
Yew and Vossen references as evidence that it was known in this art
to provide isolation layers (i.e., to fill isolation trenches) via
a high density plasma deposition process (e.g., see the paragraph
bridging columns 2 and 3 of Yew) and that it was known in this art
to effect plasma deposition via a process which is biased (see page
54 of Vossen). Thus, it is the Examiner’s basic position that it
would have been obvious for one having an ordinary level of skill
in the art to effectuate the filling step of Park via a biased high
density plasma deposition process in view of Yew and Vossen. In
this manner, Park’s filling step would have been achieved by way of
a process evinced by Yew and Vossen to be known in the prior art as
effective for this purpose.
The Appellants argue that “[t]he Examiner does not provide any
objective motivation for modifying Park with Yew and Vossen to fill
the isolation trenches with an oxide utilizing a biased high
density plasma deposition process” (brief, page 8). This argument
lacks discernable merit. The motivation in question arises from
the simple fact that a specific process would have been required in
order for an artisan to practice Park’s filling step, and the Yew
and Vossen references evince that a biased high density plasma
deposition process of the type here claimed was recognized in the
Appeal No. 2004-0660
Application No. 10/120,116
1 It is axiomatic that admitted prior art described by an
Applicant may be used in determining the patentability of a
claimed invention (see In re Nomiya, 509 F.2d 566, 571-72, 184
USPQ 607, 611-12 (CCPA 1975)) and that consideration of the prior
art cited by the Examiner may include consideration of the
admitted prior art described by an Applicant (see In re Davis,
305 F.2d 501, 503, 134 USPQ 256, 258 (CCPA 1962); compare In re
Hedges, 783 F.2d 1038, 1039, 228 USPQ 685, 686 (Fed. Cir. 1986)).
9
prior art as effective for this purpose. To the extent that the
Appellants may dispute this last mentioned recognition, we
here emphasize that the admitted prior art descriptions by the
Appellants in their specification (see the paragraph bridging
pages 1 and 2, the paragraph bridging pages 4 and 5, the first full
paragraph on page 5 and the paragraph bridging pages 5 and 6), in
their drawing (see Figures 1A, 1B, 1C and 2) and in their brief
(see the first full paragraph on page 3) all reflect that a biased
high density plasma deposition process was known in the prior art
as an effective technique for filling isolation trenches with an
oxide.1
In further support of their position that the § 103 rejection
under review is improper, the Appellants advance the following
argument in the paragraph bridging pages 11 and 12 of the brief:
Yew teaches a first isolation layer
comprising silicon oxide to partially fill the
trenches and a second isolation formed on the
first isolation to fill completely the
Appeal No. 2004-0660
Application No. 10/120,116
10
trenches. However, by combining Park with Yew,
the nitride layer 114 in Park would be replaced
with a first isolation layer comprising silicon
oxide. Since an isolation layer of silicon
oxide would be formed on the thermal oxide
layer 112 in Park, oxidation of the trench
interior walls would not be prevented in the
subsequent oxidation process in Park. That is,
by combining Park with Yew, the principle of
operation in Park would change and subsequently
render the operation of Park to perform its
purpose unsatisfactory. Therefore, the Examiner
has not presented a prima facie case of
obviousness for rejecting claims 1-3, 6 and 8-
9.
As correctly noted by the Examiner, his rejection does not
propose combining Park with Yew in the aforequoted manner, and the
teachings of these references do not support such a combination.
Indeed, an artisan would have been discouraged from combining these
references in the manner discussed by the Appellants precisely
because the resulting combination would “render the operation of
Park to perform its purpose unsatisfactory” (id.).
In light of the foregoing, we will sustain the Examiner’s
§ 103 rejection of claims 1-3, 6, 8 and 9 as being unpatentable
over Park in view of Yew and Vossen.
We also will sustain the Examiner’s § 103 rejection of claims
5 and 11 as being unpatentable over Park in view of Yew and Vossen
and further in view of Wolf. Contrary to the Appellants’ apparent
belief, the artisan would have been motivated to deposit the
Appeal No. 2004-0660
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silicon-rich nitride liner of Park via a plasma enhanced chemical
vapor disposition process in view of Wolf’s clear teaching that
such a process was known in the prior art as an advantageous, low-
temperature technique by which to deposit a silicon nitride layer
(e.g., see the last full paragraph on page 171, the last paragraph
on page 191, and the paragraph bridging pages 192-193).
However, we cannot sustain the Examiner’s corresponding
§ 103 rejection of claims 4 and 10. This is because we find
nothing and the Examiner points to nothing in Wolf or in the other
applied references which would have suggested depositing the
silicon-rich nitride liner of Park in a non-biased manner as
required by these claims. In this regard, we observe that the
first full sentence on page 7 of the answer indicates that the
Examiner has ignored the “non-biased” limitation of claims 4 and
10. This is completely inappropriate. In formulating a § 103
rejection, all claim limitations must be considered (regardless of
whether or not they are supported by the specification). See In re
Wilson, 424 F.2d 1382, 1385, 165 USPQ 494, 496 (CCPA 1970) and
Ex parte Grasselli, 231 USPQ 393, 394 (Bd. App. 1983).
Finally, the § 103 rejection of claim 7 as being unpatentable
over Park in view of Yew and Vossen and further in view of Fukumoto
likewise will be sustained. As properly concluded by the Examiner,
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it would have been obvious for the artisan to practice the
isolation trench forming method of Park during fabrication of
semiconductor structure in the form of a flash memory array in view
of Fukumoto’s teaching that the formation of such trenches during
fabrication of a flash memory array was known in the prior art.
Again, the Appellants’ contrary viewpoint lacks discernable merit.
For example, their argument that an artisan would have combined the
teachings of Park and Fukumoto in such a way as to “render the
operation of Park to perform its purpose unsatisfactory” (brief,
page 19) is unconvincing for reasons analogous to those discussed
above (e.g., an artisan would have been discouraged from so
combining these reference teachings precisely because such a
combination would have rendered the operation of Park
unsatisfactory).
In summary: we have not sustained either the § 112, first
paragraph, rejection or the § 103 rejection of claims 4 and 10;
however, we have sustained each of the § 103 rejections of the
remaining claims on appeal.
The decision of the Examiner is affirmed-in-part.
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No time period for taking any subsequent action in connection
with this appeal may be extended under 37 CFR § 1.136(a).
AFFIRMED-IN-PART
BRADLEY R. GARRIS )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
CHARLES F. WARREN ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
JAMES T. MOORE )
Administrative Patent Judge )
BRG/jrg
Appeal No. 2004-0660
Application No. 10/120,116
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Kelly K. Kordzik
Winstead Sechrest & Minick P.C.
5400 Renaissance Tower
1201 Elm Street
Dallas, TX 75270