Ex Parte Hieda

Board of Patent Appeals and Interferences

Sep 25, 2007

10611229 (B.P.A.I. Sep. 25, 2007)

The opinion in support of the decision being entered today
is not binding precedent of the Board.

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte KATSUHIKO HIEDA
____________

Appeal 2007-3958
Application 10/611,229
Technology Center 2800
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Decided: September 25, 2007
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Before BRADLEY R. GARRIS, THOMAS A. WALTZ,
and JEFFREY T. SMITH, Administrative Patent Judges.

SMITH, Administrative Patent Judge.

DECISION ON APPEAL
Statement of the Case
This is an appeal under 35 U.S.C. § 134 from a final rejection of
claims 1-12.1 We have jurisdiction under 35 U.S.C. § 6.

1 Claims 13-15 have been withdrawn from consideration (Br. 5).
Appeal 2007-3958
Application 10/611,229

Appellant’s invention relates to an electrically erasable nonvolatile
semiconductor memory device. Representative independent claim 1, as
presented in the Brief, appears below:
1. An electrically erasable nonvolatile semiconductor memory device,
comprising:
a semiconductor substrate having a trench and first and second
projecting portions separated by the trench, each of the first and second
projecting portions having a first side surface and a second side surface
parallel to the first side surface, the first side surface of the first projecting
portion and the second side surface of the second projecting portion being
opposed to each other and defined by the trench;
first and second gate structures respectively formed on the first and
second projecting portions, each of the first and second gate structures
comprising a first insulating film formed on a corresponding one of the first
and second projecting portions, a first conductive film formed on the first
insulating film, a second insulating film formed on the first conductive film,
and a second conductive film formed on the second insulating film, the first
insulating film being formed of a tunnel insulating film, the first conductive
film storing a charge supplied from the semiconductor substrate through the
first insulating film, the second insulating film including a dielectric film
having a dielectric constant higher than that of the first insulating film;
each of the first and second gate structures having a first side surface
and a second side surface, the first side surface of the first gate structure and
the second side surface of the second gate structure being opposed to each
other, the first side surface of the first gate structure being aligned with the
first side surface of the first projecting portion and the second side surface of
the second gate structure being aligned with the second side surface of the
second projecting portion; and
a third insulating film including a first portion formed within the
trench and a second portion formed between the first side surface of the first
gate structure and the second side surface of the second gate structure.
The Examiner relies on the following references in rejecting the
appealed subject matter:
Sato JP 08-017948 Jan. 19, 1996
Gardner US 6,210,999 B1 Apr. 3, 2001
Kim US 6,475,857 B1 Nov. 5, 2002
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Appeal 2007-3958
Application 10/611,229

The Examiner made the following rejections:
Claims 1-10 and 12 stand rejected under 35 U.S.C. §103(a) as
unpatentable over Kim in view of Sato.2
Claim 11 stands rejected under 35 U.S.C. §103(a) as unpatentable
over Kim in view of Sato and Gardner.
We determine that the Examiner has established a prima facie case of
obviousness in view of the reference evidence, which prima facie case has
not been adequately rebutted by Appellant’s arguments. Therefore, we
AFFIRM the § 103 rejections presented in this appeal essentially for the
reasons stated in the record, as well as those reasons set forth below.
Under 35 U.S.C. § 103, the factual inquiry into obviousness requires a
determination of: (1) the scope and content of the prior art; (2) the
differences between the claimed subject matter and the prior art; (3) the level
of ordinary skill in the art; and (4) secondary considerations. Graham v.
John Deere Co., 383 U.S. 1, 17-18, 148 USPQ 459, 467 (1966). “[A]nalysis
[of whether the subject matter of a claim would have been obvious] need not
seek out precise teachings directed to the specific subject matter of the
challenged claim, for a court can take account of the inferences and creative
steps that a person of ordinary skill in the art would employ.” KSR Int’l Co.,
v. Teleflex, Inc., 127 S. Ct. 1727, 1741, 82 USPQ2d 1385, 1396 (2007)
(quoting In re Kahn, 441 F.3d 977, 988, 78 USPQ2d 1329, 1336 (Fed. Cir.
2006)). See DyStar Textilfarben GmbH & Co. Deutschland KG v. C.H.
Patrick Co., 464 F.3d 1356, 1361, 80 USPQ2d 1641, 1645 (Fed. Cir. 2006)
(“The motivation need not be found in the references sought to be combined,

2 We will refer to the English-language translation of the Sato document that
has been presented in the present record.
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Appeal 2007-3958
Application 10/611,229

but may be found in any number of sources, including common knowledge,
the prior art as a whole, or the nature of the problem itself.”); In re Bozek,
416 F.2d 1385, 1390, 163 USPQ 545, 549 (CCPA 1969) (“Having
established that this knowledge was in the art, the examiner could then
properly rely, as put forth by the solicitor, on a conclusion of obviousness
‘from common knowledge and common sense of the person of ordinary skill
in the art without any specific hint or suggestion in a particular reference.’”);
In re Hoeschele, 406 F.2d 1403, 1406-07, 160 USPQ 809, 811-12 (CCPA
1969) (“[I]t is proper to take into account not only specific teachings of the
references but also the inferences which one skilled in the art would
reasonably be expected to draw therefrom . . . .”). The analysis supporting
obviousness, however, should be made explicit and should “identify a reason
that would have prompted a person of ordinary skill in the art to combine the
elements” in the manner claimed. KSR, 127 S. Ct. at 1739, 82 USPQ2d at
1396.
Applying the preceding legal principles to the factual findings in the
record of this appeal, we determine that the Examiner has established a
prima facie case of obviousness as to claims 1-12.
The Examiner found that Kim teaches a semiconductor memory
device comprising all the features of the claim with the exception of
showing the sidewall of projection being vertical or the side surface of the
opposite projections being parallel to each other. Referring to FIG. 3(a) and
FIG. 3(b), Kim discloses the semiconductor substrate comprises a stack of
layers (16) formed on top of substrate (10) comprising a first conductive
layer (12) formed on the gate dielectric layer (11), a multiple tunnel junction
(MTJ) insulation barrier structure (13) formed on the a first conductive layer
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Appeal 2007-3958
Application 10/611,229

(12), and a second conductive layer (14) formed on the insulation barrier
structure (13) (Kim, col. 9, ll. 46-68). Kim discloses the gate dielectric layer
(11) can be formed from silicon oxide layer (Kim, col. 9, ll. 3-4). The
Examiner found that Sato discloses the trenches (11) of an electrically
erasable nonvolatile semiconductor memory device have vertical sidewalls.
The side surfaces of the opposing projecting portions are parallel to each
other. The Examiner concluded that it would have been obvious to a person
having ordinary skill in the art at the time of invention to form the trench of
Kim having vertical sidewalls as taught by Sato with the reasonable
expectation that there would not have been any adverse effect on the
functionality of the device (Answer 3-4).
Appellant has not argued that there is no suggestion or motivation to
combine the teachings of Kim and Sato.3 Rather, Appellant’s principal
argument is that Kim and Sato, even if combined, do not teach the claimed
invention because Kim fails to teach “a first conductive film formed on the
first insulating film,” as recited in claim 1 (Br. 10-12). In other words,
Appellant asserts that the dielectric layer (11) of Kim is not an insulating
layer as required by claim 1.
We do not find Appellant’s arguments persuasive. Kim discloses the
first conductive layer (12) is formed on the gate dielectric layer (11). Kim
discloses that the layer (11) can be formed from a silicon oxide layer. This
is the same material (silicon oxide) that has been described by the Appellant
as suitable for forming a gate insulation film (Specification 14:12-14).

3 Appellant also has not argued that there is no suggestion or motivation to
combine the teachings of Gardner with Kim and Sato. Rather, Appellant
states “[t]he disclosure of Gardner is insufficient to cure the above-discussed
deficiencies of Kim and Sato” (Br. 17).
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Appeal 2007-3958
Application 10/611,229

Appellant has not directed us to a special definition for “tunnel insulating
film” that would distinguish from the silicon oxide layer disclosed by Kim.
Appellant’s argument regarding the operating principle of the STTM
device of Kim is not persuasive (Br. 13-15). Kim discloses that the
reference to any x-axis or y-axis is meant to be interpreted in a directional
sense only. Specifically, Kim states:
Reference to a [sic, an] x-axis and a y-axis in conjunction
with a description of this invention is merely for establishing
relative direction of various components of the present STTM
memory cell array for purposes of ease of clarity and
comprehension for the reader of this description and not for any
other purpose. Reference to an x-axis and a y-axis in the
description of this invention is not to be interpreted as meaning
that the STTM of this invention actually requires any specific
x-axis or y-axis relative to any specific physical position on the
surface of the STTM, but instead is to be interpreted as
providing only direction, relative configuration and guidance as
to the various components of the STTM of the present
invention. Accordingly, the reference to any x-axis or y-axis is
meant to be interpreted in a directional sense only, i.e.,
horizontal versus vertical relative to a plane, and accordingly,
the reference thereof in the specification and the claims should
not be used to purposefully interpret the scope of the claims of
the present invention as requiring a particular x-axis or y-axis.
(Kim, col. 10, ll. 1-19). Thus, a person of ordinary skill in the art would
have reasonably expected that a charge could have been supplied from
Kim’s semiconductor substrate through the first dielectric layer (11) to the
first conductive layer (12).
Appellant has not referred to any secondary evidence to rebut the
prima facie case established by the Examiner. Accordingly, based on the
factual findings set forth in the Answer and above, we determine that the
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Appeal 2007-3958
Application 10/611,229

preponderance of evidence weighs most heavily in favor of obviousness
within the meaning of 35 U.S.C. § 103(a).

CONCLUSION
For the foregoing reasons and those stated in the present record, we
affirm the Examiner’s rejections of claims 1-12 under § 103(a).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).
AFFIRMED

clj

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