Ex Parte Hawk et al

Patent Trial and Appeal Board

Jun 30, 2015

11332040 (P.T.A.B. Jun. 30, 2015)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/332,040 01/13/2006 Donald E. Hawk JR. 8-2 6436
7590 07/01/2015
Ryan, Mason & Lewis, LLP
90 Forest Avenue
Locust Valley, NY 11560
EXAMINER
HO, HOANG QUAN TRAN
ART UNIT PAPER NUMBER
2818
MAIL DATE DELIVERY MODE
07/01/2015 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
_________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
__________

Ex parte DONALD E. HAWK, JR.
and JAMES C. PARKER
__________

Appeal 2013-009078
Application 11/332,040
Technology Center 2800
___________

Before ADRIENE LEPIANE HANLON, CATHERINE Q. TIMM, and
LORA M. GREEN, Administrative Patent Judges.

HANLON, Administrative Patent Judge.

DECISION ON APPEAL

A. STATEMENT OF THE CASE
The Appellants appeal under 35 U.S.C. § 134 from a final rejection of
claims 2‒9, 11, 14, and 16‒23. Claims 10, 12, and 15 are also pending but have
been withdrawn from consideration. We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.
Representative claim 4 is reproduced below from the Claims Appendix of
the Appeal Brief dated March 18, 2013 (“App. Br.”). The limitation at issue is
italicized.
4. An integrated circuit comprising:
Appeal 2013-009078
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a first substrate;
an integrated circuit die attached to the first substrate; and
a second substrate overlying at least a portion of the integrated
circuit die;
a first peripheral conductor of the first substrate being wire
bonded to a first conductor of the integrated circuit die;
the second substrate being an inactive substrate comprising at
least one conductor that is wire bonded to a second peripheral
conductor of the first substrate and electrically connected to a second
conductor of the integrated circuit die;
wherein the second substrate comprises a plurality of
conductors on an upper surface of the second substrate, a plurality of
conductors on a lower surface of the second substrate, and a plurality
of vias passing through the second substrate from its upper surface to
its lower surface, each of said vias providing an electrical connection
between one or more of the upper surface conductors of the second
substrate and one or more of the lower surface conductors of the
second substrate.
App. Br. 10 (emphasis added).
The claims on appeal stand rejected as follows:
(1) claims 3‒9, 11, 16, 17, and 19‒23 under 35 U.S.C. § 103(a) as
unpatentable over Kelly1 in view of Kikuma;2
(2) claim 2 under 35 U.S.C. § 103(a) as unpatentable over Kelly in view
of Kikuma, and further in view of Combs;3
(3) claim 14 under 35 U.S.C. § 103(a) as unpatentable over Kelly in view
of Kikuma, and further in view of Karnezos,4 Hoffman,5 and Combs; and

1 US 2005/0073054 A1, published April 7, 2005.
2 US 2004/0051119 A1, published March 18, 2004.
3 US 2003/0178719 A1, published September 25, 2003.
4 US 2004/0113275 A1, published June 17, 2004.
5 US 6,737,750 B1, issued May 18, 2004.
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(4) claim 18 under 35 U.S.C. § 103(a) as unpatentable over Kelly in view
of Kikuma, and further in view of “Applicant’s Admitted Prior Art”6 and Combs.
The rejections are sustained for the reasons set forth in the Final Office
Action dated October 15, 2012 and the Examiner’s Answer dated May 15, 2013
(“Ans.”). We add the following for emphasis.
B. DISCUSSION
The Examiner finds Kelly discloses an integrated circuit comprising first
substrate 12, integrated circuit die 14 attached to first substrate 12, and second
substrate 16 overlying at least a portion of integrated circuit die 14.7 Final 5.
Kelly Figure 1, reproduced below, is illustrative.

Kelly Fig. 1 is a side view of an integrated circuit.
The Examiner finds Kelly discloses that a first peripheral conductor of first
substrate 12 is wire bonded to a first conductor of integrated circuit die 14 (see
reference numeral 30 in Kelly Fig. 1). Final 5. The Examiner further finds that

6 Spec. 5, ll. 11‒12 (disclosing that plastic is a conventional encapsulating
material). See Final Office Action dated October 15, 2012 (“Final”), at 18.
7 Throughout this opinion we use the terms “first substrate,” “integrated circuit
die,” and “second substrate” as recited in claim 4 to refer to corresponding
components in Kelly and Kikuma.
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second substrate 16 is an inactive substrate comprising a plurality of conductors 26
disposed on a lower surface of the substrate. Final 5. According to paragraph 16
of Kelly:
The interconnection substrate 16 [i.e., second substrate 16] is flip chip
bonded to the semiconductor substrate 14 [i.e., integrated circuit die
14]. To this end, the interconnection substrate carries a plurality of
solder balls 26. . . . The interconnection substrate 16 includes at least
one conductive interconnect layer 28 formed on the substrate layer.
The plurality of solder balls 26 of the interconnection substrate may
be utilized to distribute power and ground throughout the
semiconductor substrate 14.
See Final 6 (citing Kelly ¶¶ 16, 26). Thus, Kelly suggests that second substrate 16
is electrically connected to integrated circuit die 14 as recited in claim 4.
The Examiner finds Kelly does not expressly disclose that at least one
conductor of second substrate 16 is wire bonded to a peripheral conductor of first
substrate 12. Final 5. Nonetheless, the Examiner finds that Kikuma Figure 3,
reproduced below, shows conductor 32d of second substrate 32 is wire bonded to
peripheral conductor 26c of first substrate 26 as recited in claim 4. Final 6.

Kikuma Fig. 3 is a sectional view of a part of
a stacked semiconductor device.
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The Appellants do not direct us to any error in the Examiner’s findings of
fact. Rather, the Appellants argue that semiconductor chip 22 (i.e., integrated
circuit die 22) of Kikuma cannot be wired bonded to printed circuit board 26 (i.e.,
first substrate 26) as recited in claim 4 because printed circuit board 32 (i.e.,
second substrate 32) is larger than semiconductor chip 22 (i.e., integrated circuit
die 22). App. Br. 7.
The Appellants’ argument is not persuasive of reversible error because the
Examiner relies on Kelly, not Kikuma, to show an integrated circuit die wire
bonded to a first substrate. See Final 5; Ans. 2.
The Appellants also argue that Kikuma discloses that second substrate 32
must be larger than integrated circuit dies 22 and 24 to prevent upper integrated
circuit die 24 from covering bond pads 32d. App. Br. 7; see also Reply Br. 4.8
Thus, according to the Appellants:
If one were to modify Kelly’s interconnection substrate 14 [sic, 16
(i.e., second substrate 16)] with the teachings of Kikuma’s printed
circuit board 32 [i.e., second substrate 32], it is clear that Kelly’s
modified interconnection substrate [i.e., second substrate] would have
to be larger than Kelly’s semiconductor substrate 14 [i.e., integrated
circuit die 14]. As such, the semiconductor substrate 14 [i.e.,
integrated circuit die 14] in Kelly, as modified by Kikuma, could not
be wire bonded to the package substrate 12 [i.e., first substrate 12].
Reply Br. 4.
This argument also is not persuasive of reversible error. As correctly
pointed out by the Examiner, “Kelly has no second chip ([i.e.,] integrated circuit
die [corresponding to upper integrated circuit die 24 in Kikuma]), therefore such
arguments as to why the printed circuit board ([i.e.,] second substrate [16 of
Kelly]) must be larger are moot.” Ans. 4.

8 Reply Brief dated July 15, 2013.
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C. DECISION
The decision of the Examiner is affirmed.
No time period for taking any subsequent action in connection with this
appeal may be extended under 37 C.F.R. § 1.136(a)(1).
AFFIRMED