Ex Parte HAN et al

Patent Trial and Appeal Board

Apr 17, 2018

14548691 (P.T.A.B. Apr. 17, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/548,691 11/20/2014
15055 7590 04/19/2018
Patterson & Sheridan, L.L.P.
Qualcomm
24 Greenway Plaza, Suite 1600
Houston, TX 77046
FIRST NAMED INVENTOR
YipingHAN
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
144447US 2002
EXAMINER
JIA,XIN
ART UNIT PAPER NUMBER
2649
NOTIFICATION DATE DELIVERY MODE
04/19/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
qualcomm@pattersonsheridan.com
P AIR_eOfficeAction@pattersonsheridan.com
ocpat_uspto@qualcomm.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte YIPING HAN, YUNG-CHUNG LO, and ZHANG JIN
Appeal2017-010482
Application 14/548,691 1
Technology Center 2600
Before MAHSHID D. SAADAT, SCOTT B. HOWARD, and
JOHN D. HAMANN, Administrative Patent Judges.
HOWARD, Administrative Patent Judge.
DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from the Final Rejection
of claims 1, 3, 4, 6-11, 13, 14, and 16-19, which constitute all of the claims
pending in this application. Claims 2, 5, 12, 15, and 20 have been cancelled.
See App. Br. 15-17 (Claims App.). We have jurisdiction under 35 U.S.C.
§ 6(b).
We reverse.
1 Appellant identifies itself, QUALCOMM Incorporated, as the real party in
interest. App. Br. 3.
Appeal2017-010482
Application 14/548,691
THE INVENTION
The disclosed and claimed invention is directed to "radio frequency
(RF) circuits and, more particularly, to layout of voltage-controlled
oscillators (VCOs) in an integrated circuit (IC)." Spec. i-f 2.
Claim 1, reproduced below, is illustrative of the claimed subject
matter:
1. A frequency synthesizer, comprising:
a first voltage-controlled oscillator (VCO) circuit
comprising a first inductor; and
a second VCO circuit comprising a second inductor,
wherein at least a portion of the first VCO circuit is disposed
inside a loop of the second inductor, wherein at least a portion
of the second VCO circuit is disposed inside a loop of the first
inductor, wherein the portion of the first VCO circuit comprises
a negative active transconductance circuit and a varactor of the
first VCO circuit, and wherein the portion of the second VCO
circuit comprises a negative active transconductance circuit and
a varactor of the second VCO circuit.
REFERENCES
The prior art relied upon by the Examiner as evidence in rejecting the
claims on appeal is:
Taghivand
Rangarajan et al.
("Rangarajan")
Ainspan et al.
("Ainspan")
US 2010/0238843 Al Sept. 23, 2010
US 2010/0308924 Al Dec. 9, 2010
US 2011/0063038 Al Mar. 17, 2011
REJECTIONS
Claims 1, 3, 4, and 6-8 stand rejected under 35 U.S.C. § 103 as being
unpatentable over Rangarajan in view of Ainspan. Final Act. 2-6.
2
Appeal2017-010482
Application 14/548,691
Claims 9--11, 13, 14, and 16-19 stand rejected under 35 U.S.C. § 103
as being unpatentable over Rangarajan in view of Ainspan and Taghivand.
Final Act. 6-14.
ANALYSIS
We have reviewed the Examiner's rejection in light of Appellant's
arguments that the Examiner erred. In reaching this decision, we have
considered all evidence presented and all arguments made by Appellant. We
are persuaded by Appellant's arguments regarding the pending claims.
Appellant argues the Examiner erred in finding Rangarajan or
Ainspan teaches
"the portion of the first VCO circuit [that is disposed inside a
loop of the second inductor] comprises a negative active
transconductance circuit and a varactor of the first VCO circuit,
and wherein the portion of the second VCO circuit [that is
disposed inside a loop of the first inductor] comprises a
negative active transconductance circuit and a varactor of the
second VCO circuit" as recited in claim 1.
App. Br. 8 (alterations and emphasis in original); see also id. at 8-11; Reply
Br. 2-3. More specifically, Appellant argues Rangarajan is silent with
regard to the negative transconductance circuit of one core being disposed
inside a loop of the inductor of the other VCO. App. Br. 9. Instead,
Appellant argues "as illustrated by FIG. 2 of Rangarajan . .. , the LF core
230 and HF core 250 (which include respective negative transconductance
circuits) are disposed outside the inductor loops 245 and 225, respectively."
Id. Appellant similarly argues that Ainspan's Figure 3 shows "the negative
transconductance circuits 102 and 112 and varactors 104 and 114 are
disposed outside the inductor loops 106 and 116." App. Br. 10. Appellant
3
Appeal2017-010482
Application 14/548,691
also argues the Specification shows that the claimed structure allows for a
reduction of area occupied by the two VCOs without sacrificing quality
factor and phase noise performance of the inductors. Reply Br. 2-3 (citing
Spec. iii! 53, 55).
The Examiner finds Rangarajan teaches two VCOs, each having a
negative transconductance circuit located within the loop of the other
circuit's inductor loop. Final Act. 2-3 (citing Rangarajan Figs. IC, 2, if 46).
The Examiner further finds that Ainspan teaches a VCO with a varactor and
that a person of ordinary skill of the art would have included it in the portion
of the circuit inside the induction loop. Id. at 3--4.
With regard to the location of the negative transconductance circuit
and varactor, the Examiner further finds that the location of those
components inside an inductor loop would have been a routine design choice
and Appellant has not identified a reason why they need to be located inside
the loop:
Examiner considered the limitations that the portion of the first
VCO circuit comprises a negative active transconductance
circuit and a varactor of the first VCO circuit, and the portion of
the second VCO circuit comprises a negative active
transconductance circuit and a varactor of the second VCO
circuit. However, according to the claimed invention, the first
and second VCOs do not only comprise a negative active
transconductance circuit and a varactor but also comprise first
and second inductors. Rangarajan teaches that a portion of the
fist [sic] inductor and that of the second inductor are configured
to be overlapped, wherein the portion of the first inductor of the
first VCO is disposed inside the second inductor of the second
VCO; the portion of the second inductor of the second VCO is
disposed inside the first inductor of the first VCO. In addition,
the overlapping area of the inductors 150 and 160 occupies a
quite larger area on both the surfaces of dies 101 and 132
4
Appeal2017-010482
Application 14/548,691
compared to the area needed for disposing the negative active
transconductance circuit and varactor because the basic
component like transistor would be extremely small in the IC
(Integrated Circuit). Through the claim invention and
applicant's specification, there is no clear description why the
negative active transconductance circuit and varactor have to
be placed inside the loop inductors. Therefore, one [off skill
in the art has the design choice to dispose the negative active
transconductance circuit and varactor in the overlapping area
since this area is big enough to place many component
including components for VCO circuits.
Ans. 5---6 (emphasis added).
We are persuaded by Appellant's arguments as the Examiner has not
identified sufficient evidence or provided sufficient explanation as to how
the combination of Rangarajan and Ainspan teaches placing the negative
active transconductance circuit and varactor of one VCO inside the loop of
the inductor of a different VCO, as recited in claim 1. As Appellant argues,
Rangarajan shows the LF core 230 and HF core 250 (which include
respective negative transconductance circuits) disposed outside the inductor
loops 245 and 225, respectively. See Rangarajan Fig. 2, i-f 46 (describing the
location of the negative transconductance circuits in the cores).
Moreover, we determine that the Examiner's reasoning lacks rational
underpinning at least because the Specification describes the advantages
associated with the claimed location:
Certain aspects of the present disclosure provide for disposing
at least a portion of a first VCO circuit inside the inductor of a
second VCO circuit, while at least a portion of the second VCO
circuit may be disposed inside the inductor of the first VCO
circuit. This approach reduces the area occupied by the two
VCOs without sacrificing the [inductor quality factor] Q and
phase noise performance of the inductors. By positioning at
least a portion of the first VCO circuit inside the inductor of the
5
Appeal2017-010482
Application 14/548,691
second VCO circuit (and vice versa), phase noise performance
is not adversely impacted because only a single VCO circuit is
typically active at any one time to generate the local oscillator
(LO) frequency output by the TX or RX frequency synthesizer
318, 330, hence the term "switchable VCOs."
Spec. i-f 53. The Specification further discusses potential area savings of the
VCOs and that the claimed design "may also result in an inductor Q increase
of roughly 15% as compared to using [prior art designs]." Id. i-f 55. As our
reviewing court has held, "design choice" is appropriate where the applicant
fails to set forth any reasons why the differences between the claimed
invention and the prior art would result in a different function. In re Chu, 66
F.3d 292, 298-99 (Fed. Cir. 1995). Here, Appellant has set forth the
advantages of the claimed design when compared to the prior art and the
Examiner's reasoning does not account for that reduced area or increase in
Q. Therefore, for the above reasons, we determine the Examiner fails to set
forth a rejection that adequately articulates reasoning with some rational
underpinning to support the legal conclusion of obviousness. See In re
Kahn, 441 F .3d 977, 988 (Fed. Cir. 2006) (cited with approval in KSR Int 'l
Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007)).
Accordingly, we reverse the Examiner's rejection of claim 1, along
with the rejection of dependent claims 3, 4, and 6-8.
Moreover, because independent claims 9 and 19 recite a limitation
substantially commensurate in scope to the disputed limitations discussed
above, 2 and the Examiner has not shown that Taghivand cures the foregoing
2 Although claims 9 and 19 are broader in scope in claim 1 in that they only
require a negative active transconductance circuit or a varactor to be located
in the induction loop, the Examiner relies on the same determination that the
location of the a negative active transconductance circuit or a varactor is a
6
Appeal2017-010482
Application 14/548,691
deficiencies regarding the rejection of the independent claims, we will not
sustain the rejection of claims 9 and 19, along with dependent claims 10, 11,
13, 14, and 16-18 for similar reasons.
DECISION
For the above reasons, we reverse the Examiner's decisions rejecting
claims 1, 3, 4, 6-11, 13, 14, and 16-19.
REVERSED
routine design as choice as discussed above for claim 1. See Ans. 6-7 ("The
argument B [for claims 9 and 19] is similar with the argument A [for claim
1] and please refer to the examiner's response above.").
7