Ex Parte Grewal et al

Patent Trial and Appeal Board

May 29, 2018

14061693 (P.T.A.B. May. 29, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/061,693 10/23/2013
75359 7590
ZILKA-KOTAB, PC-NVID
1155 N. 1st St.
Suite 105
SAN JOSE, CA 95112
05/31/2018
FIRST NAMED INVENTOR
Amanpreet Grewal
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
NVIDP893/SC-13-0407-US01 6565
EXAMINER
RICHER, JONI
ART UNIT PAPER NUMBER
2611
NOTIFICATION DATE DELIVERY MODE
05/31/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
zk-uspto@zilkakotab.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte AMANPREET GREW AL, ANDREI KHODAKOVSKY,
YU DENNY DONG, HENRY PACKARD MORETON, and
NA VEEN LEEKHA
Appeal2018-000181
Application 14/061,693 1
Technology Center 2600
Before CAROLYN D. THOMAS, HUNG H. BUI, and SHARON PENICK,
Administrative Patent Judges.
BUI, Administrative Patent Judge.
DECISION ON APPEAL
Appellants seek our review under 35 U.S.C. § 134(a) of the
Examiner's Final Rejection of claims 1-14, 17, 20, 21, and 23, which are all
the claims pending in the application. App. Br. 7. We have jurisdiction
under 35 U.S.C. § 6(b ).
WeAFFIRM. 2
1 According to Appellants, the real party in interest is NVIDIA Corporation.
App. Br. 3.
2 Our Decision refers to Appellants' Appeal Brief ("App. Br.") filed June
26, 2017; Examiner's Answer ("Ans.") mailed August 3, 2017; Non-Final
Office Action ("Non-Final Act.") mailed January 23, 2017; and original
Specification ("Spec.") filed October 23, 2013.
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Application 14/061,693
STATEMENT OF THE CASE
Appellants' invention relates to a "system, method, and computer
program product [] provided for mapping [virtual] tiles to physical memory
locations." Spec. i-f 4.
Claims 1, 20, and 21 are independent. Claim 1 illustrates the claimed
subject matter, as reproduced below with disputed limitations in italics:
1. A method, comprising:
identifying a plurality of virtual tiles associated with a
texture;
receiving a request to perform a mapping of the plurality
of virtual tiles to one or more physical memory locations;
mapping the plurality of virtual tiles to the one or more
physical memory locations,
within a page table, where at least a portion of adjacent
virtual tiles are not mapped to adjacent physical memory
locations within the page table;
receiving, from a graphics application, a request to update
one or more mappings within the page table;
validating that the request is not an erroneous mapping
request using knowledge of the entries within the page table;
invoking a compute shader to update the page table in
accordance with the request, including providing to the compute
shader one or more validation parameters that validate that the
request is not the erroneous mapping request in order to prevent
the erroneous mapping request.
App. Br. 12 (Claims App.).
REJECTION & REFERENCES
Claims 1-14, 17, 20, 21, and 23 stand rejected under
35 U.S.C. § 103(a) as unpatentable over Frisinger (US 2012/0147028 Al;
published June 14, 2012), Sharp et al. (US 2014/0075060 Al; published
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Application 14/061,693
Mar. 13, 2014), Gosalia et al. (US 2004/0160446 Al; published Aug. 19,
2004), and Duluk, Jr. et al. (US 2011/0157206 Al; published June 30,
2011). Non-Final Act. 3-11.
ANALYSIS
Claims 1-14 and 17
In support of the obviousness rejection of claim 1, the Examiner finds
the combination of Frisinger, Sharp, Gosalia, and Duluk teaches Appellants'
method including all the claim limitations. Non-Final Act. 3-7 (citing
Frisinger i-fi-f 10, 21-22, 27, 332, 40; Sharp i-fi-f 18, 22-25; Gosalia i-fi-f 113,
119, 129; Duluk i-fi-134--35, 54, 79). In particular, the Examine relies on
Gosalia and Duluk for teaching disputed limitations of claim 1:
(1) "validating that the request is not an erroneous mapping
request using knowledge of the entries within the page
table; [and]
(2) "invoking a compute shader to update the page table in
accordance with the request, including providing to the
compute shader one or more validation parameters that
validate that the request is not the erroneous mapping
request in order to prevent the erroneous mapping request.
Non-Final Act. 5---6 (citing Gosalia i-fi-f 113, 119, 129; Duluk i-fi-134--35, 54,
79). According to the Examiner,
"Duluk further teaching [sic] using shaders to handle virtual
memory requests ... Since Gosalia teaches that virtual memory
requests are handled using a page table [0116] and updating the
page table in accordance with the request, including providing
one or more validation parameters that validate that the request
is not the erroneous mapping request in order to prevent the
erroneous mapping request [0113, 0119, 0129], this teaching
from Duluk can be implemented into the method of Gosalia so
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Application 14/061,693
that it invokes a compute shader to update the page table in
accordance with the request, including providing to the compute
shader one or more validation parameters that validate that the
request is not the erroneous mapping request in order to prevent
erroneous mapping request."
Non-Final Act. 6 (emphasis added).
Appellants do not dispute the Examiner's factual findings regarding
Frisinger, Sharp or Duluk. Nor do Appellants challenge the Examiner's
rationale for making the combination. 3 Instead, Appellants argue "none of
the excerpts in Gosalia relied by the Examiner relate to a request to update
one or more mappings that are within a page table, and therefore do not
disclose in the context" of claim 1, including:
( 1) "validating that the request [to update one or more
mappings within the page table] is not an erroneous
mapping request using knowledge of the entries within the
page table; [and]
(2) "invoking a compute shader to update the page table in
accordance with the request, including providing to the
compute shader one or more validation parameters that
validate that the request is not the erroneous mapping
request in order to prevent the erroneous mapping request.
App. Br. 8-9 (citing Gosalia i-fi-f 113, 119, 129).
3 Because Appellants fail to present any arguments to explain why the
Examiner's factual findings regarding Frisinger, Sharp, and Duluk are in
error, we will not review those uncontested aspects of the rejection. See Ex
Parte Frye, 94 USPQ2d 1072, 1075 (BPAI 2010) (precedential) (the BPAI
"reviews the obviousness rejection for error based upon the issues identified
by appellant, and in light of the arguments and evidence produced thereon,"
and treats arguments not made as waived).
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Appellants' arguments are not persuasive. Instead, we find the
Examiner has provided a comprehensive response to Appellants' arguments
supported by a preponderance of evidence. Ans. 3--4. As such, we adopt the
Examiner's findings and explanations provided therein. Id. For example, as
recognized by the Examiner, Gosalia teaches: (1) mapping, via a kernel
mode driver (KMD), a page table to handle a range of physical memory
locations (Ans. 12 citing (Gosalia i-f 113); see also Gosalia Figure 9);
(2) determining if a request is an invalid (Ans. 13 citing (Gosalia i-f 129));
and (3) validating that the request to update one or more mappings within
the page table is not an erroneous mapping request using knowledge of the
entries within the page table, and updating the page table in accordance
with the request (Ans. 13 citing (Gosalia i-fi-1113, 119, 129)). Contrary to
Appellants' arguments, Gosalia's page table updating method can be
implemented using a well-known mechanism, known as "compute shader"
to handle requests for page table updating, as evidenced by Duluk. (Ans. 14
citing (Duluk i-fi-138, 54); see also Duluk Figures 16-17 (showing "a kernel
mode driver (KMD) process wherein the kernel mode update process
performs a page table update process").
Based on this record, including the absence of Appellants' rebuttals,
we are not persuaded of Examiner error. Accordingly, we sustain the
Examiner's obviousness rejection of independent claim 1 and its dependent
claims 2-14 and 17, which Appellants do not argue separately. App. Br. 9.
Claims 20, 21, and 24
Independent claims 20 and 21 recite similar limitations to those of
claim 1, except that the page table updating steps are performed by a kernel
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mode driver [KMD]. Claim 23 depends from claim 1, and further recites
"the validating and the invoking are performed by the kernel mode driver
[KMD]."
Appellants argue "none of the excerpts in Gosalia relied by the
Examiner relate to a request to update one or more mappings that are within
a page table, let alone disclose use of a kernel mode driver, and therefore
Gosalia, as relied on by the Examiner, does not disclose" Appellants'
claimed:
( 1) "validating, by the kernel mode driver, that the request [to
update one or more mappings within the page table] is not
an erroneous mapping request using knowledge of the
entries within the page table; [and]
(2) "invoking, by the kernel mode driver, a compute shader to
update the page table in accordance with the request,
including providing to the compute shader one or more
validation parameters that validate that the request is not
the erroneous mapping request in order to prevent the
erroneous mapping request.
App. Br. 9-10 (citing Gosalia i-fi-f 113, 119, 129).
We disagree. Contrary to Appellants' arguments, Gosalia further
teaches using a kernel mode driver (KMD) to map and update a page table.
See Gosalia i-f 113, Figure 9, Claim 31.
For this reason and the reasons set forth above with respect to claim 1,
we sustain the Examiner's obviousness rejection of claims 20, 21, and 24.
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CONCLUSION
On the record before us, Appellants have not demonstrated the
Examiner erred in rejecting claims 1-14, 17, 20, 21, and 23 under
35 U.S.C. § 103(a).
DECISION4
As such, we AFFIRM the Examiner's Final Rejection of claims 1-14,
17, 20, 21, and 23.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
4 In the event of further prosecution, the panel suggests the Examiner to
consider rejecting claims 1-14, 17, 20, 21, and 23 under 35 U.S.C. § 112,
first paragraph for lack of written description. For example, claim 1 recites
both ( 1) a method of mapping [virtual] tiles to physical memory locations
using a page table, shown in Figure 1, and (2) a method of updating
mappings between virtual tiles and physical memory locations within a page
table, shown in Figure 3. However, Appellants' Specification describes
Figure 3 as (1) using a user mode driver (UMD) to forward the request to
update the mappings to a kernel mode driver (KMD) at step 304 and then (2)
using the KMD to update page table entries of the page table to reflect the
request mapping change (update) at step 306. Spec. i-fi-129-32, 36. This way
the KMD "can validate against malicious or otherwise erroneous mapping
requests." Additionally, Appellants' Specification does not appear to
support the claimed limitations: (1) "validating that the request is not an
erroneous mapping request using knowledge of the entries within the page
table;" and (2) "invoking ... to update the page table in accordance with the
request, including providing to the compute shader one or more validation
parameters that validate that the request is not the erroneous mapping
request in order to prevent the erroneous mapping request" as recited in
Appellants' claim 1 and similarly recited in claims 20 and 21.
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