Ex Parte Gravely et alDownload PDFPatent Trial and Appeal BoardFeb 17, 201714486686 (P.T.A.B. Feb. 17, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 14/486,686 09/15/2014 John Willoughby Gravely JR. IMG. 183 8135 26984 7590 02/17/2017 WTT T TAMT T ONDON EXAMINER 3010 LEE AVENUE TRAN, DUNG D P.O. BOX 152 SANFORD, NC 27330 ART UNIT PAPER NUMBER 2675 MAIL DATE DELIVERY MODE 02/17/2017 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte JOHN WILLOUGHBY GRAVELY JR., RICHARD J. STIEVENART, and MICHAEL LARKIN SHELBY Appeal 2016-007282 Application 14/486,6861 Technology Center 2600 Before HUNG H. BUI, ADAM J. PYONIN, and AMBER L. HAGY, Administrative Patent Judges. BUI, Administrative Patent Judge. DECISION ON APPEAL Appellants seek our review under 35 U.S.C. § 134(a) from the Examiner’s Final Rejection of claims 1—13, which are all the claims pending in the application. We have jurisdiction under 35 U.S.C. § 6(b). We AFFIRM-IN-PART.2 1 According to Appellants, the real party in interest is Static Control Components Inc. App. Br. 1. 2 Our Decision refers to Appellants’ Appeal Brief filed January 28, 2016 (“App. Br.”); Reply Brief filed July 14, 2016 (“Reply Br.”); Examiner’s Answer mailed May 25, 2016 (“Ans.”); Final Office Action mailed August 28, 2015 (“Final Act.”); and original Specification filed September 15, 2014 (“Spec.”). Appeal 2016-007282 Application 14/486,686 STATEMENT OF THE CASE Appellants ’ Invention Conventional toner cartridge for use in a printer is provided with non volatile memory modules to record usage information of components, i.e., remaining life of the toner cartridge. Spec. 12. Typically, a memory module may contain multiple bit fields for recording the depletion of toner, for example, 32 bit fields with each bit field capable of being “punched out,” i.e., changing from an erased state to a programmed state, to indicate a particular amount of toner depleted (e.g., 1/32 of total toner). Spec. 14. For example, all 32 bit fields are “punched out” when all the toner is depleted. However, when a bit field in the memory module is “punched out,” the “punched out” bit field may prevent the toner cartridge from operating properly unless authorized by original equipment manufacturers (OEMs). Spec. H5—6. As such, Appellants’ invention proposes to instruct the punching a bit in a bit field of a memory module without actually punching the bit. Spec. 17. Instead, Appellants propose generating a value that is related to the bit in the bit field of the memory module to be “punched out” and then storing that value to indicate a particular amount of toner depleted without having to actually punch out any bit field of the memory module and without necessitating any permanent change associated with punching a bit. Spec. 117, 30. 2 Appeal 2016-007282 Application 14/486,686 Representative Claim Claims 1,5, and 9 are independent. Representative claim 1 is reproduced below with disputed limitations in italics'. 1. A method of updating a memory module in an imaging device, comprising: receiving, at a memory module, a command transmitted from a processing device, wherein the command indicates to the memory module to punch out a specified bit in a punch bit field; determining a value representative of a location of the specified bit; and storing the value in the memory module, wherein the value is stored in an array of bits within the memory module. App. Br. 9 (Claims App’x). Examiner’s Rejections and Reference (1) Claims 2 and 7 stand rejected under 35 U.S.C. § 112(b) or 35 U.S.C. § 112 (pre-AIA) second paragraph, as being indefinite. Ans. 2—3. (2) Claims 1, 3—6, 8, 9, 11, and 12 stand rejected under 35 U.S.C. § 102(b) as being anticipated by Booth et al. (US 2008/0276048 Al; published on Nov. 6, 2008; “Booth”). Ans. 4—7. (3) Claims 10 and 13 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Booth. Ans. 7—8. Issues on Appeal Based on Appellants’ arguments, the dispositive issues on appeal are whether claims 2 and 7 are indefinite, and whether Booth discloses the disputed limitation: “storing the value [representative of a location of the specified bit] in the memory module, wherein the value is stored in an array 3 Appeal 2016-007282 Application 14/486,686 of bits within the memory module” as recited in claim 1, and similarly recited in claim 9. App. Br. 6—8. ANALYSIS 35 U.S.C. § 112, second paragraph: Claims 2 and 7 Independent claim 1 recites a method of updating a memory module in an imaging device, comprising, inter alia: “receiving, at a memory module, a command transmitted from a processing device, wherein the command indicates to the memory module to punch out a specified bit in a punch bit field.” Similarly, independent claim 5 contains a similar limitation. Claim 2 depends from claim 1, and further recites: “wherein the specified bit in the punch bit field is not punched.” Likewise, claim 7 depends from claim 5, and further recites: “transmitting acknowledgement that the specified bit in the punch bit field has been punched even though the specified bit has not been punched.” The Examiner asserts: it is unclear about receiving a command to perform a function of punching out when the specified bit is not to be punched. Furthermore, it is not clear whether “the specified bit is not punched” is referred to before or after receiving the punch out command. Ans. 3 (emphasis added). Appellants argue “claims 2 and 7 are not indefinite” because independent claims 1 and 5 only recite a command to instruct the memory module but do not require the memory module to actually punch out the specified bit in the bit field, whereas claims 2 and 7 require the memory module to execute the command. App. Br. 3—A. 4 Appeal 2016-007282 Application 14/486,686 We agree with Appellants. Breadth of a claim should not be equated with indefiniteness. In re Miller, 441 F.2d 689 (CCPA 1971). We find the scope of the subject matter embraced by the claims is clear, i.e., claims 1 and 5 recite a command whereas claims 2 and 7 recite a memory module that executes the command. Accordingly, we decline to sustain the Examiner’s rejection of claims 2 and 7 under 35 U.S.C. § 112, second paragraph. 35 U.S.C. § 102(b): Claims 1, 3—6, 8, 9, 11, and 12 based on Booth Independent claim 1 recites a method of updating a memory module in an imaging device, comprising: receiving, at a memory module, a command transmitted from a processing device, wherein the command indicates to the memory module to punch out a specified bit in a punch bit field; determining a value representative of a location of the specified bit; and storing the value in the memory module, wherein the value is stored in an array of bits within the memory module. App. Br. 9 (Claims App’x). Claim 5 contains a similar limitation, except that the value determined is “a decimal value representative of a location of the specified bit” for storing in the memory module. Independent claim 9 simply recites “at least one print cartridge having a memory” and a host device [which] transmits the command signals to the at least one print cartridge . . . including a punch bit command that indicates to the memory to punch out a specified bit in a punch bit field, wherein a value indicative of a location of the specified bit is stored in the memory in an array of bits. The Examiner finds Booth discloses all aspects of Appellants’ claim 1 and similarly, claims 5 and 9, including: (1) “receiving, at a memory module, a command . . . indicates to the memory module to punch out a 5 Appeal 2016-007282 Application 14/486,686 specified bit in a punch bit field” as shown in Booth’s Figures 1A and 4B; (2) “determining a value representative of a location of the specified bit” in the form of a bit field changing from an erased state to a programmed state, shown in Booth’s Figure 4B; and (3) “storing the value in the memory module, wherein the value is stored in an array of bits within the memory module.” Ans. 4 (citing Booth, || 8, 30, 31, 57, Figs. 1A and 4B). Appellants acknowledge Booth discloses (1) “a printing device that includes a memory module having bit fields where each bit is ‘punched out, ’ thereby changing a state from an erased state to a programmed state” and (2) “a memory module that punches a bit field in response to a punch out bit field command.” App. Br. 6—7 (citing Booth || 29, 56). However, Appellants argue “Booth does not disclose storing a value that is representative of a location of a specified bit in a memory module, with the value being stored in an array of bits within the memory module.” App. Br. 7. In response, the Examiner takes the position that: [i]n Booth, after receiving a punching out command from the processing device 101, as shown in figures 1 A, 3, 4B and paragraph 0057, the value of the particular bit in the memory (bit field number 428) is punched out (changed from an erased state to a programmed state; i.e., “0” or “1”), this new value is stored in the memory in order to keep track of pages printed by the imaging unit (paragraph 0030); therefore suggests storing the value that is representative of a location of a specified bit in a memory module. Ans. 10-11. We agree with the Examiner’s position. For additional emphasis, we note Appellants’ claims 1,5, and 9 are written broadly and, as written, do 6 Appeal 2016-007282 Application 14/486,686 not define how “a value representative of a location of the specified bit [in a punch bit field” is determined based on whether a specified bit in the punch bit field is “punched out” or not. As such, Appellants’ claims 1,5, and 9 do not distinguish over Booth as well as Appellants’ Admitted Prior Art, US 7,844,786, described in paragraph 4 of Appellants’ Specification. For example, as correctly recognized by the Examiner, when a particular bit field is “punched out” in response to receipt of a punch out command, shown in Booth’s Figure 4B, the value of that particular bit field is also changed from an erased state to a programmed state, i.e., from “0” to “1,” and that value is then determined and stored in the memory module in the same manner recited in Appellants’ claims 1, 5, and 9. For the reasons set forth above, Appellants have not demonstrated Examiner error. As such, we sustain the Examiner’s anticipation rejection of independent claims 1,5, and 9, and the rejection of their respective dependent claims 3, 4, 6, 8, and 10-13, which Appellants do not argue separately. App. Br. 7—8. CONCLUSION On the record before us, we conclude Appellants have demonstrated the Examiner erred in rejecting claims 2 and 7 under 35U.S.C. § 112 (pre- AIA), second paragraph, but have not demonstrated the Examiner erred in rejecting claims 1, 3—7, and 8—13 under 35 U.S.C. § 102(b) and § 103(a). DECISION As such, we REVERSE the Examiner’s final rejection of claims 2 and 7 under 35 U.S.C. § 112 (pre-AIA), second paragraph, but AFFIRM the 7 Appeal 2016-007282 Application 14/486,686 Examiner’s final rejection of claims 1, 3—7, and 8—13 under 35 U.S.C. § 102(b) and § 103(a). No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED-IN-PART 8 Copy with citationCopy as parenthetical citation