Ex Parte Fulton

Patent Trial and Appeal Board

May 9, 2016

13168937 (P.T.A.B. May. 9, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/168,937
78659 7590
Nelson and Nelson
775 High Ridge Drive
Alpine, UT 84004
06/25/2011
05/11/2016
FIRST NAMED INVENTOR
Michael S. Fulton
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
CA920110019US 1 1044
EXAMINER
VERBRUGGE, KEVIN
ART UNIT PAPER NUMBER
2132
NOTIFICATION DATE DELIVERY MODE
05/11/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
dan@nnpatentlaw.com
alexis@nnpatentlaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MICHAEL S. FULTON
Appeal2014-008580
Application 13/168,937 1
Technology Center 2100
Before ROBERT E. NAPPI, NATHAN A. ENGELS, and
JOHN D. HAMANN, Administrative Patent Judges.
HAMANN, Administrative Patent Judge.
DECISION ON APPEAL
Appellant files this appeal under 35 U.S.C. § 134(a) from the
Examiner's Final Rejection of claims 10-18. We have jurisdiction under
35 U.S.C. § 6(b). We reverse.
1 According to Appellant, the real party in interest is International Business
Machines Corporation. App. Br. 2.
Appeal2014-008580
Application 13/168,937
THE CLAIMED INVENTION
Appellant's claimed invention relates to geometric array data
structures, and in particular, to a structure that comprises an array of
pointers, where each successive pointer points to a block of elements that is
twice as large as the preceding pointed to block. See Abstract. Of the
claims on appeal, claim 10 is illustrative of the subject matter of the appeal
and is reproduced below.
10. A computer program product to implement a geometric
array in a computing environment, the computer program
product comprising a non-transitory computer-usable storage
medium having computer-usable program code embodied
therein, the computer-usable program code comprising:
computer-usable program code to generate an array of
slots, each slot configured to store a pointer, wherein each
pointer in the array points to a block of elements, and each
pointer with the exception of the first pointer in the array points
to a block of elements that is twice as large as the block of
elements associated with the preceding pointer.
REJECTION ON APPEAL 2
The Examiner rejected claims 10-18 under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Vicente H.F. Batista et al.,
Parallel Geometric Algorithms for Multi-Core Computers, 343804 INSTITUT
NATIONAL DE RECHERCHE EN INFORMATIQUE ET EN AUTOMATIQUE [INRIAJ
2 The Examiner also provisionally rejected claims 10-18 for obviousness-
type double patenting over claims 1-11 of copending Application No.
13/431,976. No patent has issued yet from that copending Application, nor
does Appellant present arguments addressing this provisional rejection. We
find it is premature to address this provisional rejection. See In re Moncla,
95 USPQ2d 1884, 1885 (BPAI 2010) (precedential).
2
Appeal2014-008580
Application 13/168,937
6749 (2008) (hereinafter "Batista") and Olesinski et al. (US 2003/0182352
Al; Sept. 25, 2003) (hereinafter "Olesinski"), collectively referred to as the
"combination."
DISPOSITIVE ISSUE ON APPEAL
For this appeal, the dispositive issue is whether the Examiner erred in
finding the combination teaches or suggests "a block of elements that is
twice as large as the block of elements associated with the preceding
pointer," as recited in claim 10.
ANALYSIS
We have reviewed the Examiner's rejection in light of Appellant's
contentions that the Examiner erred. We find Appellant's arguments with
respect to the dispositive issue persuasive.
Appellant argues the combination fails to teach or suggest this
disputed limitation of claim 10. App. Br. 4--5. As to Batista, Appellant
argues it does not show successive blocks of elements that are twice as large
as the preceding blocks of elements. See App. Br. 4. Appellant also argues
that the size of each block of elements is not an obvious matter of design
choice, but rather what facilitates locating the elements in the array,
including allowing for Appellant's later claimed indexing scheme. See id.
4--5; see also Spec. i-fi-131-37. As to Olesinski, Appellant argues it fails to
teach or suggest blocks of elements, but instead teaches slots that can vary in
length for calendaring events. App. Br. 5 (citing Olesinski i121 ).
The Examiner finds both Batista and Olesinski teach the disputed
limitation. See Ans. 2-3. As to Batista, the Examiner finds it teaches
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Appeal2014-008580
Application 13/168,937
having blocks of elements of various sizes and the doubling of the number of
elements in successive blocks is a matter of obvious design choice,
particularly in computer data processing which uses the binary number
system. See Ans. 3--4 (citing Batista Fig. 1) (showing blocks of elements of
varying size). As to Olesinski, the Examiner finds it teaches slots which are
data structures for scheduling and storing future events. See id. (citing
Olesinski Abstract, i-f 22). The Examiner also finds in Olesinski each
successive slot is twice as large as the preceding slot. See Ans. 2 (citing
Olesinski i-f 97, Fig. 7).
We find Appellant's arguments persuasive. We agree with Appellant
Batista teaches blocks of elements of varying size (i.e., the number of
elements within the block), but fails to teach or suggest the claimed size
doubling of each successive block. See Batista 7-8, Fig. 1. Nor do we find
that the claimed block elements doubling is an obvious design choice. We
also agree with Appellant Olesinski fails to teach or suggest the claimed
doubling of the number of elements in successive blocks. See Olesinski
i-f 97, Fig. 7. Rather, Olesinski's slots double in temporal length to
accommodate increasingly distant future events without needing an
inordinate number of slots to accommodate all future scheduling. See
Olesinski i-fi-197-104, Fig. 7 (teaching how to slot, including how to round
the preferred occurrence time, future events). We also agree the
combination of these references fails to teach or suggest this disputed
limitation. Accordingly, we do not sustain the rejection of claim 10, nor
claims 11-18, which depend therefrom, and, thus, also incorporate this
limitation.
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Appeal2014-008580
Application 13/168,937
DECISION
We reverse the Examiner's§ 103 rejection of claims 10-18.
REVERSED
5