Ex Parte Fix et al

Patent Trials and Appeals Board

Mar 28, 2014

10562869 - (D) (P.T.A.B. Mar. 28, 2014)

UNITED STATES PATENT AND TRADEMARKOFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/562,869 04/07/2006 Walter Fix 411000-144 6418
27162 7590 03/31/2014
CARELLA, BYRNE, CECCHI, OLSTEIN, BRODY & AGNELLO
5 BECKER FARM ROAD
ROSELAND, NJ 07068
EXAMINER
MONTALVO, EVA Y
ART UNIT PAPER NUMBER
2899
MAIL DATE DELIVERY MODE
03/31/2014 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
_________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
__________

Ex parte WALTER FIX,
WOLFRAM GLAUERT,
and ANDREAS ULLMANN
__________

Appeal 2012-000378
Application 10/562,869
Technology Center 2800
___________

Before ADRIENE LEPIANE HANLON, CATHERINE Q. TIMM, and
JAMES C. HOUSEL, Administrative Patent Judges.

HANLON, Administrative Patent Judge.

DECISION ON APPEAL

Appeal
Applica

A
T
claims 1
descript
W
T
embodim
chargin
chargin
FET. S
A
accordin

2012-0003
tion 10/56
. STAT
he Appell
, 3, and 8
ion requir
e REVER
he subject
ent of th
g FET and
g FET is c
pec. 2, ll. 2
ppellants’
g to one e
Appel
78
2,869
EMENT
ants appea
under 35 U
ement. W
SE.
matter on
e invention
at least on
apacitively
3-29; see
Fig. 2, rep
mbodimen
lants’ Fig.
a chargin
OF THE C
l under 35
.S.C. § 1
e have juri
appeal is
, the orga
e switchin
coupled t
also Appe
roduced b
t of the in
2 depicts
g FET (4)
2
ASE
U.S.C. §
12, first pa
sdiction un
directed to
nic logic g
g FET wh
o a source
llants’ Fig
elow, illu
vention. S
an organic
and a swi
134 from t
ragraph, b
der 35 U.
organic lo
ate compr
erein the g
/drain elec
. 4.
strates an o
pec. 4, ll.

logic gate
tching FET
he final rej
ased on th
S.C. § 6(b
gic gates.
ises at leas
ate electro
trode of th
rganic log
29-31.
comprisi
(2).
ection of
e written
).
In one
t one
de of the
e chargin
ic gate
ng
g
Appeal 2012-000378
Application 10/562,869

3

Claim 1 is reproduced below from the Claims Appendix of the Appeal Brief
dated February 16, 2011 (“App. Br.”). The limitation at issue is italicized.
1. An organic logic gate comprising:
a circuit having an input and an output and comprising at least
one organic charging field effect transistor (charging FET) on a
substrate;
the charging FET including a first structured layer comprising
source and drain electrodes;
followed by a semiconductor layer on the electrodes followed
by a layer of insulating material on the semiconductor layer and
adjacent to and contiguous with a second electrode layer forming a
gate electrode; and
at least one switching organic field effect transistor (switching
FET) having at least one gate electrode, a source electrode and a drain
electrode;
the drain-source electrodes of the charging and switching
transistors being arranged to be coupled in series between a voltage
source and a reference potential such that the gate electrode of the
charging FET is not connected via an electrical line directly to a
voltage source, to the reference potential, to the input or to the output;
wherein the gate electrode of the charging FET is directly capacitively
coupled to one of the source/drain electrodes of the charging FET to
thereby provide a potential at the gate electrode of the charging FET
solely via the capacitive coupling.
B. DISCUSSION
Claim 1 recites, in relevant part:
wherein the gate electrode of the charging FET is directly capacitively
coupled to one of the source/drain electrodes of the charging FET to
thereby provide a potential at the gate electrode of the charging FET
solely via the capacitive coupling.
Appeal
Applica

A
to one e
T
written
potentia
couplin
[T
c
b
p
cu
th
th
li
F
Ans. 4.

1 Exami
2 The Ex
proper a
2012-0003
tion 10/56
ppellants’
mbodimen
chargi
he Examin
description
l at the ga
g.” Ans. 4
he] drawi
onnected i
etween the
rovide/affe
rrent and
at the resi
e written
mitation “
ET solely

ner’s Answ
aminer al
ntecedent
78
2,869
Fig. 4, rep
t of the in
Appellant
ng FET co
between
er finds th
support f
te electrod
(emphasi
ngs and w
n parallel t
capacitor
ct a poten
resistance
stor does n
description
provide a p
via the cap

er dated
so objects
basis for t
roduced b
vention. S
s’ Fig. 4 d
mprising a
gate elec
e Appella
or the foll
e of the ch
s added).1,
ritten desc
o the gate
14 and th
tial to the
. Since th
ot provide
s and draw
otential a
acitive co
June 8, 20
to the App
he claim l
4
elow, illu
pec. 4, ll.
epicts a se
region of
trode 20 an
nts’ origin
owing lim
arging FE
2 The Exa
ription dis
electrode
e gate elec
gate electr
e written d
any poten
ings does
t the gate e
upling.”
11.
ellants’ S
imitation a
strates a ch
37-39.
ctional vie
capacitive
d electrod
al disclosu
itation in c
T solely v
miner find
closes a re
of the char
trode. The
ode depen
escription
tial [to] th
[sic, do] n
lectrode o
pecificatio
t issue. A
arging FE

w of a
coupling
e 8.
re does no
laim 1: “p
ia the capa
s:
sistor 18
ging FET
resistor c
ding on th
failed to d
e gate ele
ot suppor
f the charg
n as failin
ns. 3.
T accordin
16
t provide
rovide a
citive
and in
an also
e
isclose
ctrode,
t the
ing
g to provid
g
e
Appeal 2012-000378
Application 10/562,869

5

The Appellants argue that the original disclosure states, “[i]n the case of a
capacitive coupling between the gate electrode and source or drain electrode of a
charging FET, it is possible to dispense with a direct electrical coupling between
the two electrodes.” App. Br. 7; Spec. 3, ll. 18-22. The Appellants argue:
[O]ne of ordinary skill would understand that the term ‘direct
electrical coupling’ refers to an ohmic coupling, i.e., a resistive or
otherwise an electrical conductor that directly conductively connects
one element to another element so that a current on the one element is
instantly conducted to the other element at all times.
App. Br. 9. Thus, the Appellants argue the phrase “to dispense with a direct
electrical coupling” means that resistive coupling may be eliminated. App. Br. 9.
Moreover, the Appellants argue that the original disclosure indicates that the
resistor 18 is optional in the embodiments illustrated in Appellants’ Figs. 2 and 3.
App. Br. 10; see also Spec. 5, ll. 30-32 (in the embodiment of Fig. 2, “[t]he
capacitive coupling by the capacitor 14 may be supplemented, as illustrated, by
connection in parallel with a resistor 18.”). The Appellants argue that “[o]ne of
ordinary skill is capable of discerning the embodiment of solely a capacitor as
claimed by merely visualizing Figs. 2 and 3 without the [optional] resistor.” App.
Br. 11.
The Examiner does not directly address the Appellants’ arguments but rather
additionally finds:
[A]ll capacitors have imperfections within the capacitor’s material
that create parasitic resistance (i.e., equivalent series resistance
(ESR)), which means that a real capacitor can be modeled as a resistor
connected in series with an ideal capacitor (see NPLs). An ideal
capacitor would require specific materials that do not have any
resistance. Applicant fails to disclose that the capacitor (i.e., formed
by overlapping the gate electrode with source or drain electrode) is an
Appeal 2012-000378
Application 10/562,869

6

idea [sic, ideal] capacitor nor that the electrodes (i.e., gate and source
or drain) do not have any resistance (i.e., super conductors). Thus,
unless otherwise clearly indicated, Applicant’s disclosure does not
teach the potential being provided at the gate electrode of the charging
FET solely via the capacitive coupling.
Ans. 6.
The Appellants argue that the Examiner’s findings are “hypertechnical and
in error.” Reply Br. 2; see also Reply Br. 10.3 The Appellants further argue:
The supplied evidence expressly states that not all capacitors have
such ESR, or that some have ESR that is so small as to be negligible,
or not in existence, mentioning for example electrolytic capacitors that
may exhibit such ESR and non-electrolytic capacitors that may exhibit
no ESR.
Reply Br. 2-3.
Referring to Appellants’ Fig. 4, the Appellants argue the claimed capacitor is
not an electrolytic capacitor thus, “according to the Examiner’s evidence, such a
capacitor would not normally exhibit ESR . . . .” Reply Br. 3; see also Reply Br. 7
(pointing out that the Wikipedia description of ESR relied on by the Examiner
states that “for most purposes real non-electrolytic capacitors can be treated as
ideal components”).
The Appellants also argue that the original disclosure expressly states that
“the gate electrode of the charging FET is potential-free” and “there is no direct
coupling between the gate electrode and a source or drain electrode of the charging
FET.” Reply Br. 3; see also Spec. 2, ll. 15-17; Spec. 3, ll. 18-22. The Appellants
argue that “[o]ne of ordinary skill would interpret these statements as meaning

3 Reply Brief dated July 29, 2011.
Appeal 2012-000378
Application 10/562,869

7

there is no potential at the gate electrode created by a direct coupling, but only by
the capacitive coupling.” Reply Br. 3.
“The test for determining compliance with the written description
requirement is whether the disclosure of the application as originally filed
reasonably conveys to the artisan that the inventor had possession at that time of
the later claimed subject matter, rather than the presence or absence of literal
support in the specification for the claim language.” In re Kaslow, 707 F.2d 1366,
1375 (Fed. Cir. 1983).
The Appellants’ arguments are supported by the record. Thus, based on the
foregoing, we find the Appellants’ original disclosure reasonably conveys to the
skilled artisan that, as of the Appellants’ filing date, the Appellants had possession
of the claim language at issue in claim 1. For this reason, the § 112, first
paragraph, rejection is not sustained.
C. DECISION
The decision of the Examiner is reversed.
REVERSED

kmm