Ex Parte Faust et al

Board of Patent Appeals and Interferences

Jul 21, 2005

09798169 (B.P.A.I. Jul. 21, 2005)

The opinion in support of the decision being entered today was not written
for publication and is not binding precedent of the Board.
UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte ROBERT ALLAN FAUST, KEVIN GENE KEHNE,
SAYILEELA NULU and GARY LEE RUZEK
____________
Appeal No. 2005-1270
Application No. 09/798,169
____________
ON BRIEF
____________
Before KRASS, BARRY, and MacDONALD, Administrative Patent Judges.
KRASS, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal from the final rejection of claims 1-39.
The invention pertains to saving data used in error analysis, best understood by
reference to representative independent claim 9, reproduced as follows:
9. A method in a data processing system for saving data, the method
comprising:
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detecting, by a partition manager, a fault state in the data processing
system; and
saving data relating to the fault state in a power independent memory that
is included within a service processor in the data processing system.
The examiner relies on the following references:
Nota et al. (Nota) 5,805,790 Sept. 8, 1998
Faulk, Jr. 6,256,756 July 3, 2001
(filed Dec. 4, 1998)
Houston et al. (Houston) 6,493,656 Dec. 10, 2002
(filed Feb. 26, 1999)
Claims 9-11, 26-28, and 37-39 stand rejected under 35 U.S.C. §102 (e) as
anticipated by Houston.
Claims 1-39 stand rejected under 35 U.S.C. §103 as unpatentable over Nota in
view of non-volatile memory and EEPROM.
Claims 15-17 stand further rejected under 35 U.S.C. §103 as unpatentable over
Faulk in view of firmware.
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Reference is made to the briefs and answer for the respective positions of
appellants and the examiner.
OPINION
At the outset, we note that while appellants group the claims as standing or
falling together, at page 4 of the principal brief, appellants argue the three separate
rejections and try to distinguish the claims in each of these rejections over different prior
art references. Accordingly, we will treat claim 9 as being representative of the claims
subject to the anticipation rejection over Houston and the obviousness rejection over
Nota. We will focus on independent claim 15 as representative of the claims rejected
under 35 U.S.C. §103 over Faulk.
With regard to the rejection under 35 U.S.C. §102 (e), anticipation requires that
the four corners of a single prior art document describe every element of the claimed
invention, either expressly or inherently, such that a person of ordinary skill in the art
could practice the invention without undue experimentation. In re Paulsen, 30 F.3d
1475, 1478-79, 31 USPQ2d 1671, 1673 (Fed. Cir. 1994).
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Taking claim 9 as exemplary, it is the examiner’s position that Houston
anticipates the claim in the following manner:
The examiner cites column 2, line 36, of Houston, viz., “The storage device is
capable of executing commands received from a host processor and detecting errors in
the performance of those commands,” and alleges that this is a teaching of the claimed,
“detecting, by a partition manager, a fault state in the data processing system.” For a
teaching of the claimed, “saving data relating to the fault state in a power independent
memory that is included within a service processor in the data processing system,” the
examiner cites the abstract of Houston, viz., “When an error is detected by the storage
device, the previously executed commands and certain error condition codes are stored
in an error log in a non-volatile memory of the storage device.”
The examiner explains that the storage device has a reserved part set aside for
some purpose, and calls this a “partition.” Further, the examiner explains that a “service
processor” is nothing more than a system that processes services (answer-page 5).
For their part, appellants argue that Houston teaches neither a service processor
nor a partition manager and that Houston does not teach storing data relating to the
fault state in an independent memory that is included within a service processor.
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In particular, appellants contend that a “processor,” as defined by the Microsoft
Press Computer Dictionary, Third Edition, published `1997, is a “central processing unit,
microprocessor.” Moreover, the same publication defines a central processing unit to
be a computational and control unit of a computer, which interprets and executes
instructions. A “microprocessor” is defined as a central processing unit on a single
chip.” Therefore, argues appellants, it is clear that a “processor” does not mean “a
system that processes services,” as argued by the examiner. That is, a “processor” is a
device, and not, per se, a system.
Appellants point out that while Houston teaches the creation of an error log in
memory 220 and the copying of that log to non-volatile storage 230 in the disk media,
neither the memory 220 nor the storage 230 is located within a processor of any sort
and is clearly not included within a service processor. Referring to Figure 2 of Houston,
appellants contend that memory 220 and storage 230 are separate from microcontroller
212.
Moreover, appellants argue that Houston teaches nothing about storing data
relating to a fault state in an independent memory that is included within a service
processor and that Houston’s error log is saved in storage that is separate from the
microcontroller. Further, appellants contend that Houston has no teaching about
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partitioning the storage device and, therefore, there is nothing in Houston regarding a
manager that manages a partition.
The examiner’s counter is that the claimed “processor” is broad enough to cover
anything, including a system, that processes something. Since the claims do not recite
a CPU or microprocessor, the examiner argues, the term “processor” should not be
limited to such. Accordingly, since a “processor” may be interpreted to be a system that
processes, according to the examiner, the non-volatile memory disclosed in Houston’s
abstract is included in Houston’s “processor.” With regard to a “partition,” the examiner
points out that since Houston’s abstract teaches the storage of an error log in the non-
volatile memory of the storage device, the error log must be some separate portion, or
“partition” of the larger storage device. The examiner further points out that appellants
have not given a “partition” any particular meaning with respect to the instant invention
and appellants have not pointed out specifically how such a “partition” is to be
“managed.”
Our analysis must begin with the claim itself. Claim 9 requires a method within a
data processing system for saving data. Clearly, Houston deals with data processing
and does teach the saving of data (e.g., an error log) within that data processing
system.
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Houston does, indeed, detect a fault state in the data processing system
because that is how the error log is generated, i.e., by detecting fault states. The
question is, however, does Houston detect these fault states “by a partition manager,”
and does Houston save this data “in a power independent memory that is included
within a service processor,” as claimed?
It is clear to us that the error log, i.e., saved data, in Houston is saved in a power
independent memory because Houston describes storage in a “non-volatile memory”
(abstract).
It is also clear to us that Houston’s storage device is clearly “partitioned,” in the
broadest sense, since the error log stored in the storage device is stored in only one
portion of the storage device, i.e., the storage device stores more than merely the error
log. Accordingly, if the error log is stored in only a portion of the storage device in
Houston, the storage device must be “partitioned.” Appellants have offered no
definition, nor have appellants pointed to any meaning within the specification, that
would contradict this broad interpretation of the term. A mere general allegation that “
[n]othing in Houston describes logically partitioning the storage device. Thus, nothing in
Houston teaches a manager that manages a partition” (principal answer-page 6),
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without specifics as to how appellants’ partitioned storage differs from the storage
device of Houston, or why the examiner’s rationale is in error, is not persuasive.
Since it is clear that Houston’s storage device is “partitioned,” in the sense that
the error log is kept separate from other data items stored in the storage device, there
must, of necessity, be something in Houston’s system that “manages” that partition, so
that the system knows where to store the error log data within the data storage device..
Accordingly, in our view, Houston does disclose, broadly, a “partition manager,” as
claimed. Since Houston’s storage device detects errors (see Abstract), it appears that
Houston teaches a detection, by a partition manager, of a fault state in the data
processing system, as claimed. Appellants have provided nothing to convincingly rebut
the examiner’s position since appellants’ arguments merely consist of generally denying
the existence, in Houston, of the claimed steps and elements, without specifically
addressing the examiner’s rationale for finding those claimed steps and elements.
The final issue is whether Houston discloses that the non-volatile memory is
included within a “service processor,” as claimed.
We again find ourselves siding with the examiner in interpreting the term,
“service processor,” broadly. Since the system of Houston may be interpreted, broadly,
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as a “processor,” the non-volatile memory within the storage device of Houston is
included within that “processor.” Moreover, while appellants offer definitions for the
term “processor,” and contend that Houston does not teach such a processor,
appellants never define the claimed term, “service processor,” in any meaningful way to
distinguish over any type of general processor. Thus, again, we are unconvinced by
appellants’ argument of any error in the examiner’s rationale for the rejection.
Accordingly, we will sustain the rejection of claims 9-11, 26-28, and 37-39 under
35 U.S.C. §102 (e).
Turning to the rejection of claims 1-39 under 35 U.S.C. §103, the examiner sets
forth, at pages 5-7 of the answer, the application of Nota to the independent claims.
While noting, at page 7 of the answer, that Nota fails to specifically disclose the memory
as “power independent,” the examiner takes Official notice of the notoriety of non-
volatile memories which may include, for example, core memory, ROM, EPROM, flash
memory, bubble memory, and battery-backed CMOS-RAM. The examiner indicates
that the skilled artisan would have stored data in such non-volatile memories in order to
avoid the loss of data when power is lost.
Appellants argue that Nota is deficient in at least three areas:
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1. Nota does not describe a service processor that includes a power independent
memory because Nota teaches a service processor 30 that includes a fault recovery
circuit 70 and an interruption circuit 71 but the service processor 30 is not described as
including a memory, and certainly not a power independent memory.
2. Nota does not teach a service processor that includes a power independent
memory in which data needed for error analysis is stored because Nota’s fault data is
stored in a main memory, and not in the service processor 30.
3. Nota does not teach a service processor that is used to manage a plurality of
logical partitions because Nota describes virtual machines and the function of the
service processor can be provided by the real processors, without using a service
processor, so that Nota appears to teach away from a service processor that manages
logical partitions to which a plurality of processors are assigned. Appellants urge that if
the service processor were removed from Nota, one of the remaining processors would
have to manage logical partitions to which that and the other processors were assigned.
Therefore, conclude appellants, Nota does not appear to teach a service processor that
manages logical partitions (see pages 7-8 of the principal brief).
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With regard to appellants’ first assertion, the examiner recognized this deficiency
in Nota and took Official notice that non-volatile memories were known and would have
been obvious to use where data was not desired to be lost during power interruption.
Appellants did not challenge the examiner’s Official notice. Therefore, we find the
examiner’s conclusion of obviousness in supplying Nota’s service processor with a non-
volatile memory to be reasonable.
With regard to appellants’ second assertion, the examiner’s response is to
merely recite large portions of Nota, at pages 20-21 of the answer, without responding
to appellants’ concern that Nota does not store data needed for error analysis in the
power independent memory of the service processor. It appears that the examiner is
relying on column 2, lines 38 et seq. for this argued claim limitation. But that portion of
Nota makes it clear that any storage of data regarding detection of occurrence of a fault
in a processor is in a “main storage.” Such storage is not disclosed as occurring in a
service processor, as claimed. See Figure 1 of Nota wherein the service processor 30
is shown separate and distinct from the main storage. Thus, the instant claimed subject
matter is not taught or suggested by Nota.
The examiner’s view is that Nota indicates, at column 7, lines 20 et seq., that the
function of service processor 30 may be provided in the real processors 1 and 2, without
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using the service processor 30. Even so, processors 1 and 2, as depicted in Nota’s
Figure 1, are separate and distinct from the main storage and the fault data is still
disclosed as being stored in the main storage. So even if processors 1 and 2 are to be
used instead of service processor 30, the fault data is still not saved in a power
independent memory of the service processor 30 or in a power independent memory of
processors 1 and 2. Therefore, the instant claimed subject matter is still not taught or
suggested by Nota.
Accordingly, we will not sustain the rejection of claims 1-39 under 35 U.S.C. §103
over Nota, in view of well known non-volatile memories.
Finally, we turn to the rejection of claims 15-17 under 35 U.S.C. §103 over Faulk
in view of firmware.
It is the examiner’s position that Figure 1 of Faulk discloses a bus system, 51-56,
a communication unit, as claimed, as per column 2, line 61 et seq., and column 3, line
57 et seq., a service processor comprising the combination of processor 11 and error
log 12, a power independent memory in the service processor (column 3, line 65,
indicates that error log may be a non-volatile memory), and a host processor, citing
column 3, line 57 et seq.
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The examiner recognized that Faulk is silent as to firmware, but takes Official
notice that firmware instructions were well known, concluding that it would have been
obvious to implement Faulk’s instructions in firmware in order to have the programming
“be a permanent part of the computing device” (answer-page 16).
For their part, appellants do not challenge the examiner’s Official notice anent the
firmware. In fact, appellants’ only argument is that Faulk does not teach the claimed
“service processor,” because a system cannot be a “service processor” and the
examiner’s position would interpret the combination of error log 12 and processor 11,
viz., a “system,” to be the claimed service processor.
For the reasons supra, anent the Houston reference, we agree with the examiner
in interpreting the term, “service processor,” broadly. Since we find no problem in
interpreting the combination of Faulk’s processor 11 and error log 12, as a “service
processor,” in view of the broad nature of the instant claims, the non-volatile, i.e.,
“power independent,” memory of error log 12 is included within that “service processor.”
Moreover, while appellants offer definitions for the term “processor,” and contend that
Faulk does not teach such a processor, appellants never define the claimed term,
“service processor,” in any meaningful way to distinguish over any type of general
processor. Thus, again, we are unconvinced by appellants’ argument of any error in the
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examiner’s rationale for the rejection. Therefore, we will sustain the rejection of claims
15-17 under 35 U.S.C. §103 over Faulk in view of known firmware.
CONCLUSION
We have sustained the rejections of claims 9-11, 26-28, and 37-39 under 35
U.S.C. §102 (e) and of claims 15-17 under 35 U.S.C. §103. We have not sustained the
rejection of claims 1-39 under 35 U.S.C. §103.
Accordingly, the examiner’s decision is affirmed-in-part.
No time period for taking any subsequent action in connection with this appeal
may be extended under 37 CFR § 1.136(a).
AFFIRMED-IN-PART
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ERROL A. KRASS )
Administrative Patent Judge )
)
)
)
) BOARD OF PATENT
LANCE LEONARD BARRY ) APPEALS
Administrative Patent Judge ) AND
) INTERFERENCES
)
)
)
ALLEN R. MacDONALD )
Administrative Patent Judge )
Appeal No. 2005-1270
Application No. 09/798,169
Page 16
cc: Duke W. Yee
CARSTENS, YEE & CAHOON, LLP
P.O. Box 802334
Dallas, Texas 75380