Ex Parte Eroz et al

Board of Patent Appeals and Interferences

Feb 27, 2012

10353230 (B.P.A.I. Feb. 27, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/353,230 01/28/2003 Mustafa Eroz PD-202101 6153
20991 7590 02/28/2012
THE DIRECTV GROUP, INC.
PATENT DOCKET ADMINISTRATION
CA / LA1 / A109
2230 E. IMPERIAL HIGHWAY
EL SEGUNDO, CA 90245
EXAMINER
NGUYEN, STEVE N
ART UNIT PAPER NUMBER
2117
MAIL DATE DELIVERY MODE
02/28/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte MUSTAFA EROZ, FENG-WEN SUN, and LIN-NAN LEE
____________________

Appeal 2010-005270
Application 10/353,2301
Technology Center 2100
____________________

Before HOWARD B. BLANKENSHIP, ST. JOHN COURTENAY III,
and JAMES R. HUGHES, Administrative Patent Judges.

HUGHES, Administrative Patent Judge.

DECISION ON APPEAL

STATEMENT OF THE CASE
Appellants appeal under authority of 35 U.S.C. § 134(a) from the
Examiner’s rejection of claims 1, 3-5, 12, 13, 17, 19, 20, and 22-25. Claims

1 Application filed January 28, 2003, claiming priority to US 60/398,760
(filed Jul. 26, 2002), US 60/403,812 (filed Aug. 15, 2002), US 60/421,505
(filed Oct.25, 2002), US 60/421,999 (filed Oct. 29, 2002) and US
60/423,710 (filed Nov. 04, 2002). The real party in interest is DTVG
Licensing, Inc. (App. Br. 2.)
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2 and 18 have been canceled and claims 6-11, 14-16, and 21 have been
withdrawn. (App. Br. 2.)2 We have jurisdiction under 35 U.S.C. § 6(b).
We affirm and enter a new ground of rejection.
Appellants’ Invention
The invention at issue on appeal concerns an apparatus, system and
method for generating and processing structured Low Density Parity Check
(LDPC) codes. The method transforms input data into a LDPC codeword
utilizing a parity check matrix comprising LDPC codes by storing values of
the parity check matrix which has a structure that facilitates storage of edge
values in adjacent locations within memory for decoding the LDPC
codeword. (Spec. ¶¶ [06], [07], [10], [11]; Abstract.)
Representative Claim
Independent claim 1 further illustrates the invention:
1. A method for generating low density parity check
(LDPC) codes, the method comprising:
transforming a received input message into a LDPC
codeword using only a parity check matrix of the LDPC codes;
storing values of the parity check matrix to facilitate
generation of the parity bits associated with the LDPC codes,
the parity check matrix having a structure that provides storage
of edge values in adjacent locations within memory for
decoding the LDPC codeword; and

2 We refer to Appellants’ Specification (“Spec.”); Appeal Brief (“App. Br.”)
filed August 21, 2009; and Reply Brief (“Reply Br.”) filed January 15, 2010.
We also refer to the Examiner’s Answer (“Ans.”) mailed November 16,
2009.
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outputting the LDPC codeword.
Rejections on Appeal
1. The Examiner rejects claims 1, 12, and 17 under 35 U.S.C.
§ 112, second paragraph, as being indefinite.3
2. The Examiner rejects claims 1, 3, 5, 17, and 19 under 35 U.S.C.
§ 103(a) as being unpatentable over the combination of Eleftheriou et. al.,
G.gen: LDPC codes for G.dmt.bis and G.lite.bis, 8-12, IBM Zurich
Research Lab. (Jan. 2001) (“IBM”) and US Patent No. 6,633,856 B2 issued
Oct. 14, 2003 (filed Oct. 10, 2001) (“Richardson”).
3. The Examiner rejects claims 4 and 20 under 35 U.S.C. § 103(a)
as being unpatentable over the combination of IBM, Richardson, and US
Patent No. 6,075,408 issued Jun. 13, 2000 (“Kullstam”).
4. The Examiner rejects claims 12 and 13 under 35 U.S.C.
§ 103(a) as being unpatentable over the combination of IBM, Richardson,
US Patent App. Pub. No. 2003/0207696 A1 published Nov. 6, 2003 (filed
May 6, 2002) (“Willenegger”).

3 The Examiner entered this new rejection in response to Appellants’ claim
amendments (Response, filed April 27, 2009). A previous § 112, second
paragraph rejection was withdrawn by the Examiner in the Advisory Action
dated May, 4, 2009. Appellants respond to the new rejection in their Reply
Brief. (Reply Br. 2-4.) This new ground of rejection does not comply with
MPEP § 1207.03. We deem this error to be harmless in view of our reversal
of the rejection (infra) and Appellants’ response.
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5. The Examiner rejects claims 22 and 25 under 35 U.S.C.
§ 103(a) as being unpatentable over the combination of Richardson, and US
Patent No. 5,559,990 issued Sep. 24, 1996 (“Cheng”).
6. The Examiner rejects claim 23 under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Richardson, Cheng, and US
Patent No. 6,895,547 B2 issued May 17, 2005 (filed Jul. 11, 2001)
(“Eleftheriou”).
7. The Examiner rejects claim 24 under 35 U.S.C. § 103(a) as
being unpatentable over the combination of Richardson, Cheng, and
Kullstam.

ISSUES
Based on our review of the administrative record, Appellants’
contentions, and the Examiner’s findings and conclusions, the pivotal issues
before us are as follows:
1. Does the Examiner err in rejecting claims 1, 12, and 17 under
the second paragraph of 35 U.S.C. § 112 as being incomplete or omitting the
structure of the parity check matrix that provides storage of edge values?
2. Does the Examiner err in concluding that Richardson in
combination with IBM would have collectively taught or fairly suggested
“the parity check matrix having a structure that provides storage of edge
values in adjacent locations within memory for decoding the LDPC
codeword” within the meaning of claim 1 and the commensurate limitations
of claims 12 and 17?
3. Does the Examiner err in concluding that Richardson in
combination with Cheng would have collectively taught or fairly suggested
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“the parity check matrix having a structure that provides storage of edge
values in adjacent locations within memory for decoding the LDPC
codeword” as recited in claim 22?
4. Does the Examiner err in concluding that Richardson and
Cheng would have collectively taught or fairly suggested “the memory is
partitioned into a top edge portion and a bottom edge portion, the bottom
edge portion includes edges between bit nodes of degree n and check nodes,
the top edge portion includes edges between bit nodes of degree greater than
n and check nodes, n being an integer” as recited in claim 25?

FINDINGS OF FACT
We adopt the Examiner’s findings in the Answer and Final Office
Action as our own, except as to those findings that we expressly overturn or
set aside in the Analysis that follows.

ANALYSIS
Appellants argue independent claims 1, 12, 17, and 22 together with
dependent claims 3-5, 13, 19, 20, 23, and 24 as a group based on claim 1.
(App. Br. 6-17.) Appellants also provide separate arguments for dependent
claim 25. (App. Br. 14-15.) Therefore, we select claims 1 and 25 as
representative of Appellants’ arguments and groupings. 37 C.F.R.
§ 41.37(c)(1)(vii). See In re Nielson, 816 F.2d 1567, 1572 (Fed. Cir. 1987).
We have considered only those arguments that Appellants have actually
raised in their Briefs. Arguments that Appellants could have made but chose
not to make in the Briefs have not been considered and are deemed to be
waived. See 37 C.F.R. § 41.37(c)(1)(vii).
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Appellants have the opportunity on appeal to the BPAI to demonstrate
error in the Examiner’s position. See In re Kahn, 441 F.3d 977, 985-86
(Fed. Cir. 2006) (citing In re Rouffet, 149 F.3d 1350, 1355 (Fed. Cir. 1998)).
The Examiner sets forth a detailed explanation of the indefiniteness (§ 112,
2nd para.) rejection in the Examiner’s Answer. (Ans. 3.) The Examiner also
sets forth a detailed explanation of the obviousness rejection in the
Examiner’s Answer with respect to each of the claims (Ans. 4-16) and, in
particular, claim 1 (Ans. 4-5, 13-14) and claim 25 (Ans. 10-11, 15).
Therefore, we look to the Appellants’ Brief to show error in the proffered
findings and conclusions. See Kahn, 441 F.3d at 985-86.
Arguments Concerning the Examiner’s Rejection
of Representative Claim 1 Under § 112
The Examiner rejects Appellants’ independent claim 1 as being
indefinite under the second paragraph of 35 U.S.C. § 112. (Ans. 3.)
Specifically, the Examiner submits that the claim omits “the structure of the
parity check matrix that provides storage of edge values for decoding the
LDPC codeword” such that the claim is “incomplete for omitting essential
elements, such omission amounting to a gap between the elements.” (Id.)
We conclude, however, for essentially the same reasons argued by
Appellants (Reply Br. 3-4), that the recitation of the parity check matrix
does not render the claims indefinite and does not require additional
structure. In particular, we agree with Appellants that “[t]hose of ordinary
skill in the art would . . . have understood how to implement a matrix for
storing data values . . . [and] that [n]o more ‘structure’ is required to make
the claim ‘complete.’” (Reply Br. 3.) Therefore, we reverse the Examiner’s
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§ 112, second paragraph, rejection of claim 1 and claims 12 and 17, not
separately argued with particularity (supra).
Arguments Concerning the Examiner’s Rejection
of Representative Claim 1 Under § 103
The Examiner rejects Appellants’ independent claim 1 as being
obvious over the combination of IBM and Richardson. (Ans. 4-5, 13-14.)
Specifically, the Examiner submits that Richardson teaches storing values of
a parity check matrix which has a structure that provides storage of edge
values in adjacent locations within memory for decoding the LDPC
codeword. (Ans. 5, 13 (citing Richardson, col. 15, ll. 40-67; Figs. 7, 8).)
Appellants contend that IBM and Richardson do not teach the claimed
parity check matrix structure. (App. Br. 6-12; Reply Br. 4-5.) In particular
Appellants contend that Richardson does not teach storage of edge values in
adjacent locations within memory (App. Br. 9-10) – “[t]he mere storage in
memory in a certain order does not, necessarily, imply that the values stored
in memory are in ‘adjacent locations,’ as claimed” (App. Br. 10) – and that
Richardson “teaches away the claimed invention” (App. Br. 10) because it
utilizes a message ordering module (App. Br. 10-11; Reply Br. 5).
Upon consideration of the evidence on this record and each of
Appellants’ contentions, we find that the preponderance of evidence on this
record supports the Examiner’s conclusion that the subject matter of
Appellants’ claim 1 is unpatentable over the combination of IBM and
Richardson. Accordingly, we sustain the Examiner’s rejection of claim 1 for
the reasons set forth in the Answer, which we incorporate herein by
reference. (Ans. 4-5, 13-14.)
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We begin our analysis by interpreting the disputed claim limitation.
Appellants’ claim does not actually require storage of edge values in
adjacent locations within memory. Rather, the claim recites storing values
of the parity check matrix and a parity check matrix having a structure that
allows for storage of edge values in adjacent locations within memory. The
recited edge values are not described as being utilized in any manner. Also,
the step of storing values is not performed differently according to the type
of values stored. As such, the “structure” constitutes non-functional
descriptive material, which merely corresponds to data stored in a memory
and “does not lend patentability to an otherwise unpatentable computer-
implemented product or process.” Ex parte Nehls, 88 USPQ2d 1883, 1889
(BPAI 2008) (precedential). See Ex parte Curry, 84 USPQ2d 1272, 1274
(BPAI 2005) (informative) (Fed. Cir. Appeal No. 2006-1003), aff’d, (Rule
36) (June 12, 2006) (“wellness-related” data in databases and communicated
on distributed network did not functionally change either the data storage
system or the communication system used in the claimed method). See also
In re Ngai, 367 F.3d 1336, 1339 (Fed. Cir. 2004); Nehls, 88 USPQ2d at
1887-90 (discussing non-functional descriptive material). Thus, we broadly
but reasonably interpret the “structure” to be data, and we further interpret
Appellants’ claim language – “having a structure that provides storage” – in
light of Appellants’ claim language and Specification, as simply a data
structure that allows for or facilitates storage.
Further, as recited in claim 1, “to facilitate generation of the parity
bits” and “for decoding the LDPC codeword” are statements of intended use
or purpose. “An intended use or purpose usually will not limit the scope of
the claim because such statements usually do no more than define a context
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in which the invention operates.” Boehringer Ingelheim Vetmedica, Inc. v.
Schering-Plough Corp., 320 F.3d 1339, 1345 (Fed. Cir. 2003). Although
“[s]uch statements often . . . appear in the claim’s preamble,” In re Stencel,
828 F.2d 751, 754 (Fed. Cir. 1987), a statement of intended use or purpose
can appear elsewhere in a claim. Id.
Even assuming, arguendo, we attribute some weight to the actual
matrix structure, we agree with the Examiners’ finding that Richardson
describes a parity check matrix structure that facilitates (provides for)
storage of edge values in adjacent locations within memory. Richardson
describes a parity check matrix used for decoding LDPC code words (Ans.
5, 13 (citing Richardson, Fig. 7; see col. 15, ll. 15-35)) and further describes
that the “messages are stored in memory in the order indicated in row 804”
(Richardson, col. 15, ll. 45-46) and “the 12 edge messages in memory are
accessed in sequence, e.g., in the order shown in 804” (Richardson, col. 15,
ll. 47-49) (see Ans. 13). Therefore, we find that Richardson would have at
least suggested that the disclosed parity check matrix structure facilitates
storage of edge values in adjacent locations within memory.
With respect to Appellants’ argument that Richardson teaches away
the claimed invention (App. Br. 10-11), we find Appellants’ arguments are
not commensurate with the scope of Appellants’ claim. As explained by the
Examiner, Appellants claim does not preclude the use of additional features
such as a message ordering module, and in any case, Richardson’s message
ordering module is optional. (Ans. 14.)
Thus, we find Appellants’ contrary arguments unpersuasive of error in
the Examiner’s rejection for the reasons explained above. It follows that
Appellants do not persuade us of error in the Examiner’s obviousness
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rejection of representative claim 1. Appellants also do not persuade us of
error in the Examiner’s obviousness rejection of independent claims 12 and
17 and dependent claims 3-5, 13, 19, and 20, not separately argued with
particularity (supra). Accordingly, we affirm the Examiner’s obviousness
rejection of claims 1, 3-5, 12, 13, 17, 19, and 20.
The Examiner’s Rejection of Claims
22-24 Under § 103
The Examiner rejects Appellants’ independent claim 22 as being
obvious over the combination of Richardson and Cheng. (Ans. 10, 15.)
Appellants rely on the arguments made with respect to claim 1 (supra).
(App. Br. 14.) Accordingly, we find Appellants’ arguments unpersuasive of
error in the Examiner’s rejection for the reasons explained with respect to
claim 1 above. Therefore, we affirm the Examiner’s obviousness rejection
of claim 22 and claims 23 and 24, not separately argued with particularity
(supra).
Arguments Concerning the Examiner’s Rejection
of Claim 25 § 103
The Examiner rejects Appellants’ dependent claim 25 as being
obvious over the combination of Richardson and Cheng. (Ans. 10-11, 15.)
Specifically, the Examiner submits that Richardson teaches an apparatus
wherein the memory is partitioned into a top edge portion and a bottom edge
portion. (Id. (citing Richardson, Fig. 8).) Appellants contend that
Richardson “is silent as to the particular structure of any such memory,
particularly any structure, as claimed.” (App. Br. 15; see App. Br. 14; Reply
Br. 6.)
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Based on the record before us and Appellants’ contentions, we find
that the preponderance of evidence on this record supports the Examiner’s
conclusion that the subject matter of Appellants’ claim 25 is unpatentable
over the combination of Richardson and Cheng. Accordingly, we sustain the
Examiner’s rejection of claim 25 for the reasons set forth in the Answer
(Ans. 10-11, 15), which we incorporate herein by reference.
As we explained with respect to claim 1 (supra), the content of the
recited memory (the data stored in memory) is non-functional descriptive
material to which we give no patentable weight. That claim 25 also recites
the memory being partitioned such that it has “a top edge portion and a
bottom edge portion,” does not further distinguish the claim. We agree with
the Examiner that these are merely relative terms (Ans. 15) and that
Richardson describes top edges and bottom edges as well as storing these
edges in order in memory (id.). Therefore, although Richardson does not
explicitly describe partitioning a memory as recited (id.), Richardson does at
least suggest a memory containing (partitioned to contain) top and bottom
edges.
We find Appellants’ contrary arguments unpersuasive of error in the
Examiner’s rejection for the reasons explained above. Accordingly, we
affirm the Examiner’s obviousness rejection of claim 25.

NEW GROUND OF REJECTION UNDER
37 C.F.R. § 41.50(b)
Pursuant to our authority under 37 C.F.R. § 41.50(b) (2010), we are
entering the following new ground of rejection. We reject claims 1, 12, and
17 under 35 U.S.C. § 101 as being directed to non-statutory subject matter.
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Rejection of claims 1, 12, and 17 under 35 U.S.C. § 101
We begin our analysis by noting that the case law regarding § 101
continues to evolve. “[T]he Supreme Court has made clear that a patent
claim’s failure to satisfy the machine-or-transformation test is not dispositive
of the § 101 inquiry.” CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d
1366, 1371 (Fed. Cir. 2011) (citing Bilski v. Kappos, 130 S.Ct. 3218, 3227
(2010)). We also note the intervening guidance of our reviewing courts.
Thus, “[r]egardless of what statutory category (‘process, machine,
manufacture, or composition of matter,’ 35 U.S.C. § 101) a claim’s language
is crafted to literally invoke, we look to the underlying invention for patent-
eligibility purposes.” CyberSource, 654 F.3d at 1374. Following the
Federal Circuit’s approach in CyberSource (654 F.3d at 1375), we analyze
the underlying invention of each of Appellants’ independent claims as a
process.
With respect to claim 1, considering the language of independent
claim 1 as a whole, we conclude that the process of claim 1 could be
performed within the human mind or by a human writing on a piece of
paper4 – e.g., “transforming a received input message into a LDPC

4 See CyberSource, 654 F.3d at 1372 (“It is clear that unpatentable mental
processes are the subject matter of claim 3. All of claim 3’s method steps
can be performed in the human mind, or by a human using a pen and
paper.”). Manipulation of data utilizing a computer program (software), no
matter its function, is nothing more than the representation of an algorithm
or group of algorithms, conceptually no different from a list of steps written
down with pencil and paper for execution by a human being. See In re
Ferguson, 558 F.3d 1359, 1363 (Fed. Cir. 2009) (quoting Gottschalk v.
Benson, 409 U.S. 63, 67 (1972)) (“Phenomena of nature, though just
discovered, mental processes, and abstract intellectual concepts are not

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codeword using only a parity check matrix of the LDPC codes,” “storing
values of [creating or generating] the parity check matrix to facilitate
generation of the parity bits associated with the LDPC codes,” “the parity
check matrix having a structure that provides storage [facilitates creation] of
edge values in adjacent locations within memory for decoding the LDPC
codeword,” and “outputting the LDPC codeword.” Our reviewing court
guides that “a method that can be performed by human thought alone is
merely an abstract idea and is not patent-eligible under § 101.”
CyberSource, 654 F.3d at 1373. Because we conclude that the scope of
claim 1’s method steps covers functions that can be performed in the human
mind, or by a human using a pen and paper, we conclude that unpatentable
mental processes fall within the subject matter of claim 1.5 Further, given

patentable, as they are the basic tools of scientific and technological work.”);
Benson, 409 U.S. at 72; In re Comiskey, 554 F.3d 967, 979 (Fed. Cir. 2009)
(“[M]ental processes — or processes of human thinking — standing alone
are not patentable even if they have practical application.”). See also
Dealertrack, Inc. v. Huber, No. 2009-1566, 2012 WL 164439, at *17 (Fed.
Cir. Jan. 20, 2012) (“Simply adding a ‘computer aided’ limitation to a claim
covering an abstract concept, without more, is insufficient to render the
claim patent eligible.”).

5 See Cybersource, 654 F.3d at 1372 (“It is clear that unpatentable mental
processes are the subject matter of claim 3. All of claim 3’s method steps
can be performed in the human mind, or by a human using a pen and paper.
Claim 3 does not limit its scope to any particular fraud detection algorithm,
and no algorithms are disclosed in the ’154 patent’s specification. Rather,
the broad scope of claim 3 extends to essentially any method of detecting
credit card fraud based on information relating past transactions to a
particular ‘Internet address,’ even methods that can be performed in the
human mind.”); see also In re Nuijten, 500 F.3d 1346, 1354 (Fed. Cir. 2007)
(“The four categories [of § 101] together describe the exclusive reach of

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the unbounded scope of the claim limitations – “transforming a received
input message into a LDPC codeword using only a parity check matrix of
the LDPC codes . . . the parity check matrix having a structure that provides
storage of edge values in adjacent locations within memory for decoding the
LDPC codeword” (see claims 1 and 12 and commensurate language of claim
17 – means for “storing values of the parity check matrix . . . the parity
check matrix having a structure that provides storage of edge values in
adjacent locations within memory for decoding the LDPC codeword”), we
are of the view that independent claims 1, 12, and 17 are invalid as being
directed to an abstract idea preemptive of a fundamental concept or idea that
would foreclose innovation. Cf. Dealertrack, 2012 WL 164439, at *16 (“In
this case, however, we are compelled to conclude that the claims are invalid
as being directed to an abstract idea preemptive of a fundamental concept or
idea that would foreclose innovation in this area.”). We also conclude that
dependent claims 3 and 5 (dependent on claim 1), 13 (dependent on claim
12, and claim 19 (dependent on claim 17) are invalid because they cover
functions that can be performed in the human mind, or by a human using a
pen and paper and are directed to an abstract idea preemptive of a
fundamental concept or idea as explained with respect to claim 1 (supra).
For these reasons, we find that Appellants’ representative claim 1,
independent claims 12 and 17, and dependent claims 3, 5, 13, and 19 fail to
meet the requirements of 35 U.S.C. § 101 and are directed to non-statutory
subject matter. Accordingly, we reject these claims under 35 U.S.C. § 101.

patentable subject matter. If a claim covers material not found in any of the
four statutory categories, that claim falls outside the plainly expressed scope
of § 101 even if the subject matter is otherwise new and useful.”).
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With respect to claim 22, considering the language of independent
claim 22 as a whole, we conclude that claim 22 is actually directed to a
process rather than an “apparatus;” and that the process of claim 22 could be
performed within the human mind or by a human writing on a piece of paper
as explained with respect to claim 1 (supra). Although claim 22 nominally
recites memory – “a memory configured to store values” – when the claim is
analyzed as a process , as directed by CyberSource, 654 F.3d at 1374, the
recited functions can be performed by a human mind using pen and paper
(supra). We also conclude that dependent claims 23 and 25 fail to meet the
requirements of 35 U.S.C. § 101 for these same reasons. Acordingly, we
find that Appellants’ claims 22, 23 and 25 are directed to non-statutory
subject matter and we reject these claims under 35 U.S.C. § 101.

CONCLUSION OF LAW
Appellants have shown that the Examiner erred in rejecting claims 1,
12, and 17 under 35 U.S.C. § 112, second paragraph, as being indefinite.
Appellants have not shown that the Examiner erred in rejecting claims
1, 3-5, 12, 13, 17, 19, 20, and 22-25 under 35 U.S.C. § 103(a).
We enter a new ground of rejection under 35 U.S.C. § 101 for claims
1, 3, 5, 12, 13, 17, 19, 22, 23, and 25.

DECISION
We reverse the Examiner’s rejection of claims 1, 12, and 17 under 35
U.S.C. § 112, second paragraph.
We affirm the Examiner’s rejection of claims 1, 3-5, 12, 13, 17, 19,
20, and 22-25 under 35 U.S.C. § 103(a).
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We enter new grounds of rejection under 37 C.F.R. § 41.50(b) for
claims 1, 3, 5, 12, 13, 17, 19, 22, 23, and 25.
This decision contains new grounds of rejection pursuant to 37 C.F.R.
§ 41.50(b). This section provides that “[a] new ground of rejection . . . shall
not be considered final for judicial review.”
Section 41.50(b) also provides that the Appellant, WITHIN TWO
MONTHS FROM THE DATE OF THE DECISION, must exercise one of
the following two options with respect to the new grounds of rejection to
avoid termination of the appeal as to the rejected claims:
(1) Reopen prosecution. Submit an appropriate
amendment of the claims so rejected or new evidence relating
to the claims so rejected, or both, and have the matter
reconsidered by the examiner, in which event the proceeding
will be remanded to the examiner . . . .

(2) Request rehearing. Request that the proceeding be
reheard under 37 C.F.R. § 41.52 by the Board upon the same
record . . . .

No time period for taking any subsequent action in connection with this
appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED
37 C.F.R. § 41.50(b)

peb