Ex Parte Eracar et al

Patent Trial and Appeal Board

Oct 10, 2018

14024949 (P.T.A.B. Oct. 10, 2018)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
14/024,949 09/12/2013
139353 7590 10/12/2018
CHOATE I TERADYNE
TWO INTERNATIONAL PLACE
BOSTON, MA 02110
FIRST NAMED INVENTOR
Y onet A. Eracar
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO.
2012318-0261
(18523-01550
CONFIRMATION NO.
4605
EXAMINER
LUU,BINHK
ART UNIT PAPER NUMBER
2191
NOTIFICATION DATE DELIVERY MODE
10/12/2018 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
patentdocket@choate.com
jnease@choate.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte YONET A. ERACAR, MICHAEL FRANCIS MCGOLDRICK,
and STEPHAN KRACH
Appeal2017-000525
Application 14/024,949 1
Technology Center 2100
Before ROBERT E. NAPPI, KARA L. SZPONDOWSKI, and
SCOTT B. HOWARD, Administrative Patent Judges.
HOWARD, Administrative Patent Judge.
DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from the Non-Final
Rejection of claims 1-24, which constitute all of the claims pending in this
application. Oral arguments were heard on September 27, 2018. A
transcript of the hearing will be added to the record in due course. We have
jurisdiction under 35 U.S.C. § 6(b ). See Ex parte Lemoine, 46 USPQ2d
1420, 1423 (BPAI 1994) (precedential) ("so long as the applicant has twice
been denied a patent, an appeal may be filed").
We REVERSE.
1 Appellant identifies the Applicant, Teradyne, Inc., as the real party in
interest. App. Br. 3.
Appeal2017-000525
Application 14/024,949
THE INVENTION
The disclosed and claimed invention is directed to executing code on
a test instrument in response to an event. Spec. 1 :5---6.
Claim 1, reproduced below, is illustrative of the claimed subject
matter:
1. Automatic test equipment ( ATE) comprising:
a test instrument to implement a communication protocol
to communicate to a unit under test (UUT) during testing of the
UUT, the test instrument comprising memory storing bytecode
that is executable by a real-time application configured to run
on the test instrument, the real-time application being
configured to identify an event in communication between the
test instrument and the UUT and, in response to the event, to
execute the bytecode; and
a test computing system to run a test program to affect
data transfer between the test instrument and the UUT during
the testing and to download the bytecode to the test instrument
for storage in the memory, the test program being configured to
register the event with the test instrument by communicating, to
the real-time application, an identity of the event and
corresponding bytecode for the event stored in the memory.
REJECTIONS 2
Claims 1-5, 9, 10, 12-17, 21, 22, and 24 stand rejected under
35 U.S.C. § 102(a)(l) as being anticipated by IAR, Getting Started with JAR
Embedded Workbench (Oct. 2009) (hereinafter "IAR"). Non-Final Action
4--10.
2 In addition to the rejections listed in this section, in the Non-Final Action
the Examiner rejected claims 1-24 under 35 U.S.C. §§ 112(a), (b). Non-
Final Action 2--4. The Examiner withdrew those rejections in the Answer.
Ans. 12
2
Appeal2017-000525
Application 14/024,949
Claims 7, 8, 11, 19, 20, and 23 stand rejected under 35 U.S.C. §103 as
being unpatentable over IAR in view of Digilent, Xilinx !SE Simulator
(!Sim) VDHL Test Bench Tutorial (Feb. 2010) (hereinafter "Digilent").
Non-Final Action 10-12.
Claims 6 and 18 stand rejected under 35 U.S.C. §103 as being
unpatentable over IAR in view of Digilent and Xilinx, AX! Bus Functional
Model v.1.9 (June 2011) (hereinafter "Xilinx"). Non-Final Act. 12-13.
ANALYSIS
We have reviewed the Examiner's rejection in light of Appellant's
arguments that the Examiner erred. In reaching this decision, we have
considered all evidence presented and all arguments made by Appellant. We
are persuaded by Appellant's arguments regarding the pending claims.
The Examiner finds the C-SPY debugger in IAR is a "test instrument
comprising memory storing bytecode that is executable by a real-time
application configured to run on the test instrument," as recited in claim 1.
Non-Final Act. 5. According to the Examiner, "[t]he final output produced
by ILINK is an absolute object file containing the executable image [ ... ]
The file can be downloaded to C-SPY." Non-Final Act. 5 (quoting IAR, 16)
( emphasis omitted).
Appellant argues the C-SPY debugger is not a test instrument as
recited in claim 1. See App. Br. 15-19; Reply Br. 2. Specifically, Appellant
asserts "[ t ]he claimed test instrument is hardware as it comprises 'memory
storing bytecode'. By contrast, the C-Spy Debugger of the IAR reference is
software." Reply Br. 2; see also App. Br. 18 ("C-SPY is a software
debugging tool.").
3
Appeal2017-000525
Application 14/024,949
We are persuaded by Appellant's argument as the Examiner has not
identified sufficient evidence or provided sufficient explanation as to how
the C-SPY debugger is a "test instrument comprising memory storing
bytecode that is executable by a real-time application configured to run on
the test instrument," as recited in claim 1. As Appellant argues, the test
instrument recited in claim 1 is hardware that requires memory for storing
bytecode. The Examiner identifies software and does not make any specific
finding of where in the C-SPY debugger the recited memory is located. See
Non-Final Act. 5.
Accordingly, we agree with Appellant that the Examiner's finding that
IAR discloses the disputed limitation is in error because it is not supported
by a preponderance of the evidence. See In re Caveney, 761 F.2d 671, 674
(Fed. Cir. 1985) (Examiner's burden of proving non-patentability is by a
preponderance of the evidence); see also In re Warner, 379 F.2d 1011, 1017
(CCPA 1967) ("The Patent Office has the initial duty of supplying the
factual basis for its rejection. It may not, because it may doubt that the
invention is patentable, resort to speculation, unfounded assumptions or
hindsight reconstruction to supply deficiencies in its factual basis."). 3
Accordingly, we are constrained on this record to reverse the
Examiner's rejection of claim 1, along with the rejection of claim 13, which
recites a limitation commensurate in scope to the disputed limitation
discussed above, and dependent claims 2-5, 9, 10, 12, 14--17, 21, 22, and 24.
Moreover, because the Examiner has not shown that Digilent or
Xilinix cures the foregoing deficiencies regarding the rejection of the
3 Because we agree with Appellant on this dispositive issue, Appellant's
remaining arguments are moot.
4
Appeal2017-000525
Application 14/024,949
independent claims, we will not sustain the obviousness rejection of
dependent claims 6-8, 11, 18-20, and 23 (Non-Final Act. 10-13) for similar
reasons.
DECISION
For the above reasons, we reverse the Examiner's decisions rejecting
claims 1-24.
REVERSED
5