Ex Parte Emmot et al

Board of Patent Appeals and Interferences

Jun 9, 2010

10897607 - (D) (B.P.A.I. Jun. 9, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte DAREL EMMOT and BYRON ALCORN
____________

Appeal 2009-006208
Application 10/897,607
Technology Center 2100
____________

Decided: June 9, 2010
____________

Before JAMES D. THOMAS, JEAN R. HOMERE,
and CAROLYN D. THOMAS, Administrative Patent Judges.
J. THOMAS, Administrative Patent Judge.

DECISION ON APPEAL

STATEMENT OF THE CASE

This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1 through 16. We have jurisdiction under 35 U.S.C.
§ 6(b).

Appeal 2009-006208
Application 10/897,607

2
We affirm.

INVENTION
The present invention relates to computer systems and, more
particularly, to a novel system and method for managing cache access
among processing nodes in a distributed system. (Spec. [001]).

REPRESENTATIVE CLAIM

1. A system comprising:

a plurality of processing nodes, each processing node comprising a
functional unit and having a local memory directly coupled therewith,
wherein nonoverlapping portions of the local memories of the plurality of
processing nodes are configured to collectively form a unified system
memory;

each processing node of the plurality of processing nodes further
comprising a cache controller and an associated cache memory;

each processing node of the plurality of processing nodes further
comprising logic for writing requested data in the associated cache memory
if data stored near the requested data is likely to be requested again in a
proximal time and the requested data exists in the local memory of another
processing node but not in the local memory of the processing node that is
requesting the data, and for bypassing the associated cache memory if the
requested data, or data stored near the requested data, is not likely to be
requested again in a proximal time.

Appeal 2009-006208
Application 10/897,607

3
PRIOR ART AND EXAMINER’S REJECTIONS
The Examiner relies on the following reference as evidence of
anticipation and unpatentability:
Beardsley US 5,636,359 Jun. 3, 1997

Claims 1 through 4 and 6 through 16 stand rejected under 35 U.S.C.
§ 102(b) as being anticipated by Beardsley. This reference is utilized alone
to reject claim 5 under 35 U.S.C. § 103.

CLAIM GROUPINGS
Based upon Appellants’ arguments in the Appeal Brief with respect to
the rejection of claims under 35 U.S.C. § 102(b), independent claim 1 is
representative of the subject matter of independent claims 1 and 7, while
corresponding but separate arguments are presented as to independent claims
8, 11, 12, and 15. No other claim within this rejection is argued. Likewise,
no arguments are presented as to the separate rejection under 35 U.S.C.
§ 103 of claim 5.

ISSUE
Did the Examiner err in finding that the teachings of Beardsley
anticipate the subject matter of representative independent claim 1 on
appeal?

Appeal 2009-006208
Application 10/897,607

4
ANALYSIS
We refer to, rely on, and adopt the Examiner’s findings and
conclusions set forth in the Answer. The Examiner has persuasively
correlated each feature of each independent claim on appeal to the teachings
in Beardsley and has correspondingly persuasively addressed head on each
of the arguments presented in the Appeal Brief as to each independent claim.
The initial paragraph in the Reply Brief relies on the same positions set forth
in the Appeal Brief and does not otherwise contest substantially all of the
Examiner’s responsive arguments beginning at page 11 of the Answer. Our
discussion will be limited to the following points of emphasis.
In addition to what the Examiner has noted with respect to Beardsley,
we observe that this reference teaches broadly in figure 1 a plurality of host
computer systems, nodes, or functional units with what amounts to plural
storage controllers, plural buffers and main memories, as well as plural
cache storage drawers. The showings in this figure are illustrated in greater
detail in the portions of figures 2 through 5. Beardsley relies in part and
modifies in part well known algorithms in the caching art. Beardsley's
concept of destaging is illustrated in figures 7 through 12, which generally
relates to an art concept of removing cached data from cache memories
based upon levels of usage.
The substance of the Reply Brief set forth at pages 2 and 3 of it
focuses upon the feature of "nonoverlapping portions of the local memories
of the plurality of processing nodes are configured to collectively form a
Appeal 2009-006208
Application 10/897,607

5
unified system memory." This feature appears only in representative
independent claim 1 on appeal and does not appear in independent claims 7,
8, 11, 12, and 15.
Initially, to address these arguments in the Reply Brief, we first
reproduce here the responsive arguments of the Examiner’s as set forth at
page 12 of the Answer:
Applicant also argues that Beardsley does not teach non-
overlapping portions of the local memories of the plurality of
processing nodes configured to collectively form a unified system
memory. However, the examiner would like to point out that the
specification does not clearly describe what non-overlapping portions
of memory are versus overlapping portions of memory. The
specification points to co-pending application 09/768,664 as
describing the formation of a unified memory. However, there is no
clear discussion of the non-overlapping memory portions. Therefore,
the non-overlapping memory portions are being interpreted by the
examiner as being distinct memories, as disclosed by the Beardsley
reference. Beardsley discloses a plurality of host processors coupled
to each other to form a collective data store by forming a shared-
storage hierarchy, thus a unified system memory, from non-
overlapping storage such as RAM, DASD, and tape library
subsystems (see Col. 1, lines 35-45). Since the RAM, DASD, and
tape library subsystems are distinct memories, they are non-
overlapping.

(Ans. 12).

Appellants’ Reply Brief at page 2 incompletely reproduces and
considers these Examiner’s views expressed as to the argued limitation of
claim 1. We therefore strongly disagree with Appellants’ view that the
Appeal 2009-006208
Application 10/897,607

6
Examiner has ignored this feature. In fact, the Examiner’s views expressed
in this just-quoted material from the Answer indicate that the Examiner
considers Beardsley to teach plural distinctly addressable memories which
are consistent with Appellants' reasoning advanced at pages 2 through page
3 of the Reply Brief. Additionally, the cached storage drawers 26 in figure 1
of Beardsley may be considered to include plural physical memories
comprising a unified memory system with non-overlapping, separate address
spaces as revealed in the portions of Beardsley's figures 2 through 5.
A portion of the Examiner’s Answer that we reproduced earlier in this
opinion makes only a general reference to Appellants’ Specification that
relies for disclosure upon a co-pending prior date application to describe the
concept of a unified memory. We reproduce here the pertinent portion of
paragraph [014] from the Specification as filed:
As further described in co-pending application serial number
09/768,664, filed on January 24, 2001, the contents of which are
hereby incorporated by reference, a nodal system, such as the system
described herein, may be structured such that non- overlapping
portions of the RAMs 475,492, 497 (and others not shown) may be
configured to appear as a unified memory. A portion of this RAM
memory 475 may be designated to provide a centralized cache storage
for system memory (sometimes referred to as a L2 cache). In
accordance with a unified memory architecture, this L2 cache may
reside in portions associated with various nodes 480, 490, and 495 of
the illustrated embodiment, and an appropriate control mechanism
may be provided for managing data accesses to this cache memory.

(Spec. 4, [014].)

Appeal 2009-006208
Application 10/897,607

7
Pages 2 and 3 of the Reply Brief reproduce a selected portion of the
patented version of this co-pending application. Appellants appear to invite
us to read into the subject matter of representative independent claim 1 on
appeal the referenced concepts from the Specification as filed in an effort to
distinguish over the teachings of Beardsley. This argument is unpersuasive.
Moreover, Appellants have also indicated to us that the alleged patentable
distinction we quoted earlier in this opinion as to representative independent
claim 1 on appeal was also known in the art.

CONCLUSION AND DECISION
Appellants have not shown that the Examiner erred in finding that the
teachings of Beardsley anticipate the subject matter of representative
independent claim 1 on appeal as well as the subject matter of all remaining
independent claims, 7, 8, 11, 12, and 15, on appeal. Therefore, the rejection
of claims 1 through 4 and 6 through 16 as being anticipated by Beardsley is
affirmed, as is the separate rejection of claim 5 over this reference under
35 U.S.C. § 103. All claims on appeal are unpatentable.

Appeal 2009-006208
Application 10/897,607

8
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(iv).

AFFIRMED

rwk

HEWLETT-PACKARD COMPANY
Intellectual Property Administration
3404 E. Harmony Road
Mail Stop 35
FORT COLLINS, CO 80528