Ex Parte Eilert et al

Patent Trial and Appeal Board

Sep 26, 2016

12557776 (P.T.A.B. Sep. 26, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
12/557,776 09/11/2009 Sean Eilert
73115 7590 09/28/2016
SCHWEGMAN LUNDBERG & WOESSNER/MICRON
P.O. BOX 2938
MINNEAPOLIS, MN 55402
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
303.C38US1 5087
EXAMINER
CHBOUKI, TAREK
ART UNIT PAPER NUMBER
2165
NOTIFICATION DATE DELIVERY MODE
09/28/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
uspto@slwip.com
SLW@blackhillsip.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SEAN EILERT, MARK LEINWANDER, and
JARED HULBERT
Appeal2015-004652
Application 12/557 ,776 1
Technology Center 2100
Before JOSEPH L. DIXON, LARRY J. HUME, and SCOTT E. BAIN,
Administrative Patent Judges.
HUME, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134(a) of the Final
Rejection of claims 1, 3-18, and 20. Appellants have previously canceled
claims 2 and 19. We have jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.
1 According to Appellants, the real party in interest is Micron Technology,
Inc. App. Br. 2.
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Application 12/557,776
STATEMENT OF THE CASE2
The Invention
Appellants' disclosed and claimed invention relates to methods for
operating an autonomous memory architecture. Abstract.
Exemplary Claims
Claims 1, 13, and 17 reproduced below, are representative of the
subject matter on appeal (emphases added to contested limitations):
1. A method for a host to operate with a distributed
array of autonomous memory devices, the method comprising:
transferring a database from the host to a memory of the
autonomous memory devices along with information about how
the database is organized;
using hardware primitives in an autonomous memory in
each of the autonomous memory devices to manipulate memory
contents;
do\~1nloading algorithms from the host to the autonomous
memory devices for processing information in the database;
performing computations within a microcontroller in
each of the autonomous memory devices on at least portions of
the information in the database, each of the autonomous
memory devices using its own operating system to perform the
computations; and
broadcasting high level commands by the host to the
autonomous memory devices rather than providing specific
commands and addresses to the autonomous memory devices to
perform a high level function.
2 Our decision relies upon Appellants' Appeal Brief ("App. Br.," filed
Oct. 27, 2014); Reply Brief ("Reply Br.," filed Mar. 16, 2015); Examiner's
Answer ("Ans.," mailed Jan. 15, 2015); Final Office Action ("Final Act.,"
mailed July 11, 2014); and the original Specification ("Spec.," filed
Sept. 11, 2009).
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13. A method of operating an autonomous memory in
a distributed memory sub-system, the method comprising:
storing a database within the distributed memory sub-
system downloaded from a host through a host interface;
dynamically determining a configuration of multiple dice
in the distributed memory sub-system, each die of the multiple
dice comprising an autonomous memory device having a
microcontroller, to perform computations internally, and
memory;
parsing and sending out operations to the multiple dice in
the distributed memory sub-system to be executed
autonomously within each of the multiple dice; and
accumulating results and reporting to the host when the
operation is complete.
1 7. A method of connecting an autonomous memory
device in a distributed memory subsystem, the method
compnsmg:
receiving a database at a host interface, the database
being downloaded from a host controller;
initiating execution of instructions within a
microcontroller of the autonomous memory device to disperse
portions of the database to neighboring dice, the neighboring
dice comprising autonomous memory devices, using an
interface to handle inter-die communication ports within a pool
of autonomous memory; and
receiving software downloaded from the host controller
that allow the autonomous memory device to control other ones
of the autonomous memory devices that communicate within
the pool of autonomous memory.
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Application 12/557,776
Prior Art
The Examiner relies upon the following prior art as evidence in
rejecting the claims on appeal:
Willman et al. ("Willman") US 2002/0161848 Al Oct. 31, 2002
Jardin US 2004/0186832 Al Sept. 23, 2004
Aguilera et al. ("Aguilera") US 2007 /0288587 Al Dec. 13, 2007
Pasupuleti et al. ("Pasupuleti") US 2008/0065644 Al Mar. 13, 2008
Kelem et al. ("Kelem") US 2008/0297196 Al Dec. 4, 2008
Bartley et al. ("Bartley") US 2009/0006798 Al Jan. 1, 2009
Garbow et al. ("Garbow") US 2009/0064336 Al Mar. 5, 2009
Trantham US 2010/0180182 Al July 15, 2010
Rejections on Appeal
RI. Claims 1, 3, 4, and 8-11 stand rejected under 35 U.S.C.
§ 103(a) as being obvious over the combination of Aguilera and Jardin.
Final Act. 3.
R2. Claims 13-15 stand rejected under 35 U.S.C. § 103(a) as being
obvious over the combination of Aguilera, Trantham, and Jardin. Final
Act. 7.
R3. Claims 17, 18, and 20 stand rejected under 35 U.S.C. § 103(a)
as being obvious over the combination of Aguilera and Trantham. Final
Act. 10.
R4. Claim 5 stands rejected under 35 U.S.C. § 103(a) as being
obvious over the combination of Aguilera, Jardin, and Kelem. Final Act. 11.
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R5. Claim 6 stands rejected under 35 U.S.C. § 103(a) as being
obvious over the combination of Aguilera, Jardin, Kelem, and Bartley. Final
Act. 12.
R6. Claim 7 stands rejected under 35 U.S.C. § 103(a) as being
obvious over the combination of Aguilera, Jardin, and Garbow. Final
Act. 13.
R7. Claim 12 stands rejected under 35 U.S.C. § 103(a) as being
obvious over the combination of Aguilera, Jardin, and Willman. Final
Act. 13.
R8. Claim 16 stands rejected under 35 U.S.C. § 103(a) as being
obvious over the combination of Aguilera, Trantham, Jardin, and Pasupuleti.
Final Act. 14.
CLAIM GROUPING
Based on Appellant's arguments (App. Br. 10-16); we decide the
appeal of obviousness Rejection RI of claims 1, 3, 4, and 8-11 on the basis
of representative claim 1; we decide the appeal of obviousness Rejection R2
of claims 13-15 on the basis of independent claim 13; and we decide the
appeal of obviousness Rejection R3 of claims 17, 18, and 20 on the basis of
independent claim 1 7.
Remaining claims 5-7, 12, and 16 in rejections R4 through R8, not
argued separately, stand or fall with the respective independent claim from
which they depend. 3
3 "Notwithstanding any other provision of this paragraph, the failure of
appellant to separately argue claims which appellant has grouped together
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ISSUES AND ANALYSIS
In reaching this decision, we consider all evidence presented and all
arguments actually made by Appellants. We do not consider arguments that
Appellants could have made but chose not to make in the Briefs, and we
deem any such arguments waived. 37 C.F.R. § 41.37(c)(l)(iv).
We disagree with Appellants' arguments with respect to claims 1, 3-
18, and 20, and we incorporate herein and adopt as our own: (1) the findings
and reasons set forth by the Examiner in the action from which this appeal is
taken, and (2) the reasons and rebuttals set forth in the Examiner's Answer in
response to Appellants' arguments. We incorporate such findings, reasons,
and rebuttals herein by reference unless otherwise noted. However, we
highlight and address specific findings and arguments regarding claims 1, 13
and 17 for emphasis as follows.
1. § 103 Rejection RI of Claims 1, 3, 4, and 8-11
Issue 1
Appellants argue (App. Br. 10-12; Reply Br. 2-5) the Examiner's
rejection of claim 1under35 U.S.C. § 103(a) as being obvious over the
combination of Aguilera and Jardin is in error. These contentions present us
with the following issue:
Did the Examiner err in finding the cited prior art combination teaches
or suggests a method for a host to operate with a distributed array of
autonomous memory devices that includes, inter alia, the step of
"performing computations within a microcontroller in each of the
shall constitute a waiver of any argument that the Board must consider the
patentability of any grouped claim separately." 37 C.F.R. § 41.37(c)(l)(iv).
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autonomous memory devices on at least portions of the information in the
database, each of the autonomous memory devices using its own operating
system to perform the computations," as recited in claim 1?
Analysis
Appellants state, although they do "not admit that Jardin teaches or
suggests any of the elements of the claims, the undersigned will instead
focus on the misapplication of the reference to Aguilera" (App. Br. 10), and
argue, "Aguilera fails to discuss any type of microcontroller within each of a
distributed array of autonomous memory device, much less a memory device
that uses its own operating system to perform computations," in contrast to
claim 1. Id. Further along these lines, Appellants contend Aguilera teaches
a shared memory system 100 including application nodes 102 that share
memory nodes 104, such that "the microcontroller, if any, is not present in
the memory nodes 104, as suggested by the Examiner, but rather, is located
in each of the application nodes l 02 that access and share the memory
nodes. The application nodes 102 include the processor." App. Br. 11.
Appellants additionally contend server 116 in Aguilera is a memory
device "rather than any type of autonomous memory device having a
microcontroller to perform computations internally as recited by the claims
of the Application .... There is no discussion anywhere within the entirety
of Aguilera, of the server 116 having a microcontroller." Id. "Since the
memory node of Aguilera is not autonomous and does not have a
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microcontroller, then, a fortiori, the memory node of Aguilera does not
have its own operating system." Id. 4
The Examiner finds, and we agree, Aguilera teaches or suggests the
contested limitation "each of the autonomous memory devices using its own
operating system to perform the computations" at paragraphs 24, 56, 75, and
82. Final Act. 2. We also agree with the Examiner that Aguilera teaches
"performing computations within a microcontroller in each of the
autonomous memory device[ s]." Ans. 2 (citing Aguilera i-fi-1 3 8, 40, and 4 7).
In further support of the Examiner's position, we also note Aguilera
discloses " [ m ]emory nodes 104 may also be commercially available
computer systems such as desktop or laptop systems as provided by HP ...
or other computer system providers .... Typically, the memory nodes will
be equipped with larger amounts of RAM and/ or disk space than are the
application nodes 102. Memory nodes may also be more specialized devices
such as network disk drives or disk drive arrays, (e.g., RAID) .... "
Aguilera i124. We find such computer systems and specialized devices are
known to persons with skill in the art to contain controllers, including
microcontrollers.
We agree because Aguilera paragraph 40 discloses, for example,
"[t]he batched transaction instruction set 300 includes at least one subset 302
4 We note Appellants define "autonomous memory device" in the
Specification as follows: "Autonomous memory device 102 includes both
an operating system and processing capabilities, and is aware of the meaning
of its contents. Put another way, device 102 is aware of the details where
certain database tables are located, the field definitions for each of those
tables, and how they're interlinked. Using this information, autonomous
memory device 102 independently processes data in the stored database to
get results that may be returned to the host processor." Spec. i-f 17.
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selected from the group consisting of a write subset, a compare subset, a
read subset and combinations thereof," and paragraphs 7 4--7 5 disclose:
[E]ach memory node establishes a notification flag to trigger on
a subsequent write event . . . [and v] arious types of flags are
known and implemented to note an event within a system, such
as a write instruction. The type of flag established will be
determined by the operating system employed and/or control
system present for each memory node 104.
Aguilera i-fi-1 7 4--7 5 (emphasis added).
We find these related disclosures of Aguilera teach or suggest both
"performing computations within a microcontroller," and "each of the
autonomous memory devices using its own operating system to perform the
computations," as claimed.
We further note Appellants have not cited to a definition of
"microcontroller" in the Specification5 that would preclude the Examiner's
broader reading.6 Final Act. 4; Ans. 2-3.
5 "FIG. 3 shows one embodiment of functional blocks for the autonomous
memory device 102 ... [which] includes a smart memory processing engine
302 that provides control functions ... [that includes] general purpose
control engine 306 [which] is a microcontroller to receive downloaded end-
user firmware or software to control other memory devices, among other
functions." Spec. i-f 18.
6 Any special meaning assigned to a term "must be sufficiently clear in the
specification that any departure from common usage would be so understood
by a person of experience in the field of the invention." Multiform
Desiccants Inc. v. Medzam Ltd., 133 F.3d 1473, 1477 (Fed. Cir. 1998); see
also Helmsderfer v. Bobrick Washroom Equip., Inc., 527 F.3d 1379, 1381
(Fed. Cir. 2008) ("A patentee may act as its own lexicographer and assign to
a term a unique definition that is different from its ordinary and customary
meaning; however, a patentee must clearly express that intent in the written
description.").
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In the Reply Brief~ Appellants contend:
The interpretation of the term "autonomous memory device"
proffered by the Examiner with respect to the cited references is
neither reasonable, nor is it consistent with the specification.
The interpretation is not reasonable because it distorts the
meaning of the term as understood by those of skill in the art.
The interpretation by set forth by the Examiner is also not
consistent with the specification, as the undersigned will show
below. Thus, any attempt by the Examiner to characterize the
cited art as teaching an 'autonomous memory device' is beyond
that which should be reasonably allowed, and the rejection of
claims using these references under 35 U.S.C. § 103(a) is
improper.
Reply Br. 2-3 (emphasis added).
Notwithstanding Appellants indication that evidentiary support for
their argument would be provided, particularly evidentiary support for how a
person with skill in the art would interpret the contested limitations and
view the reference teachings, we note Appellants do not point to any
evidence of record that provides a definition of "autonomous memory
device" or "microcontroller."
Mere attorney arguments and conclusory statements that are
unsupported by factual evidence are entitled to little probative value. In re
Geisler, 116 F.3d 1465, 1470 (Fed. Cir. 1997); see also In re De Blauwe,
736 F.2d 699, 705 (Fed. Cir. 1984); and Ex parte Belinne, No. 2009-004693,
slip op. at 7-8 (BP AI Aug. 10, 2009) (informative), available at
http://www. uspto. gov /web/ offices/ dcom/bpai/its/fd09004693. pdf. See In re
Lovin, 652 F.3d 1349, 1357 (Fed. Cir. 2011) ("[W]e hold that the Board
reasonably interpreted Rule 41.37 to require more substantive arguments in
an appeal brief than a mere recitation of the claim elements and a naked
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assertion that the corresponding elements were not found in the prior art.");
cf In re Baxter Travenol Labs., 952 F.2d 388, 391 (Fed. Cir. 1991) ("It is
not the function of this court to examine the claims in greater detail than
argued by an appellant, looking for [patentable] distinctions over the prior
art.").
Therefore, based upon the findings above, on this record, we are not
persuaded of error in the Examiner's reliance on the combined teachings and
suggestions of the cited prior art combination to teach or suggest the
disputed limitation of claim 1, nor do we find error in the Examiner's
resulting legal conclusion of obviousness. Therefore, we sustain the
Examiner's obviousness rejection of independent claim 1, and grouped
claims 3, 4, and 8-11 which fall therewith. See Claim Grouping, supra.
2. § 103 Rejection R2 of Claims 13-15
Issue 2
Appellants argue (App. Br. 13; Reply Br. 5) the Examiner's rejection
of claim 13 under 35 U.S.C. § 103(a) as being obvious over the combination
of Aguilera, Trantham, and Jardin is in error. These contentions present us
with the following issue:
Did the Examiner err in finding the cited prior art combination teaches
or suggests a method of operating an autonomous memory in a distributed
memory sub-system that includes, inter alia, a step of "dynamically
determining a configuration of multiple dice in the distributed memory sub-
system," wherein "each die of the multiple dice compris[es] an autonomous
memory device having a microcontroller, to perform computations
internally, and memory," as recited in claim 13?
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Analysis
Appellants contend:
As discussed above with regard to independent claims 1 and 8,
none of the cited references discuss, or even hint at, a
microcontroller located within each autonomous memory
device, either to perform computations internally or to receive
software to control other ones of the autonomous memory
devices.
App. Br. 13. Appellants further state they do "not admit that Jardin teaches
or suggests any of the elements of the claims, the undersigned will instead
focus on the misapplication of the references to Aguilera and Trantham."
App. Br. 14.
Appellants repeat and expand their argument presented with respect to
claim 1, i.e., "Aguilera fails to teach or suggest any type of autonomous
memory device .... However, like Aguilera, Trantham too fails to teach or
suggest any type of autonomous memory device." Id. Appellants further
contend:
Despite the Examiner's remarks to the contrary, at no point does
Trantham teach or suggest that each die of the multiple dice
comprises an autonomous memory device having a
microcontroller, to perform computations or execute
instructions internally as recited by independent claims 13 and
17 of the Application. Therefore, neither Aguilera, Trantham,
nor Jardin teaches or suggests the elements of at least claims 13
and 17 of the Application.
App. Br. 15 (citing Final Act. 3).
In the Final Rejection, the Examiner finds, and we agree,
Aguilera teaches autonomous memory nodes but does not go
into detail regarding the die device, however in analogous art of
content management, Trantham teaches:
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multiple dice in the distributed memory sub-system,
each die of the multiple dice comprising an autonomous
memory device having a microcontroller, to perform
computations internally, and memory.
Final Act. 8 (citing Trantham, Abstract ("The present disclosure provides a
data storage system including a data memory device and controller having
interface error detection and handling logic'); i-f 23 ("it is noted that memory
212 can include any number and type of memory device(s) ... [including]
multiple logical storage units within a single die or package."); and i-f 44 ("It
is noted that data memory devices can be produced in packages containing
multiple dice, or multiple logical devices on a single die."); and see
Ans. 3--4).
We agree with the Examiner's finding and legal conclusion of
obviousness because the Examiner rejects the claims as obvious over the
combined teachings of Aguilera, Trantham, and Jardin, and the test for
obviousness is not what the references show individually but what the
combined teachings would have suggested to one of ordinary skill in the art.
See In re Merck & Co., 800 F.2d 1091, 1097 (Fed. Cir. 1986).
Therefore, based upon the findings above, on this record, we are not
persuaded of error in the Examiner's reliance on the combined teachings and
suggestions of the cited prior art combination to teach or suggest the
disputed limitation of claim 13, nor do we find error in the Examiner's
resulting legal conclusion of obviousness. Therefore, we sustain the
Examiner's obviousness rejection of independent claim 13, and grouped
claims 14 and 15 which fall therewith. See Claim Grouping, supra.
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3. § 103 Rejection R3 of Claims 17, 18, and 20
Issue 3
Appellants argue (App. Br. 13; Reply Br. 5) the Examiner's rejection
of claim 17 under 35 U.S.C. § 103(a) as being obvious over the combination
of Aguilera and Trantham is in error. These contentions present us with the
following issue:
Did the Examiner err in finding the cited prior art combination teaches
or suggests the method of claim 1 7, directed to connecting an autonomous
memory device in a distributed memory subsystem, because, purportedly,
"none of the cited references discuss, or even hint at, a microcontroller
located within each autonomous memory device, either to perform
computations internally or to receive software to control other ones of the
autonomous memory devices," as argued by Appellants? App. Br. 13.
Analysis
Appellants contend:
The Examiner relied exclusively on Jardin only to teach the
claim element of "accumulating results and reporting to the
host when the operation is complete" of claim 17. Although
the undersigned does not admit that Jardin teaches or suggests
any of the elements of the claims, the undersigned will instead
focus on the misapplication of the references to Aguilera and
Trantham.
App. Br. 14.
We first note, as mentioned by the Examiner (Ans. 4), the quoted
"accumulating" step is not recited in claim 17, nor is Jardin implicated in the
obviousness rejection of claims 17, 18, or 20. See Final Act. 10.
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Appellants further argue, "like Aguilera, Trantham too fails to teach
or suggest any type of autonomous memory device." App. Br. 14.
Although the data system of Trantham contains a controller
110, the controller is coupled to a processor in a host system.
Therefore, the data storage system 108 (which the Examiner
seems to associate with the autonomous memory device of the
claims of the Application), is not an autonomous memory
device since it relies on an external processor. The controller is
only capable of transferring information to the memory.
App. Br. 14--15.
We, therefore, find the principal issue presented with respect to the
rejection of claim 17 is the same as Issue 2, claim 13, supra, and we agree
with the Examiner's finding that the "Aguilera reference clearly teaches the
autonomous memory device as claimed."
We reiterate, "one cannot show non-obviousness by attacking
references individually where ... the rejections are based on combinations
of references." In re Keller, 642 F.2d 413, 426 (CCPA 1981). "The test for
obviousness is not whether the features of a secondary reference may be
bodily incorporated into the structure of the primary reference .... Rather,
the test is what the combined teachings of those references would have
suggested to those of ordinary skill in the art." Id. at 425 (emphasis added).
Therefore, based upon the findings above, on this record, we are not
persuaded of error in the Examiner's reliance on the combined teachings and
suggestions of the cited prior art combination to teach or suggest the
disputed limitation of claim 17, nor do we find error in the Examiner's
resulting legal conclusion of obviousness. Therefore, we sustain the
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Examiner's obviousness rejection of independent claim 17, and grouped
claims 18 and 20 which fall therewith. See Claim Grouping, supra.
4. Rejections R4-R8 of Claims 5-7, 12, and 16
In view of the lack of any substantive or separate arguments directed
to obviousness Rejections R4 through R8 of claims 5-7, 12, and 16 under
§ 103 (see App. Br. 16), we sustain the Examiner's rejection of these claims.
Arguments not made are waived.
REPLY BRIEF
To the extent Appellants may advance new arguments in the Reply
Brief (Reply Br. 2---6) not in response to a shift in the Examiner's position in
the Answer, we note arguments raised in a Reply Brief that were not raised
in the Appeal Brief or are not responsive to arguments raised in the
Examiner's Answer will not be considered except for good cause (see 37
C.F.R. § 41.41(b)(2)), which Appellants have not shown.
CONCLUSION
The Examiner did not err with respect to obviousness Rejections RI
through R8 of claims 1, 3-18, and 20 under 35 U.S.C. § 103(a) over the
cited prior art combinations of record, and we sustain the rejections.
DECISION
We affirm the Examiner's decision rejecting claims 1, 3-18, and 20.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv).
AFFIRMED
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