Ex Parte Duff et al

Patent Trial and Appeal Board

Feb 19, 2016

12263852 (P.T.A.B. Feb. 19, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
12/263,852 11103/2008
126149 7590
Keysight Technologies, Inc.
C/O CPA Global
P.O. Box 52050
Minneapolis, MN 55402
02/23/2016
FIRST NAMED INVENTOR
Christopher P. Duff
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
20080144-01 9010
EXAMINER
ELL, MATTHEW
ART UNIT PAPER NUMBER
2172
NOTIFICATION DATE DELIVERY MODE
02/23/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
keysightdocketing@cpaglobal.com
notice.legal@keysight.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte CHRISTOPHER P. DUFF, CHERYL FINCHER,
BRUCE A. ERICKSON, and JAY A. ALEXANDER
Appeal2014-001517
Application 12/263,852
Technology Center 2100
Before BRUCE R. WINSOR, JOHN F. HORVATH, and
AMBER L. HAGY, Administrative Patent Judges.
WINSOR, Administrative Patent Judge.
DECISION ON APPEAL
Appellants 1 appeal under 35 U.S.C. § 134(a) from the final rejection
of claims 1-17, which constitute all the claims pending in this application.
We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
1 The real party in interest identified by Appellants is Agilent Technologies,
Inc. (App. Br. 3.)
Appeal2014-001517
Application 12/263,852
STATEMENT OF THE CASE
Appellants' disclosed invention relates to an oscilloscope having an
analog display of a signal and a listing of the logical content of the signal.
(Spec. i-f 2.) Representative claim 1 reads as follows:
1. A method comprising:
for an analysis instrument,
displaying a waveform window and a decode window
on a screen, the decode window displaying decoded symbol or
packet data for a signal trace displayed in the waveform
window; and
navigating both the signal trace displayed in the
waveform window and entries displayed in the decode
window by one of positioning a marker in the waveform
window and selecting an entry in the decode window, the
positioning of the marker causing a correlated entry in the
decode window to be selected, and the selecting of the entry
in the decode window causing a correlated time of the signal
trace to be marked.
Claims 1-17 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Alexander et al. (US 6,229 ,5 3 6 B 1; iss. May 8, 2001;
hereinafter "Alexander") and Blomquist (US 2004/0196308 Al; publ. Oct.
7, 2004). (See Final Act. 2-10.)
Rather than repeat the arguments here, we refer to the Briefs ("App.
Br." filed June 4, 2013; "Reply Br." filed Oct. 29, 2013) and the
Specification ("Spec." filed Nov. 3, 2008) for the positions of Appellants,
and the Final Office Action ("Final Act." mailed Jan. 4, 2013) and Answer
("Ans." mailed Aug. 29, 2013) for the reasoning, findings, and conclusions
of the Examiner. Only those arguments actually made by Appellants have
been considered in this decision. Arguments that Appellants did not make in
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Application 12/263,852
the Briefs have not been considered and are deemed to be waived. See
37 C.F.R. § 41.37(c)(l)(iv) (2012).
ISSUES
Appellants' substantive arguments are directed to claim 1. (See App.
Br. 6-12.) Appellants' arguments for the patentability of claims 2-17 rely
on the arguments made for claim 1. (See App. Br. 12-13.) Therefore, we
select claim 1 as the representative claim, pursuant to our authority under
37 C.F.R. § 41.37(c)(l)(iv). Claims 2-17 stand or fall with claim 1.
The issues presented by Appellants' contentions are as follows:
Issue 1 - Does the combination of Alexander and Blomquist teach or
suggest "displaying a waveform window and a decode window on a screen,
the decode window displaying decoded symbol or packet data for a signal
trace displayed in the waveform window," as recited in claim 1?
Issue 2 - Does the combination of Alexander and Blomquist teach or
suggest
navigating both the signal trace displayed in the waveform
window and entries displayed in the decode window by one
of positioning a marker in the waveform window and
selecting an entry in the decode window, the positioning of
the marker causing a correlated entry in the decode window to
be selected, and the selecting of the entry in the decode
window causing a correlated time of the signal trace to be
marked,
as recited in claim 1?
Issue 3 - Does the Examiner err in concluding the invention recited
in claim 1 would have been obvious at the time of the invention in light of
the combined teachings of Alexander and Blomquist?
3
Appeal2014-001517
Application 12/263,852
ANALYSIS
Issue 1
Appellants contend the combination of Alexander and Blomquist fails
to teach or suggest displaying a waveform window and a corresponding
decode window on a screen. (App. Br. 8.) In particular, Appellants contend
Blomquist does not display a signal trace, but, rather, displays windows
having only various presentations of decoded symbol or packet data (App.
Br. 6-7 (citing Blomquist i-f 5, Fig. 8)), while Alexander displays only
windows having signal traces at different levels of scope (App. Br. 7; see,
e.g., Alexander Figs. 3B-E).
We are not persuaded of error. "The test for obviousness is not
whether ... the claimed invention ... [is] expressly suggested in any one or
all of the references. Rather, the test is what the combined teachings of the
references would have suggested to those of ordinary skill in the art." In re
Keller, 642 F.2d 413, 425 (CCPA 1981). Furthermore, "one cannot show
non-obviousness by attacking references individually where, as here, the
rejections are based on combinations of references." Id. at 426.
We accept, arguendo and without deciding, Appellants' contention
that Blomquist does not teach or suggest displaying a signal trace. We
nonetheless agree with the Examiner that
Alexander in view of Blomquist teaches the disputed
limitation . . . because Alexander teaches a signal trace
displayed in a waveform window and because Blomquist
teaches a decode window displaying decoded symbol or
packet data for data displayed in another graphical window,
[so] that the combination of the two teaches a decode window
displaying decoded symbol or packet data for a signal trace
displayed in the waveform window.
4
Appeal2014-001517
Application 12/263,852
(Ans. 5.)
For emphasis only, we note the background section of the
Specification refers to U.S. Patent Application 10/799,139 (Spec. i-f 1),
which was published as Duff et al. (US 2005/0201488 Al; publ. Sept. 15,
2005; hereinafter "Duff '488"). In describing Duff '488, Appellants state
the following: "Modem oscilloscopes do much more than measure voltage
and time. . . . This technology brings the protocol decoding capability of a
protocol analyzer or logic analyzer into an oscilloscope. By displaying
protocol in a scope, users can see signal integrity causes of logic faults."
(Spec. i-f 1 (emphasis added).) The Specification continues "[h]ence the
Agilent oscilloscopes represent this data as follows with the analog signal
displayed at top in voltage and time and a listing below showing the logical
content of the entire signal acquisition." (Spec. i-f 2 (emphasis added); see
also Duff' 488, Fig. 2.) Therefore, cumulatively with the Examiner's
findings and reasoning, Appellants' Specification concedes that it was
known at the time of the invention to display a signal trace (i.e., analog
signal in voltage and time) on a screen together with corresponding decoded
symbol or packet data (i.e., logical content of the signal).
Issue 2
Appellants contend the combination of Alexander and Blomquist fails
to teach or suggest "a two way relationship between marking and selection
such that marking the waveform causes selection of an entry, and selection
of an entry causes marking of a waveform." (App. Br. 10.) We disagree
with Appellants' characterization of claim 1. Claim 1 recites "navigating
both the signal trace displayed in the waveform window and entries
displayed in the decode window by one of positioning a marker in the
5
Appeal2014-001517
Application 12/263,852
waveform window and selecting an entry in the decode window."
(Emphasis added.) Thus, we conclude claim 1 recites the "positioning" and
"selecting" steps in the alternative, i.e., the performance of only one of them
is required by the claim.
Nevertheless, even if we were to accept (which we do not), arguendo,
Appellants' proposed claim construction, we would be unpersuaded of error.
As found by the Examiner, Alexander teaches an analysis instrument
displaying a signal trace in a main waveform window in which positioning a
marker in the main waveform window causes information about the marked
portion of the waveform to be displayed in another window of the display,
i.e., a magnified display of the marked portion. (Final Act. 3 (citing
Alexander Abstract, Figs. 3A-E, 6, 7).) We note that Alexander's main and
magnified waveforms (i.e., signal traces) are each displayed (Alexander Fig.
3B) in a graphical window.
Blomquist teaches a graphical window (Blomquist Fig. 8 (items 28,
96)) and a decode window (id. (items 12, 18)), and navigating between the
graphical window and decode window by positioning a marker in the
graphical window 28, 96 to make a selection in the decode window 12, 18.
(Final Act. 3--4 (citing Blomquist i-fi-1 57, 67, Fig. 8).) Further, contrary to
Appellants' contention (App. Br. 11), Blomquist teaches a two way
relationship between selections in the various panes or windows.
Specifically, Blomquist teaches that "[t]he different panes of the display may
be synchronized such that selecting a frame in either the summary display
view 12 or the graphical display view 28 will result in that frame being
selected and displayed in all other panes of the display (12, 14, 16, and 96)."
(Blomquist i167.) Therefore, a selection of a frame in the summary display
6
Appeal2014-001517
Application 12/263,852
(i.e., decode) window 12, 18 will result in selection and display of that frame
in the graphical display window 28, 96, and a selection of a frame in the
graphical display window 28, 96 will result in selection and display of that
frame in the summary display window 12, 18. (See Blomquist Fig. 8.)
As to Appellants' contention that Blomquist does not teach "marking"
as recited in claim 1 (App. Br. 11), Blomquist's summary display window
12, 18 and graphical display window 28, 98 both display a plurality of
frames. (Id.) We find that Blomquist's teaching of "selecting a particular
frame" (Blomquist i-f 57 (emphasis added)) and that "selecting a frame in
either the summary display view 12 or the graphical display view 28 will
result in that frame being selected and displayed" in the other one of the
graphical display view and the summary display window (id. i-f 67 (emphases
added)) teaches the use of markers. Lastly, we note the fact that Blomquist's
hex display view 16, 22 (id. Fig. 8) may show only the entire selected frame
(see App. Br. 11) does not negate the marking of the frame in the summary
display view and the graphical display view.
Issue 3
Appellants contend Alexander's oscilloscope and Blomquist's
network analyzer are "two fundamentally different measurement
instruments" (App. Br. 12) such that a person of ordinary skill in the art
would not have combined them to produce the invention recited in claim 1.
(Id.) We disagree.
In an obviousness analysis,
[t]wo separate tests define the scope of analogous prior art:
(1) whether the art is from the same field of endeavor,
regardless of the problem addressed and, (2) if the reference is
not within the field of the inventor's endeavor, whether the
7
Appeal2014-001517
Application 12/263,852
reference still is reasonably pertinent to the particular problem
with which the inventor is involved.
In re Klein, 647 F.3d 1343, 1348 (Fed. Cir. 2011). Both Alexander and
Blomquist relate to signal analysis, (Alexander, Abstract; Blomquist,
Abstract), as does the invention of claim 1. Both are, therefore, in the same
field of endeavor as Appellants' invention. Furthermore, both Alexander
and Blomquist relate to correlating information in different views of an
analyzed signal, and are, therefore reasonably pertinent to the problem
addressed by the invention: "correlat[ing] the information in the [logical
content] listing below to the analog signal above." (Spec. i-f 3.)
Blomquist teaches that it is advantageous to display different
representations of analyzed signal data together. (Blomquist Fig. 8.)
Alexander similarly teaches displaying different representations of analyzed
signal data together. (Alexander Figs. 3B-E.) Blomquist further teaches
navigating between a graphical display window 28, 96 (Blomquist Fig. 8)
and a decode display window 12, 18 (id.). One of ordinary skill in the art
would have found it obvious to incorporate Alexander's oscilloscope signal
trace as a graphical display window in Blomquist's network analyzer "to
connect the elements on the various views for the user" (Final Act. 4), as
evidenced by both Alexander (Figs. 3B-E) and Blomquist (Fig. 8). Such a
combination would have been no more than "[ t ]he combination of familiar
elements according to known methods ... [that] does no more than yield
predictable results," KSR Int'! Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007),
i.e., an obvious variation.
As noted supra, cumulatively with the Examiner's findings,
reasoning, and conclusions, Appellants' Specification concedes that it was
known at the time of the invention to display a signal trace (i.e., analog
8
Appeal2014-001517
Application 12/263,852
signal in voltage and time) on a screen together with corresponding decoded
symbol or packet data (i.e., logical content of the signal). (See Spec. i-fi-f l-
2.)
Summary
After considering Appellants' Arguments (App. Br. 6-12; Reply Br.
4--8), we find no error in the Examiner's rejection of claim 1. Accordingly,
we sustain the rejection of representative claim 1, and claims 2-17, which
fall with claim 1.
DECISION
The decision of the Examiner to reject claims 1-17 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l). See 37 C.F.R.
§ 1.136(a)(l )(iv).
AFFIRMED
9
Notice of References Cited
*
Document Number Date
Country Code-Number-Kind Code MM-YYYY
A US-2005/0201488-A 1 09/2005
B US-
c US-
D US-
E US-
F US-
G US-
H US-
I US-
J US-
K US-
L US-
M US-
*
Document Number Date
Country Code-Number-Kind Code MM-YYYY
N
0
p
Q
R
s
T
Application/Control No.
12/263,852
Examiner
AppealNo.2014-001517
U.S. PATENT DOCUMENTS
Name
Duff et al.
FOREIGN PATENT DOCUMENTS
Country
NON-PATENT DOCUMENTS
Name
Applicant(s)/Patent Under
Reexamination
Duff et al.
Art Unit
2172 I Page 1 of 1
Classification
375/316
Classification
* Include as applicable: Author, Title Date, Publisher, Edition or Volume, Pertinent Pages)
u
v
w
x
*A copy of this reference 1s not being furnished with this Office action. (See MPEP § 707.05(a).)
Dates in MM-YYYY format are publication dates. Classifications may be US or foreign.
U.S. Patent and Trademark Office
PT0-892 (Rev. 01-2001) Notice of References Cited Part of Paper No.
I lllll llllllll II llllll lllll lllll lllll lllll lllll lllll lllll 111111111111111111111111111111111
US 20050201488Al
(19) United States
(12) Patent Application Publication
Duff et al.
(10) Pub. No.: US 2005/0201488 Al
( 43) Pub. Date: Sep. 15, 2005
(54) DISPLAY OF DIGITAL INTERFACE SYMBOL
INFORMATION FROM AN ANALOG SIGNAL
(52) U.S. Cl. .............................................................. 375/316
(76) Inventors: Christopher P. Duff, Colorado Springs,
CO (US); Richard Douglas Eads,
Colorado Springs, CO (US)
(57) ABSTRACT
A system and method for displaying digital interface symbol
information from at least one analog signal is provided. The
digital interface symbol information includes encoded sym-
bols as well as decoded information the encoded symbols
represent. First, a set of data samples of the analog signal is
captured at a frequency at least as high as the switching rate
of the analog signal. The set of data samples is then
converted into a serial bit stream by way of either a provided
or extracted clock. The serial bit stream is searched for one
or more sync symbols identified with the particular encoding
scheme employed in the digital interface. Using the sync
symbols, the encoded symbols in the serial bit stream are
identified. At least some of the digital interface symbol
information, such as the encoded symbols and the decoded
information, are then correlated and displayed with a trace
of the analog signal.
Correspondence Address:
AGILENT TECHNOLOGIES, INC.
Legal Department, DL429
Intellectual Property Administration
P.O. Box 7599
Loveland, CO 80537-0599 (US)
(21) Appl. No.:
(22) Filed:
10/799,139
Mar. 12, 2004
Publication Classification
(51) Int. Cl.7 ..................................................... H04L 27/06
105
100 7
CAPTU EA SET OF DATA SAMPLES OF THE ANALOG SIGNAL AT A FREQUENCY AT
LEAST AS HIGH AS THE SWITCHING RATE OF THE ANALOG SIGNAL
110
RECOVE A CLOCK FROM THE ANALOG SIGNAL OR THE SET OF DATA SAMPLES OF
THE ANALOG SIGNAL
115
\
CONVERT THE ANALOG SIGNAL INTO A SERIAL BIT STREAM USING THE CLOCK
120
125
130
S ARCH THE SERIAL BIT STREAM FOR ONE OR MORE SYNC SYMBOLS
IDEN IFY THE 10-BIT SYMBOLS IN THE SERIAL BIT STREAM USING THE SYNC
SYMBOLS
DECODE THE 10-BIT SYMBOLS INTO 8-BIT DATA VALUES AND COMMAND CODES
135
DISPLAY THE RECOVERED DIGITAL INFORMATION (10-BIT SYMBOLS, 8-BIT DATA
VALUES, COMMAND CODES) CORRELATED WITH THE ANALOG SIGNAL
140 -
DISPLAY HIGHER-LEVEL INTERFACE INFORMATION DERIVED FROM THE RECOVERED
DIGITAL INFORMATION
145
SEARCH THE RECOVERED DIGITAL INFORMATION FOR PRESELECTED RECOVERED
DIGITAL INFORMATION OR HIGHER-LEVEL INTERFACE INFORMATION
150
TRIGGER HE STORING OF THE SET OF DATA SAMPLES OF THE ANALOG SIGNAL AND
THE RECOVERED DIGITAL INFORMATION BASED ON MATCHING ALL OR PART OF ONE
OR MORE PRESELECTED DIGITAL INFORMATION OR HIGHER LEVEL INTERFACE
INFORMATION
Patent Application Publication Sep. 15, 2005 Sheet 1 of 4 US 2005/0201488 Al
105
100 I
' CAPTU~E A SET OF DATA SAMPLES OF THE ANALOG SIGNAL AT A FREQUENCY AT
LEAST AS HIGH AS THE SWITCHING RATE OF THE ANALOG SIGNAL
110' +
RECOVE°R A CLOCK FROM THE ANALOG SIGNAL OR THE SET OF DATA SAMPLES OF
THE ANALOG SIGNAL
115' + \
CONVERT THE ANALOG SIGNAL INTO A SERIAL BIT STREAM USING THE CLOCK
120' +
S~ARCH THE SERIAL BIT STREAM FOR ONE OR MORE SYNC SYMBOLS
125 ' +
IDENtlFY THE 10-BIT SYMBOLS IN THE SERIAL BIT STREAM USING THE SYNC
SYMBOLS
130 ' +
DECOdE THE 10-BIT SYMBOLS INTO 8-BIT DATA VALUES AND COMMAND CODES
135 ' ~
DISPL~Y THE RECOVERED DIGITAL INFORMATION (10-BIT SYMBOLS, 8-BIT DATA
VALUES, COMMAND CODES) CORRELATED WITH THE ANALOG SIGNAL
140 ~ +
DISPLAY ~IGHER-LEVEL INTERFACE INFORMATION DERIVED FROM THE RECOVERED
DIGITAL INFORMATION
145 ' +
' SEARCH THE RECOVERED DIGITAL INFORMATION FOR PRESELECTED RECOVERED
DIGITAL INFORMATION OR HIGHER-LEVEL INTERFACE INFORMATION
150 ~ +
TRIGGER 'rrHE STORING OF THE SET OF DATA SAMPLES OF THE ANALOG SIGNAL AND
THE RECOVERED DIGITAL INFORMATION BASED ON MATCHING ALL OR PART OF ONE
OR MORE PRESELECTED DIGITAL INFORMATION OR HIGHER LEVEL INTERFACE
INFORMATION
FIG. 1
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US 2005/0201488 Al
DISPIAY OF DIGITAL INTERFACE SYMBOL
INFORMATION FROM AN ANALOG SIGNAL
BACKGROUND OF THE INVENTION
[0001] As digital electronics technology progresses, high-
speed digital serial interfaces or busses become more popu-
lar in computer and communications systems.
[0002] Many of these busses, including Fibre Channel,
Serial Advanced Technology Attachment (Serial ATA),
Serial Attached Small Computer Systems Interface (Serial
Attached SCSI, or SAS), and Gigabit Ethernet, employ an
analog signal carrying digital information that is transmitted
over a communications channel. The channel may be com-
prised of an electrically conductive wire or optical link
between discrete electronic devices or between portions
within a single device, or may exist as a wireless commu-
nications link.
[0003] Often, such a serial interface will employ an 8-bit/
10-bit (8b/10b) encoding scheme. Under such a scheme, the
analog signal switches between two distinct voltage levels,
thereby representing a stream of binary digits, or bits. In this
case, the frequency of the switching of the analog signal is
the data rate of the bit stream represented by the analog
signal. These bits form 10-bit symbols, some of which are
data codes, which represent decoded 8-bit data bytes. Other
10-bit symbols are command codes, which present various
command and signaling information onto the communica-
tions channel. This 8b/10b encoding scheme results in serial
data being transmitted over the channel that is self-clocking
in nature. After transmission, the embedded clocking infor-
mation is extracted, and the 10-bit data codes are decoded to
their original 8-bit data bytes for use by the receiving circuit.
The 10-bit command codes are utilized to further interpret
the data codes received via the channel.
[0004] The 8b/10b encoding scheme provides at least two
primary advantages desirable in serial data communication.
For example, the self-clocking nature of the encoding, which
provides significant signal transition density, allows rela-
tively simple clock recovery. Another advantage of the
8b/10b scheme is that a properly encoded serial bit stream
exhibits direct-current (DC) balance, in that the number of
ones and zeros remain substantially equal over even short
portions of the stream. This DC balance is an asset in both
fiber optic and electromagnetic wire physical interfaces,
which often have difficulty properly detecting ones and
zeros on DC-imbalanced data streams.
[0005] More information on 8b/10b encoding scheme can
be obtained from a variety of sources, including the PCI
Expressâ„¢ Base Specification, Revision 1.0a, published Apr.
15, 2003 (see Section B, "Symbol Encoding," p. 411, Table
B-1 ), and Serial ATA: High Speed Serialized AT Attachment,
Revision 1.0a, published Jan. 7, 2003 (see Section 7.2,
"Encoding Method," p. 129), both of which are hereby
incorporated herein by reference.
[0006] When circuit designs implementing an 8b/10b-
based communications interface are first being tested, or
"debugged," signal protocol problems or data corruption can
be difficult to diagnose. Oftentimes, problems with the
integrity of the associated analog signal are the root cause of
such maladies. In such cases, the digital oscilloscope, with
its ability to sample an analog voltage signal very quickly
1
Sep. 15,2005
and to store many data samples at one time, provides an
appropriate vehicle which an electronics designer can utilize
to test an 8b/10b-based interface. However, oscilloscopes
typically do not provide digital interface information or
similar data that would aid the designer in understanding the
symbols being transmitted over the interface. As a result,
designers are normally required to manually interpret the
analog signal captured by the oscilloscope in order to
decipher the results in an attempt to determine the cause of
a particular problem.
[0007] As a result, given the foregoing discussion, a need
currently exists for extracting and displaying useful 8b/10b
symbol information from an analog signal to improve the
ability of an electronics designer to debug problems asso-
ciated with such an interface. The means for satisfying that
need may also be applied to other digital interfaces as well.
SUMMARY OF THE INVENTION
[0008] Embodiments of the invention, to be discussed in
detail below, provide a method for displaying digital inter-
face symbol information from at least one analog signal. The
digital interface symbol information includes encoded sym-
bols and decoded information the encoded symbols repre-
sent. The method begins with capturing a set of data samples
of the analog signal at a frequency at least as high as the
switching rate of the analog signal. The set of data samples
is then converted into a serial bit stream by way of a
provided or extracted clock. The serial bit stream is then
searched for one or more sync symbols of the particular
encoding scheme involved. Using the sync symbols, the
encoded symbols in the serial bit stream are identified. The
resulting digital symbol information derived is displayed in
a correlated fashion vvith a trace of the analog signal. A
system for displaying digital interface symbol information
from the analog signal is also provided.
[0009] Other aspects and advantages of the invention will
become apparent from the following detailed description,
taken in conjunction with the accompanying drawings,
illustrating by way of example the principles of the inven-
tion.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] FIG. 1 is a flow diagram of a method for displaying
8b/10b symbol information from an analog waveform
according to an embodiment of the invention.
[0011] FIG. 2 is a sample oscilloscope display of 8b/10b
symbol information correlated with an analog signal trace
according to an embodiment of the invention.
[0012] FIG. 3 is a sampie graphical user interface asso-
ciated with an embodiment of the invention for allowing an
oscilloscope user to specify search and trigger criteria for
displaying an analog signal trace correlated with digital
interface symbol information.
[0013] FIG. 4 is a block diagram of a system of displaying
8b/10b symbol information from an analog waveform
according to an embodiment of the invention.
DETAILED DESCRIPTION OF EMBODIMENTS
OF THE INVENTION
[0014] Various embodiments of the invention, described
herein, allow 8b/10b protocol and data information encoded
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into an analog signal to be displayed and time-correlated
with the analog signal, typically on a display device asso-
ciated with a digital oscilloscope. Such a display device may
be integrated with the oscilloscope, a separate monitor
coupled with the oscilloscope, a separate monitor associated
with a personal computer coupled with the oscilloscope, and
so on. A display of the analog signal juxtaposed with the
8b/10b information aids the designer in visualizing where
within the analog signal any problems in the protocol
information and decoded data lie, allowing the designer to
more quickly and readily determine the ultimate source of
any errors encountered.
[0015] Embodiments of the present invention are dis-
cussed below in conjunction with a digital oscilloscope.
However, other electronics test and measurement devices
that are not specificaHy termed osciHoscopes may provide
similar functionality, such as sampling an analog waveform
digitally for ultimate display for the user, and thus may also
be employed in conjunction with embodiments of the inven-
tion.
[0016] Furthermore, the analysis of other digital inter-
faces, both serial- and parallel-oriented, may benefit from
alternate embodiments of the invention based on the prin-
ciples expressed below regarding embodiments associated
with the 8b/10b encoding scheme. For example, embodi-
ments of the invention related to the I2C (Inter-Integrated
Circuit) interface, SPI (Serial Peripheral Interface), CAN
(Controller Area Network), 4b/5b encoding, gray codes, and
other schemes may be employed using the disclosed prin-
ciples.
[0017] A high-level flow diagram describing a method 100
according to an embodiment of the invention is presented in
FIG. 1. First, a set of data samples of the analog signal is
captured at a frequency at least as high as the switching rate
of the analog signal (step 105). Typically, however, the
sampling frequency of the oscilloscope would be several
times higher than the switching rate to ensure capture of all
encoded data bits being transferred over the interface, as
well as to capture any unintended transitions in the analog
signal that may cause problems in the decoding of the
transmitted data. Modem digital oscilloscopes typically
allow many such samples to be captured at a high frequency
in a single acquisition. For example, at 20 gigasamples per
second, using an oscilloscope with a memory depth of 1
megasample, a total of approximately 125,000 data bits, or
about 12,500 8b/10b symbols, of a 2.5 gigahertz (GHz)
8b/10b analog signal may be captured, resulting in a sam-
pling rate of eight times the switching frequency of the
analog signal.
[0018] By logical extension, embodiments associated a
parallel (multi-bit) interface would involve a plurality of
analog signals being captured and processed in a manner
akin to that described herein for a single analog signal
associated with a serial interface, such as one employing the
8b/10b encoding scheme.
[0019] Once the data samples have been captured, the
clock associated with the 8b/10b symbols on the analog
signal is recovered (step 110). This clock may be derived
either directly from the analog signal, or from the captured
data samples. The clock may take the form of an electronic
signal generated by hardware during the recovery process.
Alternately, the clock may be represented by a list of clock
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Sep. 15,2005
locations that are generated by a software clock recovery
algorithm, with each clock location being a point in time
relative to the set of data samples of the analog signal. As a
result, several different methods available from the prior art
for recovering the clock may be employed, depending on the
circumstances involved.
[0020] For example, a first- or second-order analog hard-
ware phase-locked loop (PLL), residing either within or
external to the oscilloscope, may be used. Alternately, a
digital hardware PLL, often employing a fast read-only
memory (ROM) to both generate the clock while adjusting
the frequency of that clock based on changes in the analog
signal, may be utilized. Also, a software PLL may be used,
such as that which is the subject of U.S. patent application
Ser. No. 10/391,908 by Dennis J. Weller and Steve D.
Draving, entitled APPARATUS AND METHOD FOR
CLOCK RECOVERY AND EYE DIAGRAM GENERA-
TION, filed on Mar. 19, 2003, assigned to Agilent Tech-
nologies, Inc., which is hereby incorporated herein by ref-
erence.
[0021] Other methods, such as constant frequency clock
recovery, may be employed as well. In this mode, the best-fit
frequency and phase of the clock are determined automati-
cally by the oscilloscope. In alternate embodiments, the user
may specify the frequency, leaving the oscilloscope to
determine the best-fit phase. In both cases, a linear regres-
sion algorithm may be employed to determine the best-fit
phase or frequency, although other methods from the prior
art may be used as well. Also, such algorithms are typically
realized in software, although hardware implementations,
such as a field-programmable gate array (FPGA), may also
be provided.
[0022] Ordinarily, the method used to recover the clock is
substantially similar to that expected to be employed by a
typical receiver of the analog signal. However, any of the
aforementioned methods, or others from the prior art not
herein described, may be implemented to recover the clock.
Additionally, interfaces other than those employing the
8b/10b scheme, such as I2C (Inter-Integrated Circuit) and
SPI (Serial Peripheral Interface), provide an explicit clock,
thereby eliminating the necessity of separate clock recovery
by the oscilloscope. Still others may explicitly provide a
method of clock recovery specific to a particular interface.
[0023] Next, the recovered clock is then used to convert
the data samples into a serial bit stream (step 115). Typically,
this conversion is accomplished by reading each captured
sample that aligns with a transition of the recovered clock,
and then comparing each captured sample to some threshold
value to determine whether that captured sample represents
a binary one or zero. Alternately, a two-threshold system
may be implemented, whereby captured samples over a
'high' threshold may be viewed as a one, those under a 'low'
threshold would be deemed a zero, and those lying between
the high and low thresholds would represent an invalid state
of the analog signal. Such an invalid state would indicate
some problem with the transmitting circuit or the commu-
nication channel involved, thereby providing the designer
with additional information regarding the functionality of
the communications channel.
[0024] Once the serial bit stream is generated, the stream
is searched for one or more synchronization ("sync") sym-
bols (step 120) so that the boundaries of each 10-bit encoded
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symbol may be identified (step 125). Alternately, the serial
bit stream may be segmented into 10-bit words while the
stream is searched for sync symbols, with a subsequent
realignment of the 10-bit word boundaries occurring after
the sync symbols have been found. Sync symbols, referred
to in 8b/10b terminology as K28.1, K28.5, and K28.7,
represent a few of the command ('K') codes available for
signaling purposes, as opposed to the data codes ('D') used
for the actual data to be transmitted. The sync symbols,
representing the encoded data pattern OOlllllXXX (the X's
denoting 'don't care' bits), provide the receiver of the
8b/10b serial bit stream with a way of determining where
each 10-bit code begins and ends. In some 8b/10b-related
literature, these sync symbols are also referred to as "comma
characters."
[0025] Any search aigonthm applicable to a senal stream
of digital data may be employed to find one or more sync
symbols among the encoded data bits. For example, the
serial bit stream may be searched starting at the beginning
using a 10-bit moving window that progressives toward the
end of the captured data stream one bit at a time until a sync
symbol is located. In some embodiments, this searching
process may continue to identify other sync symbols located
within the serial bit stream. Alternately, subsequent sync
symbols may be ignored.
[0026] Assuming one or more sync symbols have been
located, and the boundaries of the 10-bit symbols deter-
mined as a result, the 10-bit symbols may be decoded to their
associated 8-bit data values and command codes (step 130).
Decoding may progress both forward and backward in the
data stream from a sync symbol. Also, if more than one sync
symbol has been detected, the serial data stream may then be
resynchronized on the basis of the additional sync symbols,
if necessary. However, if no sync symbols have been
located, proper decoding of the data stream is not likely to
occur.
[0027] Once the encoded data stream has been decoded,
the decoded data, as well as the encoded data stream,
including both command and data codes, may be displayed
in a correlated fashion with the set of data samples of the
analog signal captured by the oscilloscope (step 135).
Myriad ways of performing this step may be undertaken. In
some embodiments, a graphical representation 200, as
shown in FIG. 2, may be used for correlating the data
samples and the analog signal. For example, horizontal line
segments 205 plotted alongside a trace 210 of the analog
signal carrying the encoded serial bit stream may be
employed to indicate the duration of each 10-bit encoded
symbol recovered from the analog signal as determined by
the detected sync symbols. Additionally, small vertical line
segments 215 intersecting each horizontal line segment 205
denote each recovered clock location within the associated
10-bit symbol. Furthermore, slightly longer vertical seg-
ments 220 may be utilized at the ends of each horizontal line
segment 205 to further emphasize the beginning and end of
each 10-bit symbol. Supplying this graphical information
helps to indicate that both clock recovery and sync symbol
detection have been successful. Conversely, the absence of
this graphical information, or possibly the use of some other
visual indication, would indicate that clock recovery or sync
symbol detection had failed. For example, if the embedded
clock had been recovered successfully, but no sync symbols
had been found, the small vertical line segments 215 might
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Sep. 15,2005
be included in the display, but the horizontal line segments
205 may be omitted to indicate that synchronization with the
10-bit encoded symbols was not achieved.
[0028] Assuming synchronization has been achieved,
symbol data and associated information may be displayed in
a variety of ways. For example, 8-bit decoded data may be
displayed as textual data 225 near the aforementioned hori-
zontal line segments 205, as shown in FIG. 2. This data
could be displayed in hexadecimal, decimal, binary, or some
other format. Additionally, in some embodiments the format
employed may be selectable by the user by way of an
oscilloscope user interface, a personal computer, or other
means.
[0029] Other methods of displaying the symbol data may
be employed. In some cases, the user may desire that the
encoded 10-bit data symbols be displayed, instead of the
resulting decoded data. Once again, this data may be pre-
sented in several different numeric formats, such as hexa-
decimal, decimal, binary, and the like.
[0030] Alternately, as opposed to a straight numeric rep-
resentation, the use of data byte names associated with the
10-bit encoded data as provided for in 8b/10b terminology
may be beneficial to a certain class of users. Advantageously,
this particular format could be used to identify both data
codes (e.g., Dll.7, D13.7, etc.) and command codes (e.g.,
K28.2, K23.7, etc.), which would be especially helpful
information for those users intimately familiar with the
details of the 8b/10b scheme.
[0031] Furthermore, user-defined labels may be employed
in addition to, or in lieu of, the above-mentioned numeric
representations. For example, as discussed previously, the
sync symbols used to demarcate the boundaries of the 10-bit
encoded symbols may thus be marked as "sync" or
"comma." Other terms more familiar to the particular user
may also be programmed by the user into the oscilloscope to
relate to a particular 10-bit encoded symbol to facilitate
understanding by the user, thus enhancing the user's ability
to debug problems with the communication channel
involved.
[0032] Given the nature of a scheme that encodes 8-bit
user data values into 10-bit symbols, several potential 10-bit
symbols do not represent either data codes or valid com-
mand codes, thus being "invalid." Regardless of the format
in which the 8b/10b data is presented, these invalid 10-bit
encoded symbols may be indicated graphically or textually,
such as by the 'Inv' indication shown in FIG. 2. Such
information is invaluable to the designer in determining the
cause of invalid symbols over the communication channel
involved.
[0033] Additionally, disparity information may be
included in the 10-bit symbol display. In 8b/10b parlance,
disparity normally is the difference between the number of
ones and the number of zeros across the length of a 10-bit
symbol. Typically, while many valid 10-bit symbols have a
disparity of zero, several exhibit a disparity of plus or minus
2. For those cases, an 8b/10b encoder must keep track of the
current running disparity so that a proper choice between
two encoded alternatives may be made when selecting
between a command or data code exhibiting a positive or
negative disparity in order to maintain DC balance. In some
embodiments of the invention, a disparity indicator 230,
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such as a '+' or ' - ', may be appended to the indicators
employed for valid 10-bit symbols, as shown in FIG. 2, to
indicate a plus 2 or minus two disparity related to that
symbol. Additionally, other displayed indicators may be
used to indicate the total disparity exhibited by a stream of
10-bit symbols captured by the oscilloscope in order to give
the designer an indication of how well DC balance is being
maintained.
[0034] Typically, the temporal relationship of the symbol
information with the analog signal trace 210 is maintained in
digital memory within the oscilloscope. As a result, reposi-
tioning of the symbol information with the trace 210 when-
ever the user of the oscilloscope scrolls or otherwise alters
the display of the trace 210 is simply a matter of presenting
symbols that are stored in a different location within that
memory.
[0035] As mentioned above, the 8b/10b encoding scheme
is often used as a lower-level communications 'physical'
standard in a variety of higher-level communications pro-
tocols, such as Fibre Channel, Serial ATA, Serial Attached
SCSI, Gigabit Ethernet, and so one. Therefore, once all
appropriate 8b/10b symbol information has been recovered,
information specific to the particular higher-level interface
involved may then be displayed in conjunction with, or in
lieu of, the 8b/10b symbol information described earlier,
depending on the needs of the designer (step 140). For
example, many such interfaces employ blocks of multiple
symbols to define certain interface "primitives," which
denote particular commands, functions, status, and so forth
involving the operation of the interface. Additionally, some
interfaces may consist of multiple layers of such interface
protocols, one stacked upon the other in a fashion similar to
that provide by the International Standards Organization
Open Systems Interconnect (ISO/OSI) model. Thus, provid-
ing the ability to display information relevant to those
multiple layers may be advantageous in some embodiments.
[0036] In order to provide a designer faster access to
predefined points of interest in either the recovered 8b/10b
symbol information, or the associated higher-level interface
information that employs the 8b/10b encoding scheme, the
oscilloscope may allow the designer to search the recovered
digital information for specific 8b/10b symbols, interface
primitives, and the like (step 145). This capability frees the
designer from having to look through all of the captured data
for a particular event of interest. For example, if a particular
higher-level command consistently fails, the designer is
likely to want to search the captured data for that particular
event, or some other related event, in order to determine the
cause of the failure.
[0037] Additionally, an oscilloscope employing various
method embodiments of the present invention may also
allow triggering of the storing of the captured data samples
of the analog signal and the associated 8b/10b symbols
based on matching all or part of one or more symbols
preselected by the user with the digital interface symbol
information (step 150). This functionality allows the oscil-
loscope to discard portions of the serial bit stream and the
captured data samples of the analog signal so that more of
the data that is of interest to the user may be collected and
perused.
[0038] Furthermore, the triggering function may also
reposition the preselected 8b/10b symbols and the associated
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Sep. 15,2005
data samples of the analog signal at a specified point on the
oscilloscope display, such as "time zero." This functionality
allows corresponding data for each instance of the trigger to
occur at the same position on the display for comparison
purposes.
[0039] Additionally, multilevel triggers, which allow the
user to set more complex triggering conditions in order to
capture extremely specific events on the communications
channel involved, may also be implemented in a like man-
ner. Also, the repositioning functionality of the trigger, often
performed in software, may operate as a second-level trigger
after a hardware trigger has been used to qualify a waveform
for acquisition. In other words, after the hardware trigger has
resulted in the capture of a set of data samples, the software
trigger may search for a desired pattern, which if found may
then be repositioned so that the point of interest is placed at
time zero.
[0040] FIG. 3 displays a sample graphical user interface
300 for controlling the searching and triggering functions
mentioned above. Searching, triggering the display based on
that search, and stopping the collection of data after trig-
gering are enabled by the user via three checkboxes 301,
302, 303. The searching and triggering functions are further
specified by way of the remainder of the graphical user
interface 300. For example, the user is provided a decode
standard pull-down menu 305 to define a high-level inter-
face employing the 8b/10b encoding scheme. In this case,
the Fibre Channel interface has been selected. A primitive of
that interface (in the example of FIG. 3, 'Arbitrate') can be
selected as a matching criterion for a search of the interface
data by way of a search primitive pull-down menu 310.
Once this primitive has been found, the oscilloscope is
directed to search for a series of 10-bit command and data
codes in 8b/10b format. This process is indicated by the four
tabbed serial search criteria 315, 316, 317 and 318, shown
below the "Immediately Followed By ... " text. As defined
by the user, command code K28.5, one of the sync symbols
define above, is to be found as denoted under tab 315,
followed by at least one of several data codes, such as D31.2,
indicated under tab 316. As shown in the second search
criteria 316, the setting of the search conditions is facilitated
by providing checkmark boxes for each possible symbol
arranged in separate data ('Symbol 2 Data') and control
('Symbol 2 Control') sections, as well as invalid codes.
[0041] The last two search criteria 317, 318 are set as
"don't care," and thus do not contribute any further require-
ments to the search.
[0042] Also shown in FIG. 3, the format in which the
search criteria may be specified by the user is selectable by
way of a display format window 320 via radio buttons. In
this particular case, the 10-bit format of the 8b/10b scheme
has been selected, but decimal, hexadecimal, and symbol
label formats are also available.
[0043] Some of these functions, such as the searching and
triggering functions described above, are normally provided
by other forms of electronic test equipment, such as logic
analyzers and protocol analyzers, which process and present
data residing primarily in the digital realm. However, by
providing such functionality within an oscilloscope that
allows perusal of the analog signal in digitized form, graphi-
cally correlated with the digital information the analog
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signal represents, various embodiments of the invention
allow significant advantages in troubleshooting heretofore
unknown.
[0044] In addition to the methods noted above, embodi-
ments describing a system for extracting and displaying
8b/10b symbol information from an analog signal are also
presented. For example, a system 400 according to an
embodiment of the invention, as shown in FIG. 4, provides
such extraction and display in accordance with the methods
discussed earlier. Such a system, portions of which may be
implemented in software or electronic hardware, such as an
FPGA, resides within a larger oscilloscope or similar device
(not shown) and works cooperatively with the other com-
ponents of that device.
[0045] In the system 400, a data sampler 410 takes as input
an analog signal 405 carrying 8b/10b encoded data. In
alternate embodiments, other encoding schemes, as
described above, may also processed. The data sampler 410
generates a set of digital data samples 415 from the analog
signal 405, as mentioned earlier. A clock recoverer 420 then
takes either the analog signal 405 or the set of digital data
samples 415 as input in order to generate a clock 425.
According to the foregoing discussion, the clock 425 may
either be a clock signal or a list of locations generated by a
software clock recovery algorithm associated with the set of
digital data samples 415. Additionally, the clock recoverer
420 may use any of the clock recovery methods, such as a
hardware or software PLL, as described in detail above.
[0046] Using the clock 425, a data converter 430 then
converts the set of digital data samples 415 to a serial bit
stream 435. A synchronizer 440 then takes the serial bit
stream 435 to identify the embedded sync symbols to
produce properly-aligned 10-bit encoded values 445, which
are then processed by a decoder 450 to generate decoded
8-bit data values and command codes 455 represented by the
10-bit encoded values 445. Additionally, the decoder 450
may generate primitives 457 associated with a high-level
interface. These two streams of data, along with the 10-bit
encoded values 445, may then be processed by a search/
trigger engine 460 which provides the user with searching
and triggering capabilities according to the discussion pre-
sented above, resulting in searched/triggered data 465 asso-
ciated with encoded, decoded, and high-level interface data.
The searched/triggered data 465, along with the 10-bit
encoded data values 445, the decoded 8-bit data values and
command codes 455, high-level interface primitives 457,
and the clock 425 are then visually presented for the user by
way of a display engine 470 that displays that data in
correlation with a trace of the analog signal 405 in any of a
number of ways as described above.
[0047] From the foregoing, embodiments of the invention
provide a system and method for extracting and displaying
8b/10b symbol information from an analog waveform.
Although several embodiments of the present invention have
been discussed, specific embodiments other than those
shown above are also possible. As noted earlier, information
regarding other serial and parallel physical digital interfaces
may be correlated with the associated analog signal or
signals implementing that interface. As a result, the inven-
tion is not to be limited to the specific forms so described and
illustrated; the invention is limited only by the claims.
5
Sep. 15,2005
What is claimed is:
1. A method for displaying digital interface symbol infor-
mation from at least one analog signal, the digital interface
symbol information including encoded symbols and
decoded information, the method comprising:
capturing a set of data samples of the at least one analog
signal at a frequency at least as high as the switching
rate of the at least one analog signal;
converting the set of data samples into at least one serial
bit stream using a clock;
searching the at least one serial bit stream for one or more
sync symbols;
identifying the encoded symbols in the at least one serial
bit stream using the sync symbols; and
displaying at least some of the digital interface symbol
information with a representation of the at least one
analog signal in a correlated fashion.
2. The method of claim 1, further comprising decoding the
encoded symbols into the decoded information.
3. The method of claim 1, wherein the frequency of the
capturing step is at least eight times as high as the switching
rate of the at least one analog signal.
4. The method of claim 1, further comprising recovering
the clock from the at least one analog signal, the clock being
an electronic signal.
5. The method of claim 4, wherein the recovering step is
accomplished by way of an analog hardware phase-locked
loop (PLL).
6. The method of claim 4, wherein the recovering step is
accomplished by way of a digital hardware PLL.
7. The method of claim 1, further comprising recovering
the clock from the set of data samples, the clock being a list
of locations in time relative to the set of data samples.
8. The method of claim 7, wherein the recovering step is
accomplished by a software PLL.
9. The method of claim 1, wherein the digital interface
symbol information displayed by the displaying step are
encoded symbols.
10. The method of claim 2, wherein the digital interface
symbol information displayed by the displaying step is
decoded information.
11. The method of claim 1, wherein the encoded symbols
comprise 10-bit symbols of an 8b/10b encoded interface.
12. The method of claim 2, wherein the decoded infor-
mation comprises 8-bit data values and command codes of
an 8b/10b encoded interface.
13. The method of claim 1, further comprising searching
the digital interface symbol information for preselected
symbol information.
14. The method of claim 1, further comprising triggering
storage of the set of data samples based upon matching all
or part of preselected symbol information with the digital
interface symbol information.
15. The method of claim 14, wherein the triggering step
also repositions the digital interface symbol information and
the representation of the at least one analog signal to a
specified point.
16. The method of claim 1, wherein the displaying step
also displays high-level interface information derived from
the decoded symbols with the representation of the at least
one analog signal in a correlated fashion.
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17. The method of claim 16, further comprising searching
the high-level interface information for preselected symbol
information.
18. The method of claim 16, further comprising triggering
storage of the set of data samples based upon matching all
or part of preselected symbol information with the high-
level interface information.
19. The method of claim 18, wherein the triggering step
also repositions the high-level interface information and the
representation of the at least one analog signal to a specified
point.
20. The method of claim 1, wherein the displaying step
also displays at least one clock location with the represen-
tation of the at least one analog signal in a correlated fashion.
21. An electronic device employing the method of claim
1.
22. A system for displaying digital interface symbol
information from at least one analog signal, the digital
interface symbol information including encoded symbols
and decoded information, the system comprising:
means for capturing a set of data samples of the at least
one analog signal at a frequency at least as high as the
switching rate of the at least one analog signal;
means for converting the set of data samples into at least
one serial bit stream using a clock;
means for searching the at least one serial bit stream for
one or more sync symbols;
means for identifying the encoded symbols in the at least
one serial bit stream using the sync symbols; and
rneans for displaying at least sorne of the digital interface
symbol information with a representation of the at least
one analog signal in a correlated fashion.
23. The system of claim 22, further comprising means for
decoding the encoded symbols into the decoded informa-
tion.
24. The system of claim 22, wherein the frequency of the
capturing means is at least eight times as high as the
switching rate of the at least one analog signal.
25. The system of claim 22, further comprising means for
recovering the clock from the at least one analog signal, the
clock being an electronic signal.
26. The system of claim 22, further comprising means for
recovering the clock from the set of data samples, the clock
being a list of locations in time relative to the set of data
samples.
27. The system of claim 22, wherein the digital interface
symbol information displayed by the displaying step are
encoded symbols.
28. The system of claim 23, wherein the digital interface
symbol information displayed by the displaying step is
decoded information.
29. The system of claim 22, wherein the encoded symbols
comprise 10-bit symbols of an 8b/10b encoded interface.
30. The system of claim 23, wherein the decoded infor-
mation comprises 8-bit data values and command codes of
an 8b/10b encoded interface.
31. The system of claim 22, further comprising means for
searching the digital interface symbol information for pre-
selected symbol information.
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Sep. 15,2005
32. The system of claim 22, further comprising means for
triggering storage of the set of data samples based upon
matching all or part of preselected symbol information with
the digital interface symbol information.
33. The system of claim 32, wherein the triggering means
also repositions the digital interface symbol information and
the representation of the at least one analog signal to a
specified point.
34. The system of claim 22, further comprising means for
displaying high-level interface information derived from the
decoded symbols with the representation of the at least one
analog signal in a correlated fashion.
35. The system of claim 34, further comprising means for
searching the high-level interface information for prese-
lected symbol information.
36. The system of claim 34, further comprising means for
triggering storage of the set of data samples based upon
matching all or part of preselected symbol information with
the high-level interface information.
37. The system of claim 36, wherein the triggering means
also repositions the high-level interface information and the
representation of the at least one analog signal to a specified
point.
38. The system of claim 22, wherein the means for
displaying also displays at least one clock location with the
representation of the at least one analog signal in a correlated
fashion.
39. A system for displaying digital interface symbol
information from at least one analog signal, the digital
interface symbol information including encoded symbols
and decoded information, the system comprising:
a data sampler configured to capture a set of data samples
of the at least one analog signal at a frequency at least
as high as the switching rate of the at least one analog
signal;
a data converter configured to convert the set of data
samples into at least one serial bit stream using a clock;
a synchronizer configured to search for one or more sync
symbols in the at least one serial bit stream for one or
more sync symbols, and identify the encoded symbols
in the at least one serial bit stream using the sync
symbols; and
a display engine configured to display at least some of the
digital interface symbol information with a represen-
tation of the at least one analog signal in a correlated
fashion.
40. The system of claim 39, further comprising a decoder
configured to decode the encoded symbols into the decoded
information.
41. The system of claim 39, wherein the frequency of the
capturing means is at least eight times as high as the
switching rate of the at least one analog signal.
42. The system of claim 39, further comprising a clock
recoverer configured to recover the clock from the at least
one analog signal, the clock being an electronic signal.
43. The system of claim 39, further comprising a clock
recoverer configured to recover the clock from the set of data
samples, the clock being a list of locations in time relative
to the set of data samples.
US 2005/0201488 Al
44. The system of claim 39, wherein the digital interface
symbol information displayed by the displaying step are
encoded symbols.
45. The system of claim 40, wherein the digital interface
symbol information displayed by the displaying step is
decoded information.
46. The system of claim 39, wherein the encoded symbols
comprise 10-bit symbols of an 8b/10b encoded interface.
47. The system of claim 40, wherein the decoded infor-
mation comprises 8-bit data values and command codes of
an 8b/10b encoded interface.
48. The system of claim 39, further comprising a search/
trigger engine configured to search the digital interface
symbol information for preselected symbol information and
trigger storage of the set of data samples based upon
matching all or part of preselected symbol information with
the digital interface symbol information.
49. The system of claim 48, wherein the search/trigger
engine also repositions the digital interface symbol infor-
mation and the representation of the at least one analog
signal to a specified point.
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Sep. 15,2005
50. The system of claim 39, further comprising a display
engine configured to display high-level interface informa-
tion derived from the decoded symbols with the represen-
tation of the at least one analog signal in a correlated fashion.
51. The system of claim 50, further comprising a search/
trigger engine configured to search the high-level interface
information for preselected symbol information and trigger
storage of the set of data samples based upon matching all
or part of preselected symbol information with the high-
level interface information.
52. The system of claim 51, wherein the search/trigger
engine also repositions the high-level interface information
and the representation of the at least one analog signal to a
specified point.
53. The system of claim 39, wherein the display engine
also displays at least one clock location with the represen-
tation of the at least one analog signal in a correlated fashion.
* * * * *