Ex Parte Drebin et alDownload PDFPatent Trial and Appeal BoardDec 30, 201613495597 (P.T.A.B. Dec. 30, 2016) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 13/495,597 06/13/2012 Robert A. Drebin 5888-39701 4761 81310 7590 01/04/2017 Mevertnns; HnnH Kivlin Knwe.rt Rr Ci (ArmleT EXAMINER P.O. BOX 398 Austin, TX 78767-0398 TUNG, KEE M ART UNIT PAPER NUMBER 2611 NOTIFICATION DATE DELIVERY MODE 01/04/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): patent_docketing@intprop.com ptomhkkg @ gmail .com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte ROBERT A. DREBIN and JAMES WANG Appeal 2015-006611 Application 13/495,597 Technology Center 2600 Before DANIEL N. FISHMAN, JON M. JURGOVAN, and JOSEPH P. LENTIVECH, Administrative Patent Judges. LENTIVECH, Administrative Patent Judge. DECISION ON APPEAL Appellants1 seek our review under 35 U.S.C. § 134(a) of the Examiner’s final rejection of claims 1—25, the only claims pending in the application on appeal. We have jurisdiction over the pending claims under 35 U.S.C. § 6(b). We affirm. 1 According to Appellants, the real party in interest is Apple Inc. App. Br. 2. Appeal 2015-006611 Application 13/495,597 STATEMENT OF THE CASE Appellants ’ Invention Appellants’ invention generally relates to graphical processing units (GPUs). Spec. 12. More particularly, the invention relates to structures and techniques allowing for efficient execution of multiple GPU commands. Id. Claim 1, which is illustrative, reads as follows: 1. An apparatus, comprising: a graphics processing unit (GPU) comprising a plurality of storage locations; wherein, for each one of a plurality of virtual GPUs implemented by the GPU, a corresponding one of the plurality of storage locations includes: first and second storage areas respectively configured to store intermediate results including intermediate vertex processing results and intermediate pixel-processing results that correspond to that virtual GPU; wherein the intermediate results in the first and second storage areas are usable to resume execution of one or more incomplete vertex-processing operations and one or more incomplete pixel-processing operations for that virtual GPU; wherein the GPU is configured to map virtual address space for each of the plurality of virtual GPUs implemented by the GPU to physical memory; and wherein the GPU is configured to allocate a greater portion of the physical memory to virtual address space for a higher priority one of the plurality of virtual GPUs and to allocate a lesser portion of the physical memory to virtual address space for a lower priority one of the plurality of virtual GPUs. 2 Appeal 2015-006611 Application 13/495,597 Rejections Claims 1—7 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over the combination of Esfahany et al. (US 2005/0262505 Al; published Nov. 24, 2005) (“Esfahany”), Hansson et al. (US 2012/0069032 Al; published Mar. 22, 2012) (“Hansson”), Mantor et al. (US 2011/0115802 Al; published May 19, 2011) (“Mantor”), and Huang et al. (US 2007/0103475 Al; published May 10, 2007) (“Huang”). Final Act. 3—14. Claims 8—11, 13—18, and 20—23 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over the combination of Esfahany, Hansson, and Mantor. Final Act. 15—35. Claim 12 stands rejected under 35 U.S.C. § 103(a) as being unpatentable over the combination of Esfahany, Hansson, Mantor, and Green et al. (US 2005/0041024 Al; published Feb. 24, 2005) (“Green”). Final Act. 36—37. Claims 24 and 25 stand rejected under 35 U.S.C. § 103(a) as being unpatentable over the combination of Esfahany, Hansson, Mantor, Huang, and M. A. Styblinski and L. J. Opalski, Algorithms and Software Tools for IC Yield Optimization Based on Fundamental Fabrication Parameters, IEEE Transactions on Computer-Aided Design, Vol. CAD-5 (1986) (“Syblinski”).2 Final Act. 37-A3. 2 Although the heading of the rejection indicates that claims 24 and 25 stand rejected based only on Mantor, Huang, and Styblinski, the body of the rejection includes citations to Esfahany, Hansson, Mantor, Huang, and Styblinski. See Final Act. 37—43. 3 Appeal 2015-006611 Application 13/495,597 ANALYSIS Appellants direct their arguments to independent claim 1 and state that all claims stand or fall therewith. App. Br. 9. Accordingly, claims 2—25 stand or fall with claim 1. 37 C.F.R. § 41.37(c)(l)(iv). We have reviewed the Examiner’s rejections in light of Appellants’ arguments that the Examiner has erred. We disagree with Appellants’ conclusions. We adopt as our own the findings and reasons set forth by the Examiner in the Final Office Action from which this appeal is taken and the reasons set forth in the Examiner’s Answer in response to Appellants’ Appeal Brief. Final Act. 3—43; Ans. 2—47. We highlight and address specific findings and arguments for emphasis as follows. Appellants contend the combination of Esfahany, Hansson, Mantor, and Huang fails to teach or suggest wherein the GPU is configured to map virtual address space for each of the plurality of virtual GPUs implemented by the GPU to physical memory; and wherein the GPU is configured to allocate a greater portion of the physical memory to virtual address space for a higher priority one of the plurality of virtual GPUs and to allocate a lesser portion of the physical memory to virtual address space for a lower priority one of the plurality of virtual GPUs, as recited in claim 1. App. Br. 9—14. Appellants contend “Esfahany’s techniques, when applied to Hansson by one of skill in the art, would simply affect how much memory was used by Hansson’s entire virtual machine” and that “[njothing in these references, however, suggests reconfiguring Hansson’s GPU 114 to teach or suggest the elements of claim 1 ’s GPU.” App. Br. 13. 4 Appeal 2015-006611 Application 13/495,597 Appellants contend Esfahany fails to teach or suggest the disputed limitations because Esfahany teaches that different virtual machines may use different amounts of memory but “does not mention ‘graphics,’ ‘graphics processing’, or a ‘GPU’ anywhere in its disclosure.” App. Br. 11. Appellants acknowledge that Hansson teaches a GPU and a virtual GPU but contends “there is nothing in Hansson—no structure of any kind—that when combined with Esfahany would teach or suggest [the disputed limitations]. App. Br. 12—13. According to Appellants, “Hansson’s GPU 114 is simply ‘a specialized microprocessor that offloads and accelerates 3D or 2D graphics rendering from a CPU.” App. Br. 13 (citing Hansson 113). Appellants contend that there is no teaching or suggestion in Hansson that Hansson’s GPU is configured to perform the functions required by claim 1. Id. Appellants further contend “Esfahany’s techniques would not modify Hansson’s GPU 114 to perform such functionality” and that Esfahany’s techniques “simply relate to an ‘amount of memory’ for a ‘virtual machine’.” Id. (citing Esfahany 125). We do not find Appellants’ contentions persuasive. The Examiner finds Esfahany teaches allocating a greater portion of the physical memory to physical address space for a higher priority one of the plurality of virtual CPUs and to allocate a lesser portion of the physical memory to physical address space for a lower priority one of the plurality of virtual CPUs. Ans. 43 (citing Esfahany 125). The Examiner finds it would have been obvious to one of ordinary skill in the art to modify Esfahany to allocate virtual memory in a virtual address space rather than allocate physical memory “because mapping virtual memory to physical memory is known to one of ordinary skill in the art and it achieves the predictable result of 5 Appeal 2015-006611 Application 13/495,597 reducing application through software memory manipulation bugs, enhanced security through application memory isolation, and extending the available address space through paging using a hard disk.” Ans. 43 44. The Examiner further finds it would have been obvious to one of ordinary skill in the art to modify Esfahany to use a GPU, as taught by Hansson, because “[a] GPU is known ... to be able to perform ‘compute work items that were usually done in the CPU.’” Ans. 44 (citing Hanson 118; McCrary et al. (US 2011/0050713 Al; published Mar. 3, 2011) 1 5). Based on these findings, the Examiner finds the combination of Esfahany and Hansson teaches “wherein the GPU is configured to map virtual address space for each of the plurality of virtual GPUs implemented by the GPU to physical memory” and “wherein the GPU is configured to allocate a greater portion of the physical memory to virtual address space for a higher priority one of the plurality of virtual GPUs and to allocate a lesser portion of the physical memory to virtual address space for a lower priority one of the plurality of virtual GPUs,” as recited in claim 1. Ans. 44. Appellants’ contentions fail to persuasively address the Examiner’s express findings regarding the combined teachings of the applied references and, therefore, are unpersuasive of error. In the Reply Brief, Appellants contend the combination of Esfahany, Hansson, Mantor, and Huang fails to teach or suggest wherein, for each one of a plurality of virtual GPUs implemented by the GPU, a corresponding one of the plurality of storage locations includes: first and second storage areas respectively configured to store intermediate results including intermediate vertex processing results and intermediate pixel-processing results that correspond to that virtual GPU, [and] 6 Appeal 2015-006611 Application 13/495,597 wherein the GPU is configured to map virtual address space for each of the plurality of virtual GPUs implemented by the GPU to physical memory, as recited in claim 1. Reply Br. 2—9. In particular, Appellants contend the combination of Esfahany, Hansson, and Mantor fails to teach these limitations because the Examiner “inappropriately commingles Hansson’s software-based ‘virtual GPUs’ with Mantor’s hardware-based ‘virtual engines.’” Reply Br. 3. Although Appellants characterize these contentions as being responsive to an argument presented for the first time in the Examiner’s Answer (see Reply Br. 2 (citing Ans. 45 46)), we find Appellants’ contentions constitute new arguments. Because good cause has not been shown as to why these contentions were not earlier presented, the contentions will not be considered for the purposes of this appeal. 37 C.F.R. § 41.41(b)(2). New arguments first presented in Appellants’ Reply Brief deprive the Board of an opportunity to consider Examiner’s response to such new arguments. For the foregoing reasons, we are not persuaded the Examiner erred in rejecting claim 1 and claims 2—25, which fall therewith. App. Br. 9. DECISION We affirm the Examiner’s rejections of claims 1—25 under 35 U.S.C. § 103(a). No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED 7 Copy with citationCopy as parenthetical citation