Ex Parte Davison et al

Board of Patent Appeals and Interferences

Aug 31, 2007

10722652 (B.P.A.I. Aug. 31, 2007)

The opinion in support of the decision being entered today is
not binding precedent of the Board.

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte KERRY LEEDS DAVISON, DONALD EARL HAWK JR.
and YEHUDA SMOOHA
____________

Appeal 2007-1862
Application 10/722,652
Technology Center 2800
____________

Decided: August 31, 2007
____________

Before JAMES D. THOMAS, JOHN C. MARTIN,
and JAY P. LUCAS, Administrative Patent Judges.

THOMAS, Administrative Patent Judge.

DECISION ON APPEAL
This appeal involves claims 1 through 8, 14, 15, and 17 through 20 as
reflected at pages 2 and 3 of the Answer where the Examiner has indicated
the allowability of claims 9 through 13, and 16. We have jurisdiction under
35 U.S.C. §§ 6(b) and 134(a).

Appeal 2007-1862
Application 10/722,652

We affirm-in-part.
As best representative of the disclosed and claimed invention,
independent claims 1 and 20 are reproduced below:
1. An integrated circuit device comprising:

a die having a top surface with a peripheral region and an interior
region surrounded by the peripheral region:

a plurality of bond pads disposed in the peripheral region of the die;

at least one internal bus, disposed in the interior region of the die, that
distributes power to a plurality of internal node points of the die; and

at least one bond wire connecting at least one of the plurality of bond
pads with the at least one internal bus.

20. A method of constructing an integrated circuit device comprising
the following steps:

forming an integrated circuit die having at least one peripheral bond
pad and at least one internal bus, the internal bus being configured for
distributing power to a plurality of internal node points of the integrated
circuit device; and

wire bonding the at least one peripheral bond pad to the at least one
internal bus.

The following references relied on by the Examiner:
Taylor US 6,727,597 B2 Apr. 27, 2004
(Filed December 27, 2001)
Exhibit A Fig 3B of Taylor

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Appeal 2007-1862
Application 10/722,652

Claims 1 through 8, 14, 15, and 17 through 20 stand rejected under
35 U.S.C. § 102(e) as being anticipated by Taylor.
Rather than repeat the positions of the Appellants and the Examiner,
reference is made to the Brief and Reply Brief for Appellants’ positions, and
to the Answer for the Examiner’s positions.
OPINION
Because we affirm only the rejection of independent claim 19, we
reverse the rejection of claims 1 through 8, 14, 15, 17, 18, and 20.
Independent claim 20 reflects the recitation of “wire bonding the at
least one peripheral bond pad to the at least one internal bus.” In a
corresponding limitation, independent claim 1 recites a “bond wire”
connecting at least one of the recited bond pads with at least one of the
internal buses. Claim 19 specifies that “the plurality of bond pads and the at
least one internal bus are connectable by at least one bond wire.”
In considering Taylor, we note initially that the prior art showing in
Figure 1 illustrates the use of wire bonds 104 to connect integrated circuit
die 102 to its package 110. Figure 2 illustrates the prior art use of C4
technology to mount an integrated circuit die 202 to a package 210.
Taylor’s contribution in the art is best shown in figure 3C, which permits
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Appeal 2007-1862
Application 10/722,652

integrated circuit device 300 to be electrically coupled to a package 360 by
either wire bond pads 304 or C4 pads 306 (col. 2, ll. 49-52). The
corresponding bond wire in Figure 3C is not labelled but it is consistent with
the depiction in Figure 1 as well as being well known in the art. Thus,
Taylor only teaches/shows the use of bond wires to connect an integrated
circuit die to its package. Figure 3C also shows related internal metal layers
330 and conduct vias 332, thus permitting the interconnection of these metal
layers to each other and to the respective bonding pads 304, 306.
The Examiner’s reliance upon Figure 3B of Taylor is noted. The
discussion of this figure beginning at the bottom of column 2 through the
bulk of column 3 indicates at column 3, lines 48 through 50 that “the wire
bond power connections 350 are coupled to the C4 power buses 360 along a
metal trace connecting two of the C4 power connections 340.” What the
Examiner illustrates as bond wires in the respective corners of Exhibit A
attached to the Answer are in fact these metal tracings. Therefore, it is
readily apparent to us that the subject matter of independent claims 1 and 20,
respectively requiring “at least one bond wire” and “wire bonding” to
connect one of a plurality of bond pads with at least one internal bus, is not
met by Taylor.
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Appeal 2007-1862
Application 10/722,652

Our decision to reverse the rejection of independent claims 1 and 20
on appeal is consistent with Appellants’ best statement arguing for reversal
at the top of page 3 of the Reply Brief, which we reproduce here:
As is commonly known in the art of the present invention, a bond wire
typically refers to a thin wire used in a wire bonding process to
interconnect semiconductor pads on a die to package leads. As is
evident from Exhibit A of the Examiner’s Answer, the Examiner fails
to fully comprehend the concept of bond wires commonly known in
the art. More specifically, Exhibit A fails to show any such bond
wires, and thus, also fails to show a bond wire connecting a bond pad
with an internal bus. Instead, the Examiner incorrectly labels as bond
wires, elements of FIG. 3B that are clearly shown and described as
metal traces. As previously described throughout the application, the
responses and the Appeal Brief, the present invention is directed to a
bond wire connection, instead of a metal trace connection for the
purpose of lowering resistivity and reducing power distribution
voltage drop that normally occurs in metal traces routed from bond
pads to internal buses.

We note as well that the Examiner did not submit a Supplemental
Examiner’s Answer challenging these industry practices and what is
commonly known in the art.
On the other hand, we sustain the rejection of independent claim 19,
which recites that the plurality of bond pads and the at least one internal bus
“are connectable by at least one bond wire” without further specifying that
such a connection has been made. The artisan would well appreciate that the
die or integrated circuit device 300 in Figure 3B of Taylor presents a
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Appeal 2007-1862
Application 10/722,652

capability of having the plurality of bond pads connected to at least one
internal bus by at least one bond wire.
In view of the foregoing, the decision of the Examiner rejecting
various claims on appeal under 35 U.S.C. § 102 is affirmed only as to
claim 19. Therefore, the Examiner’s decision is affirmed-in-part.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. §1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).
AFFIRMED-IN-PART

pgc

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