Ex Parte Conti

Patent Trial and Appeal Board

Feb 8, 2017

11557298 (P.T.A.B. Feb. 8, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
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APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/557,298 11/07/2006 Gregory R. Conti TIF-39615 1225
23494 7590 02/10/2017
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS, TX 75265
EXAMINER
PARK, ILWOO
ART UNIT PAPER NUMBER
2184
NOTIFICATION DATE DELIVERY MODE
02/10/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
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PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte GREGORY R. CONTI
Appeal 2016-001320
Application 11/557,298
Technology Center 2100
Before JOHN A. JEFFERY, BARBARA A. BENOIT, and
DAVID C. McKONE, Administrative Patent Judges.
JEFFERY, Administrative Patent Judge.
DECISION ON APPEAL
This application returns to us after we affirmed-in-part the Examiner’s
decision to reject then-pending claims 1—24. Ex parte Conti, No. 2010-
008615 (PTAB Apr. 10, 2013) (“Bd. Dec.”). Prosecution reopened after that
decision, and Appellant now appeals under 35 U.S.C. § 134(a) from the
Examiner’s subsequent decision to reject claims 1, 2, 7—24, and 26—30. We
have jurisdiction under 35 U.S.C. § 6(b). We affirm-in-part.
STATEMENT OF THE CASE
Appellant’s invention restricts using a Direct Memory Access (DMA)
channel based on security rules. See generally Abstract. Claim 1 is
illustrative:
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Application 11/557,298
1. A system, comprising:
a processor;
a direct memory access (DMA) subsystem coupled to
the processor;
a component coupled to the DMA subsystem via an
interconnect employing security rules, wherein, if the
component requests a DMA channel, the DMA subsystem
determines whether the request to access the DMA channel is
a public access or a secure access;
wherein if the request is a secure access the DMA
subsystem allows the DMA channel to be configured as either
a secure channel or a public channel; and
wherein if the request is a public access the DMA
subsystem allows the DMA channel to be configured as a
public channel but not a secure channel.
THE REJECTION
The Examiner rejected claims 1, 2, 7—24, and 26—301 under 35 U.S.C.
§ 103(a) as unpatentable over Moyer (US 2004/0243823 Al; Dec. 2, 2004)
and Strongin (US 6,854,039 Bl; Feb. 8, 2005). Ans. 3—45.2
CONTENTIONS
The Examiner finds that Moyer discloses every recited element of
independent claim 1 including (1) a “processor” (e.g., master 12); (2) a
1 Although the Examiner includes cancelled claim 25 in the statement of this
rejection, we nonetheless present the correct claim listing here for clarity.
2 Throughout this opinion, we refer to (1) the Appeal Brief filed December
31, 2014 (“App. Br.”); (2) the Examiner’s Answer mailed September 10,
2015 (“Ans.”); and (3) the Reply Brief filed November 6, 2015 (“Reply
Br.”).
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Application 11/557,298
DMA subsystem (e.g., memory controller 32) coupled to the processor; and
(3) a “component” (e.g., one master or “various places” sending state
information) coupled to the DMA subsystem via an “interconnect” which is
said to correspond to (a) access protection control register 38; (b) conductors
62, 64 with state information 60; and/or (c) system interconnect 22. Ans. 3—
5. According to the Examiner, this “interconnect” employs “security rules”
(e.g., access protection fields 72, 74,. . ., 80 and state information) such that
if the “component” requests a “DMA channel” (e.g., the DMA operation
path to access non-volatile memory 36 through the memory controller), the
DMA subsystem (1) determines whether the request to access the DMA
channel is a public channel or secure channel, and (2) configures the DMA
channel accordingly based on that determination. Ans. 4.
The Examiner acknowledges that Moyer does not teach the elements
recited in claim 1 ’s two “wherein” clauses, namely the particular recited
DMA channel configurations depending on whether the DMA channel
request is a secure or public access. Ans. 5. The Examiner, however, cites
Strongin’s Table 1 in column 13, line 55 to column 14, line 42 as teaching
this feature in concluding that the claim would have been obvious. Id.
Appellant argues, among other things, that the Examiner’s reliance on
Strongin for teaching the particular DMA channel configurations in claim
1 ’s two “wherein” clauses is misplaced. App. Br. 13—21; Reply Br. 1—12.
According to Appellant, not only does Strongin’s DMA subsystem fail to
allow the DMA channel to be configured as a secure channel, but Strongin’s
hardware-initiated accesses cannot generate the secure page (SP=1) bit, and
these accesses are always at a user level such that the current privilege (CP)
value cannot be changed. Id. Appellant adds that Strongin is also deficient
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Application 11/557,298
because Strongin’s Table 2 shows that the DMA can access only non-secure
pages in a read/write mode. Id.
ISSUE
Under § 103, has the Examiner erred in rejecting claim 1 by finding
that Moyer and Strongin collectively would have taught or suggested
allowing a DMA subsystem to be configured with particular recited DMA
channel configurations depending on whether the DMA channel request is a
secure or public access?
ANALYSIS
Claims 1, 2, and 7—10
In our earlier decision, we affirmed the Examiner’s anticipation
rejection of then-pending claim 1 over Moyer—a reference that is also cited
in the obviousness rejection at issue here. As in the earlier appeal, the
Examiner cites Moyer for teaching the recited processor, DMA subsystem,
and component. See Ans. 7—A. We see no error in these findings for the
reasons indicated on pages 3 to 6 of our earlier decision, for our findings and
conclusions regarding Moyer in our earlier decision are not only applicable
here, they are binding in this appeal. See Manual of Patent Examining
Procedure (MPEP) § 706.07(h)(XI)(A) (9th ed. Rev. 07.2015, Nov. 2015)
(noting that the Board’s decision becomes the “law of the case” in that it is
controlling on the application under appeal and later related applications).
After prosecution reopened following our decision, claim 1 was
amended to replace the limitation calling for restricting using the DMA
channel based on the security rules with limitations reciting (1) determining
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Application 11/557,298
whether the request to access the DMA channel is a public or secure access,
and (2) allowing the DMA channel to be configured with the particular
recited DMA channel configurations depending on whether the request is a
secure or public access as recited in claim 1 ’s two “wherein” clauses.
Compare Bd. Dec. 1—2 (reproducing then-pending claim 1 lacking these
amended limitations).
As noted previously, the Examiner cites Strongin for teaching the
amended limitations in the “wherein” clauses (Ans. 5, 48), and it is this
reliance that we find problematic on this record. Specifically, the Examiner
finds that the states “Secure Page (SP) bit = 0” and “Current Privilege Level
(CPL) = 0, 3” in Strongin’s Table 1 determine whether a request is a public
access. Ans. 5, 48 (citing Strongin, col. 13,11. 60-65; col. 14,11. 25^42).
The Examiner also finds that states SP=1 and CPL=0, 3 in Strongin’s Table
1 determine whether a request is a secure access. Ans. 5, 48. According to
the Examiner, when SP=1, full access is granted regardless of a selected
memory page’s SP bit, and when SP=0, standard protection mechanisms
apply for only selected memory pages. Ans. 5, 48.
Strongin’s Table 1 specifies various rules for software-initiated
memory accesses. Strongin, col. 13,11. 55—56. Although the functionality
associated with this table grants, among other things, (1) full access (with
read/write (R/W) capability), and (2) read-only access for SP=1 and CPL=0
states (Strongin, col. 13,1. 60 — col. 14,1. 24), we cannot say—nor has the
Examiner shown—that these states allow a DMA channel to be configured
as a secure or public channel as claimed. To be sure, full access is granted
when the instruction’s SP=1 regardless of the selected memory page’s SP bit
as the Examiner indicates (Ans. 5) due to the “X” entry in the third column
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Application 11/557,298
of the first row of Strongin’s Table 1. Nevertheless, the Examiner does not
explain sufficiently how or why this state (or any other state in Table 1)
allows a DMA channel to be configured as a secure or public channel for
secure access requests, let alone that this state also allows a DMA channel to
be configured as a public channel, but not a secure channel for public access
requests as claimed.
In reaching this conclusion, we acknowledge that claim 1 recites
conditional limitations. That is, not only does claim 1 recite that if the
component requests a DMA channel, the DMA subsystem determines
whether the request is a public or secure access, both “wherein” clauses of
claim 1 also contain conditional limitations, namely allowing particular
DMA channel configurations if the request is a secure access and public
access, respectively. Notably, these conditions need not be satisfied to meet
a method claim reciting these conditions. See Ex parte Schulhauser, No.
2013-007847, slip op. at 9-10 (PTAB Apr. 28, 2016) (precedential).3 But
here, these limitations are recited as part of system claim 1 and, as such, the
claim requires structure for performing the functions should the conditions
occur. Id. at 14—15. As explained previously, the Examiner fails to show
this structure and, therefore, the rejection is deficient for that reason alone.
Therefore, we are persuaded that the Examiner erred in rejecting
independent claim 1, and dependent claims 2 and 7—10 for similar reasons.
Because this issue is dispositive regarding our reversing the Examiner’s
3 This decision is available at the Board’s web site at
https://www.uspto.gov/patents-application-process/appealing-patent-
decisions/decisions-and-opinions/precedential.
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Application 11/557,298
rejection of these claims, we need not address Appellant’s other associated
arguments.4
Claims 26—30
For reasons similar to those indicated for claim 1, we also do not
sustain the Examiner’s rejection of independent claims 26—30 that were
added after our earlier decision. These claims recite, in pertinent part,
systems that each include multiple “wherein” clauses specifying particular
DMA channel configurations and usage if the recited conditions are
satisfied. Despite the Examiner’s findings and conclusions to the contrary
(Ans. 32-45, 76—90), the Examiner does not explain sufficiently how or why
the relied-upon subject matter from Strongin, including the states in
Strongin’s Table 1, allows a DMA channel to be so configured or used, let
alone show that Strongin discloses structure for performing the recited
4 We note that claim 1 also recites that if the component requests a DMA
channel, the DMA subsystem determines whether the request is public or
secure access, and if either condition is satisfied, the subsystem allows a
particular DMA channel configuration. Our emphasis underscores the fact
that the claim does not recite that these elements are configured to perform
these functions, but that they actually perform the functions. But apparatus
claims reciting active method steps have been held indefinite under 35
U.S.C. § 112, second paragraph, for such claims raise the question of
whether they are infringed by devices that are merely capable of performing
the recited function, or that they must actually perform that function. See
IP XL Holdings, L.L.C. v. Amazon.com, Inc., 430 F.3d 1377, 1384 (Fed. Cir.
2005); see also Rembrandt Data Technologies, LP v. AOL, LLC, 641 F.3d
1331, 1339 (Fed. Cir. 2011) (data transmitting device held indefinite for
reciting transmitting method step). Nevertheless, the Examiner did not
reject claim 1 on this basis, nor will we speculate in that regard here in the
first instance on appeal. Rather, we leave this question to the Examiner to
consider after this decision.
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functions should the claimed conditions occur. See Schulhauser, at 14—15.
Accordingly, the weight of the evidence on this record favors Appellant’s
position. See App. Br. 35—54; Reply Br. 55—94.
Therefore, we are persuaded that the Examiner erred in rejecting
claims 26—30.
Claims 15—22 and 24
We will, however, sustain the Examiner’s rejection of claims 15—22
and 24. Ans. 3—5, 28—35. Notably, independent claim 15 recites, in
pertinent part, accessing a DMA subsystem, and determining if the access is
public or secure: the remaining limitations are performed only if the recited
conditions are satisfied. Dependent claims 16—22 and 24 are likewise
replete with conditional limitations that need not be satisfied to meet the
claims.5 See Schulhauser, at 9-10. Therefore, Appellant’s arguments
pertaining to the alleged shortcomings of the cited prior art in connection
with the recited conditional limitations of claims 16—22 and 246 (see
5 Although claim 24 recites generating a qualifier when a DMA is started,
this generation is nevertheless conditioned on starting a DMA channel—a
condition that need not occur to satisfy the claim. Nevertheless, despite the
claim’s breadth in light of this condition and Appellant’s arguments
(App. Br. 35; Reply Br. 54—55), we are unpersuaded of error in the
Examiner’s rejection of this claim (Ans. 32, 75) for the reasons indicated by
the Examiner and on page 17 of our earlier decision.
6 Although Appellant does not argue independent claim 15 separately to
show error in the Examiner’s rejection of that claim apart from the
arguments similar to those made in connection with claim 1 (see App. Br.
15—21; Reply Br. 1—12), our analysis nonetheless applies to the conditional
limitations of that claim as well.
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Application 11/557,298
App. Br. 28—35; Reply Br. 30—55) are not commensurate with the scope of
the method claims in light of these conditional limitations.
Therefore, we are not persuaded that the Examiner erred in rejecting
claims 15—22 and 24.
Claim 23
We will not, however, sustain the Examiner’s rejection of claim 23
reciting (1) locking a DMA channel’s use of qualifiers during a DMA
channel operation, and (2) unlocking a DMA channel’s use of qualifiers
after the operation is completed. Notably, these steps are not conditional,
unlike those of independent claim 15 from which claim 23 depends.
As we noted on page 17 of our earlier decision, even assuming that
Moyer’s Figure 3 shows receiving one DMA channel operation and
receiving/using qualifiers once at blocks 84 and 88 as the Examiner contends
(Ans. 32, 75), we cannot say—nor has the Examiner shown—that this
sequence (1) locks the channel’s use qualifiers during a DMA channel
operation, and (2) unlocks that use after completing that operation. Nor has
the Examiner shown that Strongin cures this deficiency.
Therefore, we are persuaded that the Examiner erred in rejecting
claim 23.
Claims 11 and 13
We will, however, sustain the Examiner’s rejection of independent
claim 11 reciting, in pertinent part, a configuration firewall and a violation
handler coupled thereto. Despite Appellant’s arguments to the contrary
(App. Br. 25—27), Appellant does not persuasively rebut the Examiner’s
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Application 11/557,298
reliance on the collective teachings of Moyer and Strongin in connection
with the recited configuration firewall, its registers and associated
functionality, and the violation handler coupled to the firewall. See Ans. 16—
19, 59-61. Appellant’s arguments regarding Moyer’s alleged shortcomings
in this regard do not address—let alone persuasively rebut—the Examiner’s
additional findings in the Answer’s Response to Arguments section
pertaining to the recited firewall and its functionality. See Ans. 60-61.
Accordingly, the weight of the evidence on this record favors the
Examiner’s position.
Therefore, we are not persuaded that the Examiner erred in rejecting
claim 11, and claim 13 not argued separately with particularity.
Claim 12
We also sustain the Examiner’s rejection of claim 12 reciting
configuration registers that selectively enable a DMA channel for use of one
of read/write operations and read operations based on the DMA channel
configuration request and security rules. Despite Appellant’s arguments to
the contrary (App. Br. 27; Reply Br. 26—28), Appellant does not
persuasively rebut the Examiner’s reliance on the collective teachings of
Moyer and Strongin in connection with the recited configuration registers
and their functionality. Ans. 19—20, 61—63. Accordingly, the weight of the
evidence on this record favors the Examiner’s position.
Claim 14
We also sustain the Examiner’s rejection of claim 14 reciting that
interconnect qualifier bits comprise at least one bit selected from the group
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Application 11/557,298
consisting of (1) a secure qualifier bit associated with secure mode access;
(2) a debug qualifier bit associated with debug mode access; and (3) a
privilege qualifier bit associated with a privilege mode access. As
emphasized above and as the Examiner indicates (Ans. 63), the claim merely
requires that the qualifier bits are at least one type of bit selected from the
recited group which does not require selecting all bit types. Therefore,
Appellant’s argument that Moyer does not teach or suggest both a secure
qualifier bit and a privilege qualifier bit (App. Br. 28) is not commensurate
with the scope of the claim which does not require both types of bits.
Despite Appellant’s arguments to the contrary (App. Br. 28; Reply Br.
28—30), Appellant does not persuasively rebut the Examiner’s reliance on
the collective teachings of Moyer and Strongin in connection with the
recited secure and privilege qualifier bits (Ans. 20—21, 63—64)—either one
of which satisfies claim 14 given the scope and breadth of the claim.
CONCLUSION
Under § 103, the Examiner did not err in rejecting claims 11—22 and
24, but erred in rejecting claims 1, 2, 7—10, 23, and 26—30.
DECISION
The Examiner’s decision rejecting claims 1, 2, 7—24, and 26—30 is
affirmed-in-part.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED-IN-PART
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