Ex Parte Cideciyan et alDownload PDFPatent Trial and Appeal BoardFeb 8, 201612058151 (P.T.A.B. Feb. 8, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE FIRST NAMED INVENTOR 12/058,151 03/28/2008 67232 7590 02/10/2016 CANTOR COLBURN LLP - IBM ARC DIVISION 20 Church Street 22nd Floor Hartford, CT 06103 Roy D. Cideciyan UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. CH920030027US2 2596 EXAMINER TORRES, JOSEPH D ART UNIT PAPER NUMBER 2112 NOTIFICATION DATE DELIVERY MODE 02/10/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): usptopatentmail@cantorcolbum.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte ROY D. CIDECIY AN, AJAY DHOLAKIA, EV ANGELOS S. ELEFTHERIOU, and THOMAS MITTELHOLZER Appeal2013-004027 Application 12/058, 151 Technology Center 2100 Before JOSEPH L. DIXON, JAMES R. HUGHES, and ERIC S. FRAHM, Administrative Patent Judges. FRAHM, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF CASE Introduction Appellants appeal under 35 U.S.C. § 134(a) from a final rejection of claims 1-17. Claims 18 and 19 were cancelled. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Exemplary Claim Exemplary independent claim 1 under appeal, with emphases added, reads as follows: Appeal2013-004027 Application 12/058, 151 1. A method for decoding data in a data storage system, the method comprising: generating by a detector an output bit stream from a data block received from a storage subsystem of the data storage system; generating by a post processor connected to the detector a first error corrected bit stream from the output bit stream and the data block; generating by an error correction decoder connected to the post processor a second error corrected bit stream from the first error corrected bit stream; generating by the error correction decoder a checksum from the second error corrected bit stream; and in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one corrected interleaved error: supplying directly from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream; and, regenerating by the post processor the first error corrected bit stream from the pinning data. 2 Appeal2013-004027 Application 12/058, 151 Examiner's Rejections1 (1) The Examiner rejected claims 1, 3-9, and 11-1 7 as being unpatentable under 35 U.S.C. § 103(a) over the combination of Kobayashi (US 6,029,264; issued Feb. 22, 2000), Riggle (US 4,413,339; issued Nov. 1, 1983), and Tong (US 6,298,461 Bl; issued Oct. 2, 2001).2 Ans. 2-8. (2) The Examiner rejected claims 2 and 10 as being unpatentable under 35 U.S.C. § 103(a) over the combination of Kobayashi, Riggle, Tong, and Sawaguchi, Hideki, A Concatenated Coding Technique for Partial Response Channels, IEEE TRANSACTIONS ON MAGNETICS, VOL. 37, No. 2, MARCH 2001 )(hereinafter, "Sawaguchi"). 3 Ans. 8-9. 1 In the Final Rejection mailed May 14, 2012, claims 1-17 were rejected under§ 112, second paragraph, for failing to set forth the subject matter which was regarded as Appellants' invention. (Final Act. 2). This rejection \~1as \~1ithdra\~1n by the Examiner as indicated in the Examiner's 1A1ns\~1er (Ans. 2). Accordingly, the rejection of claims 1-17 under§ 112, second paragraph, is not before us. 2 Separate patentability is not argued for claims 3-9 and 11-17 (see App. Br. 5-8). Accordingly, we select claim 1 as representative for the group of claims 1, 3-9, and 11-17 rejected over the combination of Kobayashi, Riggle, and Tong. Thus, our analysis will only address the merits of independent and representative claim 1. 3 Aside from stating that claims 2 and 10 are allowable based on their dependence on independent claims 1 and 9, respectively, (App. Br. 7; Reply Br. 3) Appellants fail to present any separate arguments with regard to the rejection of claims 2 and 10 under§ 103(a) over Kobayashi, Riggle, Tong, and Sawaguchi. Therefore, because Appellants have not disputed the Examiner's rejection set forth in the Final Action (see Final Act. 8-9), Appellants have not shown that the Examiner erred in rejecting claims 2 and 10. See 37 C.F.R. § 41.37(c)(l)(iv). 3 Appeal2013-004027 Application 12/058, 151 Principal Issue on Appeal Based on Appellants' arguments in the Briefs (App. Br. 5-7; Reply Br. 2-3), the following principal issue is presented on appeal: Did the Examiner err in rejecting claims rejecting claims 1, 3-9, 11- 17, and 19 as being obvious because the combination of Kobayashi, Riggle, and Tong fails to teach or suggest the disputed limitations of "supplying directly from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream," as recited in representative claim 1? ANALYSIS We have reviewed the Examiner's rejections (Final Act. 2-9) in light of Appellants' contentions in the Appeal Brief (App. Br. 5-7) and Reply Brief (Reply Br. 2-3) that the Examiner has erred. We disagree with Appellants' conclusions. Claims 1, 3-9, and 11-17 In rejecting claims under 35 U.S.C. §§ 102 and 103, it is incumbent upon the Examiner to establish a factual basis to support the prior art rejection-the so-called "prima facie" case. See In re Piasecki, 745 F.2d 1468, 1472 (Fed. Cir. 1984) (the USPTO has the initial burden of proof "to produce the factual basis for its rejection of an application under sections 102 and 103." (quoting In re Warner, 379 F.2d 1011, 1016 (CCPA 1967))). "[T]he examiner bears the initial burden, on review of the prior art or on any other ground, of presenting a prima facie case of unpatentability." In re Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992). 4 Appeal2013-004027 Application 12/058, 151 Appellants have the opportunity on appeal to the Board of Patent Appeals and Interferences (BP AI) to demonstrate error in the Examiner's position. See In re Kahn, 441 F.3d 977, 985-86 (Fed. Cir. 2006) (citing In re Rouffet, 149 F.3d 1350, 1355 (Fed. Cir. 1998)). "[A]fter the PTO establishes a prima facie case of anticipation based on inherency, the burden shifts to [A ]ppellant to 'prove that the subject matter shown to be in the prior art does not possess the characteristic relied on."' In re King, 801 F.2d 1324, 1327 (Fed. Cir. 1986) (emphasis added) (quoting In re Swinehart, 439 F.2d 210, 212-13 (CCPA 1971)). See also MPEP §§ 2112 (IV-V). In the instant case on appeal, Appellants have not provided declarations, evidence, or otherwise rebutted the Examiner's findings, and merely provide conclusory arguments alleging the pinning data is not directly supplied from the error correction decoder to the post processor as required by representative claim 1. Further, Appellants have not refuted the Examiner's newly cited portions of Kobayashi (col. 8. 11. 54--57; col. 9, 11. 14--17, 49-50, 65---68; and col. 10, 11. 16-18) which support Examiner's position that the third stage interleaved error correction ECC Decoder is comprised of E1z1, Decoder Di and n12 . See Ans. 4--8. Based on the Examiner's new citations, we find that the Examiner has established a factual basis to support the prior art rejection. We further find that by failing to address the Examiner's factual basis, Appellants have failed to meet their burden to show that the Examiner erred in rejecting claims 1, 3-9, and 11-17 using Kobayashi to disclose the disputed limitation of "supplying directly from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream," as claimed in representative claim 1. 5 Appeal2013-004027 Application 12/058, 151 In view of the foregoing, we sustain the Examiner's rejection of representative claim 1, as well as claims 3-9 and 11-17 grouped therewith. Claims 2 and 10 Appellants have also failed to show that the Examiner erred in determining that the combination of over the combination of Kobayashi, Riggle, Tong, and Sawaguchi teaches or suggests (i) excluding bits at the locations indicated by the pinning data as recited in dependent claim 2, (ii) or the post processor regenerating the first error corrected bit stream by excluding bits at the locations indicated by the pinning data as recited in dependent claim 10, because Appellants do not address the merits of the inclusion of Sawaguchi in the combination, or otherwise present separate arguments on the merits with regard to claims 2 and 10 (see App. Br. 5-8; Reply Br. 2-3). See 37 C.F.R. § 41.37(c)(l)(vii) (requiring a statement in the briefs as to each ground of rejection presented by Appellants for review); 37 C.F.R. § 41.37(c)(l)(vii) (stating that arguments not presented in the briefs by Appellants will be refused consideration). As such, Appellants have not argued that the Examiner erred in rejecting claims 2 and 10 or otherwise shown this obviousness rejection to be in error. CONCLUSIONS (1) The Examiner has not erred err in rejecting claims 1, 3-9, and 11- 1 7 as being obvious because the combination of Kobayashi, Riggle, and Tong discloses the disputed limitations of "supplying directly from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream," as recited in representative claim 1. 6 Appeal2013-004027 Application 12/058, 151 (2) Appellants have not shown that the Examiner has erred in rejecting claims 2 and 10 as being unpatentable under 35 U.S.C. § 103(a) or otherwise rebutted the Examiner's prima facie case of obviousness for claims 2 and 10. DECISION The Examiner's obviousness rejections of claims 1-17 are affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l )(iv). AFFIRMED rwk 7 Copy with citationCopy as parenthetical citation