Ex Parte Chung et alDownload PDFPatent Trial and Appeal BoardJul 5, 201712814025 (P.T.A.B. Jul. 5, 2017) Copy Citation United States Patent and Trademark Office UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O.Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 12/814,025 06/11/2010 Jaewoong Chung 1458-100166 8308 109712 7590 07/07/2017 Advanced Micro Devices, Inc. c/o Davidson Sheehan LLP 8834 North Capital of TX Hwy Suite 100 Austin, TX 78759 EXAMINER LINDLOF, JOHN M ART UNIT PAPER NUMBER 2183 NOTIFICATION DATE DELIVERY MODE 07/07/2017 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address(es): docketing@ds-patent.com AMD@DS-patent.com PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte JAEWOONG CHUNG, DAVID S. CHRISTIE, MICHAEL P. HOHMUTH, STEPHAN DIESTELHORST, MARTIN T. POHLACK, and LUKE YEN Appeal 2016-007104 Application 12/814,025 Technology Center 2100 Before ROBERT E. NAPPI, KALYAN K. DESHPANDE, and DAVID M. KOHUT, Administrative Patent Judges. DESHPANDE, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE1 Appellants2 seek review under 35 U.S.C. § 134(a) of the Examiner’s Final Rejection of claims 1—22.3 We have jurisdiction over the appeal pursuant to 35 U.S.C. § 6(b). We AFFIRM. 1 Our Decision makes reference to Appellants’ Reply Brief (“Reply Br.,” filed July 11, 2016) and Appeal Brief (“App. Br.,” filed November 12, 2015), and the Examiner’s Answer (“Ans.,” mailed May 18, 2016) and the Final Office Action (“Final Act.,” mailed January 23, 2015). 2 According to Appellants, the Real Party in Interest is Advanced Micro Devices, Inc. App. Br. 1. 3 Claims 23—26 were withdrawn previously. Appeal 2016-007104 Application 12/814,025 INVENTION Appellants’ invention is directed to hardware transactional memory that supports out-of-order processing and branch prediction facilities. Spec. 13. Claims 1,12, and 21 are the independent claims on appeal. An understanding of the invention can be derived from exemplary claim 1. 1. An apparatus, comprising: a processing core of a plurality of processing cores, wherein the processing core is configured to: execute a speculative region of code as a single atomic memory transaction with respect to one or more others of the plurality of processing cores, the speculative region comprising a plurality of program instructions; and in response to determining an abort condition for an issued one of the plurality of program instructions and in response to the issued program instruction being not part of a mispredicted execution path, abort an attempt to execute the speculative region of code. REFERENCES Vash et al. US 2006/0242390 A1 Oct, 26, 2006 Sahuetal. US 2007/0143755 Al June 21, 2007 Gray et al. US 2010/0332768 Al Dec. 30, 2010 REJECTIONS Claims 1—9, 11—18, 20, and 21 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Gray, Vash, and Sahu. Final Act. 2-7. 2 Appeal 2016-007104 Application 12/814,025 Claims 10, 19, and 22 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Gray, Vash, Sahu, and the Examiner’s Official Notice. Final Act. 7—8. ISSUES The issue of whether the Examiner erred in rejecting claims 1—9, 11— 18, 20, and 21 turns on whether the combination of Gray, Vash, and Sahu teaches or suggests “in response to the issued program instruction being not part of a mispredicted execution path, abort an attempt to execute the speculative region of code,” as recited in independent claims 1, 12, and 21. The issue of whether the Examiner erred in rejecting claims 10, 19, and 22 turns on whether the Examiner has properly taken Official Notice of “a private, read-only memory” being well-known. ANALYSIS Claims 1—9, 11—18, 20, and 21 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Gray, Vash, and Sahu. Claim 1 recites “in response to the issued program instruction being not part of a mispredicted execution path, abort an attempt to execute the speculative region of code.” Appellants argue that the combination of Gray, Vash, and Sahu fails to disclose aborting an attempt to execute a speculative region of code in response to an issued program instruction being not part of a mispredicted execution path. App. Br. 3—7; Reply Br. 2. Specifically, Appellants argue that Gray fails to disclose a mispredicted execution path. App. Br. 5. Appellants further argue that Vash teaches aborting executing a speculative instruction due to a branch misprediction, which is aborting an 3 Appeal 2016-007104 Application 12/814,025 instruction that is part of a mispredicted execution path, whereas claim 1 requires aborting an instruction that is not part of a mispredicted execution path. App. Br. 6; Vash 139. Thus, Appellants argue the “proposed combination of references at most teaches the exact opposite.” App. Br. 4. The Examiner finds that Gray teaches a speculative memory transaction execution that is aborted when the speculative transaction attempts a conflicting access, and Vash teaches executing a speculative instruction that is not part of a mispredicted path. Final Act. 3; Ans. 2—3. As such, the Examiner finds the combination of Gray and Vash teaches aborting an attempt to execute a speculative region of code in response to an issued program instruction being not part of a mispredicted execution path. Final Act. 3; Ans. 2—3. The Examiner further finds that if a speculative instruction, which includes and abort instruction, as taught in Gray, is on a correct path and is therefore executed, as taught in Vash, then the speculative abort instruction would be executed. Ans. 2 (citing Vash 139); see Final Act. 3. Appellants’ arguments are not persuasive and do not apprise us of error in the Examiner’s findings. As found by the Examiner, while Vash does teach aborting execution of an instruction due to a mispredicted execution path, Vash also teaches executing instructions that are not on a mispredicted execution path. Ans. 2; Vash Fig.4, || 34, 39. We note that instructions that are not on a mispredicted execution path are instructions on a correct execution path. See Spec. 175. The Examiner relies on Gray to teach program instructions, including an abort instruction, on a correct execution path. Ans. 3. Therefore, issued program instructions on a correct execution path, as taught by Gray, would be executed, as taught by Vash, 4 Appeal 2016-007104 Application 12/814,025 and could include an abort instruction, as taught by Gray. Ans. 3. As such, the abort instruction of Gray could determine an abort condition for an issued program instruction and in response to the issued program instruction being on a correct execution path (i.e., not part of a mispredicted execution path, and therefore executed as taught by Vash), abort an attempt to execute the speculative region of code. Thus, Appellants’ arguments are not persuasive. Further, Appellants argue that while the combination of references proposed by the Examiner teaches “the abort instruction of Gray [] included in the correctly predicted execution path of Vash, [where] the abort instruction is not part of a mispredicted execution path,” the combination is aborting an attempt to execute a non-speculative region of code, but the claim provides for aborting an attempt to execute a speculative region of code. Reply Br. 2. Appellants’ arguments are not persuasive of Examiner error. The Specification discloses Instructions executed speculatively as a result of a predicted branch that has not yet been resolved may be referred to herein as run-ahead instructions. [T]he processor may include mechanisms configured to prevent run-ahead instructions from causing the processor to abort a transaction attempt until the processor determines whether the run-ahead instructions are [sic] indeed on the correct execution path or were executed as a result of branch misprediction. Spec. 1173, 75. Although we do not import these limitations from the Specification in to the claims, we construe the claims in light of these teachings in the Specification. Whether an instruction is on a correct (not a mispredicted) or 5 Appeal 2016-007104 Application 12/814,025 a mispredicted execution path does not correlate directly to whether the instruction is a non-speculative or a speculative (run-ahead) instruction (i.e., in a speculative region of code). Thus, Appellants’ argument that “the abort takes place upon execution of the ‘correct execution path’ and is therefore not for a speculative region of code” is not persuasive because a determination of whether data is on a mispredicted path or not on a mispredicted path (i.e., on a correct path), does not change whether the data is in a speculative region of code or not. Reply Br. 2. Accordingly, we sustain the Examiner’s rejection of claim 1. Claims 12 and 21 recite similar features to claim 1. App. Br. 7, 12—15. Appellants do not present separate arguments for claims 3, 5—7, 9, 11, 13—18, and 20. Claims 3, 5—7, 9, and 11 depend from claim 1, claims 13—18 and 20 depend from claim 12. Appellants present statements towards the patentability of claims 2, 4, and 8. App. Br. 7—9. However, aside from reiterating the unpersuasive argument that Vash teaches aborting an instruction that is part of a branch misprediction from claim 1, these statements only recite the claim language, restate the Examiner’s findings, and conclude that the cited portions of the references fail to teach or suggest the limitations. Id. We do not consider such statements to constitute arguments that demonstrate error in the Examiner’s rejection because such statements merely point out the recite claim language, and generally allege the patentability of the claims. See 37 C.F.R. § 41.37(c)(l)(vii) (“A statement which merely points out what a claim recites will not be considered an argument for separate patentability of the claim.”); In re Lovin, 652 F.3d 1349, 1357 (Fed. Cir. 2011) (“[W]e hold that the Board reasonably interpreted Rule 41.37 to require more substantive 6 Appeal 2016-007104 Application 12/814,025 arguments in an appeal brief than a mere recitation of the claim elements and a naked assertion that the corresponding elements were not found in the prior art.”). Claims 2 and 8 depend from claim 1, and claim 4 depends from claim 3, which depends from claim 1. Therefore, we sustain the Examiner’s rejection of claims 1, 3, 5—7, 9, 11—18, 20, and 21. Claims 10, 19, and 22 stand rejected under 35 U.S.C. § 103(a) as unpatentable over Gray, Vash, Sahu, and Official Notice Appellants argue that the Examiner’s taking of Official Notice that employing “a private, read-only memory” is well-known “to eliminate tampering and increase security of the code” is improper, because it “is not capable of instant and unquestionable demonstration of being well-known.” App. Br. 9—10 (citing to MPEP 2144.03). Our reviewing court held that a satisfactory traverse of a finding of Official Notice “contain[s] adequate information or argument” to create on its face “a reasonable doubt regarding the circumstances justifying the . . . notice” of what is well known to a person of ordinary skill in the art. In re Boon, 439 F.2d 724, 728 (CCPA 1971). However, Appellants fail to point out the Examiner’s supposed errors in taking Official Notice. Specifically, Appellants do not include a statement as to why the noticed fact is not considered to be indisputably and unquestionably well-known. App. Br. 9-10; see Ans. 4 (“Appellant has failed to explain why the noticed fact is not common knowledge.”) On the contrary, as pointed out by the Examiner in the Answer, Appellants’ Remarks entered September 8, 2014, state, “the person of ordinary skill in the art would be aware private, read-only memory is known.” Ans. 4. Appellants fail to apprise us of error in the Official Notice taken by the 7 Appeal 2016-007104 Application 12/814,025 Examiner and fail to point us to where in the record the Official Notice was adequately and timely traversed. Therefore, Appellants’ traverse of Examiner’s private, read-only memory of Official Notice is inadequate and on the record, the Official Notice converts into admitted prior art. Id. Accordingly, we sustain the Examiner’s rejection of claims 10, 19, and 22. CONCLUSION The Examiner did not err in rejecting 1—9, 11—18, 20, and 21 under 35 U.S.C. § 103(a) as unpatentable over Gray, Vash, and Sahu. The Examiner did not err in rejecting 10, 19, and 22 under 35 U.S.C. § 103(a) as unpatentable over Gray, Vash, Sahu, and Official Notice. DECISION We affirm the rejections of claims 1—22. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv). AFFIRMED 8 Copy with citationCopy as parenthetical citation