Ex Parte Chu et al

Board of Patent Appeals and Interferences

Jan 4, 2010

10195478 (B.P.A.I. Jan. 4, 2010)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte FRANK R. CHU and STEVEN R. HETZLER
____________

Appeal 2008-004019
Application 10/195,478
Technology Center 2100
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Decided: January 4, 2010
____________

Before ALLEN R. MACDONALD, Vice Chief Administrative Patent Judge,
JOHN A. JEFFERY, and ST. JOHN COURTENAY, III, Administrative
Patent Judges.

JEFFERY, Administrative Patent Judge.

DECISION ON APPEAL
Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s
rejection of claims 1, 11-13, 15, 16, 20-25, 29, 30, and 34. Claims 14 and 28
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have been canceled, and claims 2-10, 17-19, 26, 27, and 31-331 have been
withdrawn from consideration. Br. 2.2 We have jurisdiction under 35
U.S.C. § 6(b). We affirm.

STATEMENT OF THE CASE
Appellants invented a disk device and a method that operate at
different power levels in different situations. The device includes power
control circuitry 340 that transitions between various power modes. State
Machine 400 provides power control logic commands to circuitry 340 and
creates write cache within memory 420 in response to write operations. This
arrangement reduces power consumption in a hard disk without adversely
impacting operation performance.3
Independent claim 1 is reproduced below with the key disputed
limitations emphasized:
1. A device, comprising:

operational logic responsive to communication signals over an
interface for performing input/output operations, the operational logic
provides a first and a second mode of operation, the second mode of
operation consuming less power than the first mode of operation; and

power control logic including a memory that is contained in the
device, the memory having a write cache, the power control logic
controlling the operational logic when the operational logic is in the
second mode of operation, and the power control logic being coupled to

1 Appellants state claim 34 is both withdrawn and finally rejected. Br. 2. As
claim 34 has been rejected by the Examiner under § 103 (Ans. 8-9), we
presume the statement that claim 34 is withdrawn is erroneous.
2 Throughout this opinion, we refer to (1) the Appeal Brief filed April 23,
2007, and (2) the Examiner’s Answer mailed July 18, 2007.
3 See generally Spec. 3-5 and 8-10; Figs. 3-5.
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the communication signals over the interface and being responsive to a
write data command communication signal by storing write data in the
write cache, the write data being received subsequent to the write data
command communication signal.

The Examiner relies on the following as evidence of unpatentability:
Ottman US 5,142,680 Aug. 25, 1992
Sellers US 5,228,450 July 20, 1993
Jones US 5,313,626 May 17, 1994
Hopkins US 5,345,347 Sept. 6, 1994

Caccavale US 5,892,937 Apr. 6, 1999

Loechel US 5,895,488 Apr. 20, 1999
Pinvidic US 6,470,461 B1 Oct. 22, 2002
(filed June 7, 1999)

(1) The Examiner rejected claims 1, 13, 21, and 23-25 under 35 U.S.C.
§ 103(a) as being unpatentable over Hopkins and Sellers. Ans. 3-6.
(2) The Examiner rejected claims 11 and 12 under 35 U.S.C. § 103(a)
as being unpatentable over Hopkins, Sellers, and Ottman. Ans. 6-7.
(3) The Examiner rejected claims 15 and 29 under 35 U.S.C. § 103(a)
as being unpatentable over Hopkins, Sellers, and Loechel. Ans. 7.
(4) The Examiner rejected claims 16 and 30 under 35 U.S.C. § 103(a)
as being unpatentable over Loechel, Hopkins, Sellers,4 and Caccavale. Ans.
7-8.

4 The order of the references in the rejection of claims 16 and 30 (Loechel,
Hopkins, and Sellers) differs from the rejection of claims 15 and 29
(Hopkins, Sellers, and Loechel), from which claims 16 and 30 depend. See
Ans. 7-8. Nonetheless, the ordering in the rejection is insignificant
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(5) The Examiner rejected claims 20 and 34 under 35 U.S.C. § 103(a)
as being unpatentable over Hopkins, Sellers, and Pinvidic. Ans. 8-9.
(6) The Examiner rejected claim 22 under 35 U.S.C. § 103(a) as being
unpatentable over Hopkins, Sellers, and Jones. Ans. 9.

OBVIOUSNESS REJECTION BASED ON HOPKINS AND SELLERS
We group the claims as follows: (1) claims 1, 13, and 21, and (2)
claims 23-25.
(1) Claims 1, 13, and 21
The Examiner finds that Hopkins discloses all the limitation of
representative independent claim 1,5 except for how the device operates in
response to write data command communication signals. Ans. 3-4. The
Examiner relies on Sellers’ teaching of storing write data in a buffer to
conserve power as a reason to combine Sellers with Hopkins. Ans. 4.
Appellants argue that: (1) the Examiner provides no motivation or
suggestion to combine Sellers with Hopkins, as suggested, because both
references discuss functioning at a fully operational mode when a write
command is received; (2) neither reference, alone or in combination, teaches
the recited power control logic recitation because Hopkins is silent about

regarding the Examiner’s obviousness determination. See In re Bush, 296
F.2d 491, 496 (CCPA 1961) (“[W]e deem it of no significance, but merely a
matter of exposition, that the rejection is stated to be A in view of B instead
of B in view of A, or to term one reference primary and the other
secondary.”)
5 Appellants group claims 1, 13, 21, and 23-25 (Br. 4-11) but also
specifically address independent claim 23 (Br. 10). Accordingly, we select
independent claim 1 as representative of claims 13 and 21 and will address
claim 23 under a separate heading. 37 C.F.R. § 41.37(c)(1)(vii).
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having memory with write cache, and Hopkins and Sellers operate in a fully
operational mode when a write command is received; and (3) the Examiner
relies on hindsight since neither reference provides adequate motivation or
suggestion to combine the references, nor identifies the general knowledge
available to a skilled artisan that would provide a reason to combine the
references. Br. 4-11.
The issues before us, then, are as follows:

ISSUES
(1) Under § 103, have Appellants shown that the Examiner erred in
rejecting claim 1 by finding that Hopkins and Sellers collectively teach a
power control logic having memory with write cache?
(2) Under § 103, have Appellants shown that the Examiner erred in
rejecting claim 1 by finding that Hopkins and Sellers collectively teach a
power control logic that responds to a write data command communication
signal by storing write data in the write cache and the write data is received
subsequent to the write data command signal?
(3) Is the Examiner’s reason to combine these references supported by
articulated reasoning with some rational underpinning to justify the
Examiner’s obviousness conclusion?

FINDINGS OF FACT
The record supports the following additional findings of fact (FF) by a
preponderance of the evidence:
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Hopkins
1. Hopkins discloses a disk drive that employs several reduced power
modes (e.g., ACTIVE LOW POWER 1 (ALP1), ACTIVE LOW POWER 2
(ALP2), InACTIVE LOW POWER 1 (ILP1), and InACTIVE LOWER
POWER 2 (IPL2)) to save energy and increase battery life. Abstract, col. 2,
ll. 8-14, and columns 7-10 (Tables 1 and 2); Fig. 1.
2. Hopkins’ disk drive includes a host computer 84 and a head and
disk assembly (HDA) 10. A host interface and disk controller (HIDC) 57
provides control and information paths between: (a) host computer 84 using
data bus 64 and host interface 82, and (2) other elements in Figure 1 (e.g.,
HDA 10, buffer 66, microcontroller 36, RAM 38, ROM 39) via bus 37.
HIDC circuitry 57 may have one or more reduced operating modes (e.g.,
Idle 1 and Idle 2 modes). Col. 5, ll. 35-36 and col. 6, ll. 34-49; Fig. 1.
3. Hopkins discloses a buffer memory 66 that accommodates
differences in data flow rates between HIDC 57 and host 84 and HIDC 57
and drive 10. Col. 6, ll. 39-42.
4. In response to commands from host computer 84, Hopkins
discloses the disk drive operates in ACTIVE mode when actively reading or
writing data. Col. 2, ll. 21-24 and col. 9, ll. 14-18.
5. Hopkins discloses the disk drive operates in reduced power modes
when the drive is not actively reading or writing. For example, the system
enters ALP1 following the complete execution of a command from the host
computer, and enters ALP2 after an inactivity timeout period. The system
also enters ILP1 in response to a special command, and enters ILP2
responsive to a host command. Col. 2, l. 19 – col. 3, l. 60, col. 8, l. 23 – col.
10, l. 34, and Tables 1 and 2.
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6. Microcontroller 36 controls entry and exit from the reduced power
modes. Col. 2, ll. 32-37.

Sellers
7. Sellers teaches a system that includes a data buffer 56 that
temporarily holds data before the data is written to disk drive 40. Col. 5, l.
39-42; Fig. 4.
8. When RAM 130 or 132 in buffer 56 is nearly full, Sellers’
controller 48 forwards the contents to disk drive 40. Disk drive 40 is only
active for short periods of time. This approach conserves power by only
operating the disk drive when necessary. Col. 9, ll. 11-21; Figs. 4 and 9.

PRINCIPLES OF LAW
In rejecting claims under 35 U.S.C. § 103, it is incumbent upon
the Examiner to establish a factual basis to support the legal
conclusion of obviousness. See In re Fine, 837 F.2d 1071, 1073-74
(Fed. Cir. 1988). If the Examiner’s burden is met, the burden then
shifts to the Appellants to overcome the prima facie case with
argument and/or evidence. Obviousness is then determined on the
basis of the evidence as a whole and the relative persuasiveness of the
arguments. See Oetiker, 977 F.2d 1443, 1445 (Fed. Cir. 1992).

ANALYSIS
Based on the record before us, we find no error in the Examiner’s
obviousness rejection of representative independent claim 1. First, Hopkins
discloses a device (disk drive in Figure 1) that has control logic (e.g., HIDC
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circuitry 57, buffer 66, microcontroller 36, RAM 38, ROM 39, and bus 37)
for providing control and information paths between elements. See FF 2.
Since data is written to buffer 66 to accommodate for the differences in data
flow rates between HIDC 57, host 84, HIDC 57, and drive 10 (FF 3), we
find that buffer 66 is also a write buffer. Moreover, Appellants have not
disputed that this buffer 66 is not also cache. See Br. 4-11. We therefore
disagree with Appellants that Hopkins does not disclose a control logic with
memory having write cache (Br. 9) as recited in claim 1, and agree with the
Examiner that Hopkins discloses a memory with write cache (Ans. 16).
Second, Sellers provides a reason to combine its teachings with
Hopkins. See FF 1 and 8. Appellants acknowledge that Hopkins employs
several reduced power modes. Br. 6. Hopkins also expresses the desire to
use these modes to save energy and battery life. See FF 1 and 5. In fact,
both Hopkins and Sellers are interested in conserving their system’s power.
See FF 1 and 8. Thus, combining Sellers’ teaching related to the buffer or
cache’s operation with Hopkins’ device would yield no more than the
predictable result of a combined Hopkins/Sellers device that conserves even
more battery power and saves even more energy. See KSR Int’l Co. v.
Teleflex, Inc., 550 U.S. 398, 416 (2007). Moreover, an ordinarily skilled
artisan would have recognized that combining Sellers’ teachings with
Hopkins, which always transitions into active mode for write commands (FF
4), would equally improve upon Hopkins’ write command operations in a
similar way. See id. at 417. That is, the combined Hopkins/Sellers device
would operate its write commands in the same fashion as Sellers, and use its
technique of reducing the active intervals (see Ans. 12) and only fully
activating the disk drive when the cache is nearly full (FF 8).
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Additionally, contrary to Appellants’ position (Br. 7), Sellers is
different from Hopkins. As Appellants admit (Br. 6-7), Hopkins discloses
operating the disk drive in a fully active mode in response to commands
from the host computer to read or write data. See FF 4-5. Thus, Hopkins
always enters an active mode when a write command is received.
Appellants also admit that Sellers’ disk drive is active for short intervals
because of buffer 66 (Br. 6) and, therefore, in contrast to Hopkins, is not
active every time a write command is received. Furthermore, Sellers
provides all the more reason to apply its teaching to Hopkins to avoid fully
activating the disk drive every time data is written to a disk drive by only
transferring data to the disk drive when buffer or cache 56 is nearly full. See
FF 7-8. Sellers therefore provides ample motivation to improve upon
Hopkins’ cache, contrary to Appellants’ assertions (Br. 5-6), and the
Examiner has not relied on hindsight. Br. 11.
Without arguing in detail (Br. 9), Appellants further contend that
neither reference teaches storing in write cache write data that is received
subsequent to the write data command communication signal. We disagree.
In order for the combined Hopkins/Sellers disk drive to know to write data
to cache, some communication signal (e.g., an instruction) must be sent to
the device prior to writing the data to cache. That is, without a signal being
sent, the system would not know to write data. Thus, we find that the
combined Hopkins/Sellers’ system would have included the write data being
received subsequent to a write data command communication signal being
sent. The Examiner has therefore presented a prima facie case of
obviousness for representative independent claim 1.
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For the foregoing reasons, Appellants have not shown error in the
obviousness rejection of independent claim 1 based on Hopkins and Sellers
and claims 13 and 21, which fall with claim 1.

(2) Claims 23-25
Representative independent claim 236 recites a method for controlling
power of a device with a similar limitation to claim 1 of storing write data in
memory’s write cache when a write command communication signal is
received by the power control logic and the write data is received subsequent
to the write data command communication signal. The Examiner applies the
same analysis to claim 23 as claim 1. See Ans. 3-6 (claim 23 using the same
passages of Hopkins and Sellers for the analysis of claims 1 and 23).
Essentially, Appellants make the arguments regarding claim 23 as was
presented for claim 1. See Br. 4-11. We are not persuaded by these
arguments for the reasons discussed above in connection with claim 1.
For the previous reasons, Appellants have not shown error in the
obviousness rejection of independent claim 23 based on Hopkins and Sellers
and claims 24 and 25, which fall with claim 23.

6 Appellants argue independent claim 23 (Br. 10) and do not separately
address claims 24 and 25. App. Br. 4-11. Accordingly, we select claim 23 as
representative. 37 C.F.R. § 41.37(c)(1)(vii).
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REMAINING OBVIOUSNESS REJECTIONS
The remaining claims depend from independent claims 1 and 23 and
similarly rely on Hopkins and Sellers. We therefore need not address
whether Ottman, Loechel, Caccavale, Pinvidic, and Jones cure the purported
deficiencies of Hopkins and Sellers or teach the subject matter of claims 1
and 23. Br. 11-21. For the reasons discussed above, we will sustain the
Examiner's obviousness rejections of (1) claims 11 and 12 over Hopkins,
Sellers, and Ottman; (2) claims 15 and 29 over Hopkins, Sellers, and
Loechel; (3) claims 16 and 30 over Hopkins, Sellers, Loechel, and
Caccavale; (4) claims 20 and 34 over Hopkins, Sellers, and Pinvidic; and (5)
claim 22 over Hopkins, Sellers, and Jones.

CONCLUSION
Appellants have not shown that the Examiner erred in rejecting claims
1, 11-13, 15, 16, 20-25, 29, 30, and 34 under 35 U.S.C. § 103.

ORDER
The Examiner’s decision rejecting claims 1, 11-13, 15, 16, 20-25, 29,
30, and 34 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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pgc

JOSEPH C. REDMOND, JR.
43464 FOXGROVE COURT
ASHBURN VA 20147