Ex Parte Chu

Board of Patent Appeals and Interferences

Feb 4, 2009

10963825 (B.P.A.I. Feb. 4, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte WILLIAM W. Y. CHU
____________

Appeal 2008-1650
Application 10/963,825
Technology Center 2400
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Decided: February 4, 2009
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Before JAMES D. THOMAS, JOSEPH L. DIXON,
and JAY P. LUCAS, Administrative Patent Judges.
THOMAS, Administrative Patent Judge.

DECISION ON APPEAL
I. STATEMENT OF THE CASE
Appellant appeals under 35 U.S.C. § 134(a) from the Examiner’s
twice rejection of claims 1 through 30, 35, 36, 38 through 46, 50 through 54,
57 through 64, 68, 69, 72, 76, through 79, 82, 85 through 88, and 92 through
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Application 10/963,825

120. We have jurisdiction under 35 U.S.C. § 6(b). The present application
is a reissue of US Patent 6,321,335, patented on November 20, 2001.
We affirm.
A. THE INVENTION
As best depicted in disclosed figures 1, 4, 5, and 5A, Appellant’s
invention is an attached computer modular (ACM) 10 that houses a
microprocessor-based CPU along with a mass storage device or hard disk
drive in the same housing or enclosure.
B. ILLUSTRATIVE CLAIMS
Representative independent claims 1 and 14 are reproduced below:
1. A computer module, said module comprising:

an enclosure, said enclosure being insertable into a console;

a central processing unit in said enclosure, said central processing unit
comprising a microprocessor based integrated circuit chip;

a hard disk drive in said enclosure, said hard disk drive being coupled
to said central processing unit; and

a programmable memory device in said enclosure, said programmable
memory device being configurable to store a password for preventing a
possibility of unauthorized use of said hard disk drive.

14. A method for operating a computer system, said method
comprising:

inserting an attached computer module (“ACM”) into a bay of a
modular computer system, said ACM comprising a microprocessor unit
coupled to a mass memory storage device including a plurality of application
software program files, the microprocessor unit configured to execute the
plurality of application software program files;
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applying power to said computer system and said ACM to execute a
security program, said security program being stored in said mass memory
storage device; and

prompting for a user password from a user on a display.

C. PRIOR ART AND REJECTIONS
The prior art relied upon by the Examiner in rejecting the claims on
appeal is:
Advani US 5,862,381 Jan. 19, 1999
(Filing date Nov. 26, 1996)
Kikinis US 5,640,302 Jun. 17, 1997
Jones US 5,623,637 Apr. 22, 1997
All claims on appeal stand rejected under 35 U.S.C. § 103. As
evidence of obviousness as to claims 1 through 13, 24 through 30, 35, 36, 38
through 46, 50 through 54, 57 through 64, 68, 69, 72, 76 through 79, 82, 85
through 88, and 92 through 120, the Examiner relies upon Kikinis in view of
Jones in a first stated rejection. In a second stated rejection as to claims 14
through 23, the Examiner relies upon this combination of reference further
in view of Advani.

II ISSUE
The issue presented to us on appeal is whether Appellant has shown
that the Examiner erred in finding that the subject matter of all claims on
appeal would have been obvious to a person of ordinary skill in the art
within 35 U.S.C. § 103.

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III. PRINCIPLES OF LAW
Section 103 forbids issuance of a patent when “the differences
between the subject matte sought to be patented and the prior art are
such that the subject matter as a whole would have been obvious at
the time the invention was made to a person having ordinary skill in
the art to which said subject matter pertains.”

KSR Int’l Co. v. Teleflex Inc., 127 S. Ct. 1727, 1734 (2007).

In KSR, the Supreme Court emphasized “the need for caution in
granting a patent based on the combination of elements found in the prior
art,” and discussed circumstances in which a patent might be determined to
be obvious. KSR, 127 S. Ct. at 1739 (citing Graham v. John Deere Co. 383
U.S. 1, 12 (1966)). The Court reaffirmed principles based on it precedent
that “[t]he combination of familiar elements according to known methods is
likely to be obvious when it does no more than yield predictable results.” Id.
The operative question in this “functional approach” is thus “whether the
improvement is more than the predictable use of prior art elements according
to their established functions.” Id. at 1740.
The Federal Circuit recently recognized that “[a]n obviousness
determination is not the result of a rigid formula disassociate from the
consideration of the facts of a case. Indeed, the common sense of those
skilled in the art demonstrated why some combinations would have been
obvious where others would not.” Leapfrog Enters, Inc. v. Fisher-Prince
Inc., 485 F.3d 1157, 1161 (Fed. Cir. 2007)(citing KSR, 127 S. Ct. 1727,
1739 (2007)). The Federal Circuit relied in part on the fact that Leapfrog
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had presented no evidence that the inclusion of a reader in the combined
device was “uniquely challenging or difficult for one of ordinary skill in the
art” or “represented an unobvious step over the prior art.” Id. at 1162 (citing
KSR, 127 S. Ct. at 1740-41).

IV. FACTS AND ANAYLSIS
Initially, the top of page 3 of the principal Brief indicates that
independent claim 1 is representative of all pending apparatus claims.
Likewise, the middle of page 4 of this Brief indicates that method
independent claim 14 is representative of all method claims on appeal. We
therefore treat them in the same manner. Separate arguments are presented
collectively as to dependent claims 11 through 13 at page 11 of this Brief,
which are separately treated by the Examiner at page 26 of the Answer.
Secondly, the arguments presented by Appellant in the principal Brief
do not argue that Kikinis and Jones are not properly combinable within 35
U.S.C. § 103 in the first stated rejection of representative independent claim
1 on appeal. As to independent claim 14, Appellant argues in the principal
Brief only that Advani is not not properly combinable with the Kikinis and
Jones combination within 35 U.S.C. § 103; Appellant does not separately
argue in the second stated rejection that Kikinis and Jones are not properly
combinable within themselves. Moreover, the rationale of the Examiner
with respect to the combinability of the teachings of the prior art relied upon
by the Examiner is consistent with the above-noted case law.

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Arguments in the principal Brief tend to focus upon the feature of
representative independent claim 1 of a CPU being within the same
enclosure as a hard disk drive. This appears to be an over simplification of
the issue since the more specific limitation for this central processing unit is
that the CPU is a “microprocessor based integrated circuit chip.”
Correspondingly, method independent claim 14 recites a microprocessor unit
but recites, instead of a hard disk drive, a broader recitation of a mass
memory storage device.
Consistent with the Appellant’s disclosed invention, as noted earlier,
in figures 1, 4, 5, and 5A, the Examiner properly relies upon the statements
at Specification column 3, lines 30 through 33, that states “[t]he ACM has a
microprocessor unit (e.g., microcontroller, microprocessor) coupled to a
mass memory storage device (e.g., hard disk).” Additionally, the Examiner
makes reference to column 6, lines 13 and 14 where it states “[t]he CPU
module can use a suitable microprocessing unit, microcontroller, digital
signal processor, and the like.” The Examiner has correctly shown
corresponding structures in Kikinis and Jones as the artisan will appreciate.
The modular portable computer of Kikinis is shown in figure 1A to
which various “function modules” are insertable as in figures 3, 5, 6, 8, 9,
10, and figures 15A through 21. We recognize that Kikinis does not show
among these figures a microprocessor-based CPU and a hard disk drive per
se but do appear to show a microprocessor-based CPU and a mass storage
device. Notwithstanding these considerations, we consider the subject
matter of representative independent claims 1 and 14 as obvious according
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to the basic reasoning advanced by the Examiner. Figure 6 relied upon by
the Examiner shows a CPU function module 103 along with a state
translator105 and a RAM 113 within exemplary module 99’s
housing/enclosure. Consistent with the mass storage device recitations and
the hard disk drive recitations noted with respect to independent claims 14
and 1, respectively, figures 8, 9, and 10 respectfully show a floppy disk drive
module 130, a hard disk drive module 137 and a flash card memory module
149, each of which is respectively controlled by the noted controllers. The
CPU function module in figure 19 is illustrated in figure 20 to include both a
CPU, state translator and a RAM.
Particular teachings with respect to figure 6 of Kikinis are found at
column 7, line 37 through column 8, line 60, which identify various prior art
CPUs for the CPU shown in figure 6 as well as the teaching that the state
translator 105 in figure 6 comprises an integrated circuit chip or chip set.
This translator functions to translate commands of the CPU to the
connectable bus. The teachings at column 8, relate in detail to the state
translator where, significantly, column 8, lines 50 through 53 states that
“[a]s an example of software programmability, translators could be
implemented with microprocessor technology and software programmable.”
Thus, based on this teaching alone, figure 6’s showing of a microprocessor-
based CPU and a translator may comprise a microprocessor itself teaches
that the CPU module may include two microprocessors and its associated
RAM 113.

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The significance of these teachings is born out with respect to the
floppy disk drive module 130 shown in figure 8 and the hard disk drive
module 137 shown in figure 9, both of which utilize labeled controllers 127
and 141 respectively. Noted teachings begin at column 9, line 45 through
column 10, line 22 of Kikinis. With respect to the controller 127 in figure 8,
mention again is made of so-called ASIC (microprocessor-
based/microcontroller) chips or chip sets for the translation function noted
earlier. Indeed, a specific statement is made at column 10, lines 4 through 7
that “[a]s in the case of the FDD module [the floppy disk drive module in
figure 8] described above, a controller 141 is provided to translate between
Notebus 89 and the HDD unit.” Thus, the artisan would understand from
these teachings that the respective controllers in figures 8 and 9 can also be
embodied in terms of microprocessor-based CPUs in representative
independent claims 1 and 14 on appeal. At least with respect to the mass
storage device of independent claim 14, the showing of the translator in the
flash card memory module 149 in figure 10 is also consistent with the just
noted teachings.
Thus, the artisan would well appreciate that Appellant’s arguments in
the Brief and Reply Brief alleging that Kikinis does not teach or show what
the Examiner alleged are clearly misplaced. The actual teachings we have
noted here further embellish upon the Examiner’s positions in the Answer
are consistent with Appellant’s own disclosed invention noted earlier as well
as the definitions provided in the latter pages of the Reply Brief. Note again
that the claimed microprocessor in representative independent claims 1 and
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14 on appeal includes or is defined to include a microprocessor or a
microcontroller as disclosed. The claims do not exclude comparable
teachings in Kikinis (and as we will shortly show in Jones as well) and do
not exclude the microprocessor-based/microcontroller ASICs, the teachings
of chip sets and the specific teachings of microprocessors comprising the
earlier-noted controllers in figures 6, 8, 9, 10 and those associated with
figures 19 and 20 of Kikinis.
Notwithstanding these specific teachings in Kikinis, we note that our
reviewing court has recently found in Boston Scientific Scimed, Inc. v.
Cordis Corp., No. 2008-1073, 2009 WL 89246 (Fed. Cir. 2009) that it is
permissible to combine the teachings of plural embodiments within the same
reference rejection is based upon 35 U.S.C. § 103. The court’s reasoning
was consistent with the case law we noted earlier such that, what is recited in
the claims on appeal would have been a mere predicable variation of the
subject matter already taught in a single reference and does not require a
leap of inventiveness.
As to Jones, pages 8 through 11 of the principal Brief merely allege
the same argument that Jones does not teach a computer module housing a
CPU and a hard disk drive. Essentially, the Examiner has acknowledged
this and so do we. On the other hand, we find that the teachings in Jones
clearly buttress the Examiner’s findings and our conclusion of obviousness
of the claimed subject matter, particularly in view of the fact that the
combinability of Kikinis and Jones has not been argued by Appellant. Even
within the secure memory card 100 in figure 1 of Jones as well as the smart
card 250 within this secure memory card, a microprocessor 260 is taught
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such as at column 2, lines 44 through 58 and the entire paragraph at column
5, lines 1 through 19. This microprocessor functions in association with
command memory 150, which the artisan would correspond to a mass
memory device at least of the size required by independent method claim 14
on appeal. Appellant does not contest the Examiner’s specific reliance upon
Jones for a programmable memory device “configurable” to store a
password for preventing a possibility of unauthorized use of a hard disk
drive as the Examiner relies upon at column 5, lines 53 through 62. Here,
we note as well that the software files are stored in Jones based on the
teachings beginning at column 5, lines 1 through 19, the teachings beginning
at the middle of column 6, through the end of the patent including the
password related teachings at column 8, line 3. These teachings further
buttress the Examiner’s positions with respect to the separate rejection of
representative independent claim 14, where the Examiner further relies upon
Advani.
The Examiner also relies upon the teachings in figure 1 of Jones in the
statement of the rejection of claims 11 through 13 that are argued generally
at page 11 of the principal Brief on appeal. We read these arguments in the
same manner as does the Examiner at page 26 of the Answer such that the
nature of the arguments relies upon the features that are not recited in the
noted claims on appeal. The application specific integrated circuit (ASIC)
290 in the figures of Jones is consistent with similar circuits noted earlier in
Kikinis. Although figure 1 of Jones also utilizes the same element number
290 to illustrate the clock circuit, it is also labeled separately as a real time
clock to synchronize the smart card 250 with the ASIC circuit 290. The
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Examiner’s responsive arguments at page 26 of the Answer with respect to
claims 11 through 13 are not contested in the Reply Brief.
Turning lastly to the second stated rejection of representative method
independent claim 14 relying upon Kikinis in view of Jones, further in view
of Advani, Advani’s showing in figure 1 is consistent with the actual
structure associated with the Jones teachings which we noted earlier.
Advani utilizes a mass storage device 125, depicted in figure 1 as a hard disk
drive type of mass storage device. As noted by the Examiner at page 27 of
the Answer, the security program in Kikinis is stored in the mass memory
storage device with significant additional teachings at column 16, lines 16
through 20 relating to a security code or password usages. The Examiner’s
reliance upon Advani is merely to teach that it was known in the art to store
a plurality of application software program files, to which Jones already has
been identified by us in this opinion as teaching such a feature. Moreover,
Appellant’s own general discussion of the prior art in the background of his
own invention at column 2 indicates that mass storage devices and floppy
disks were known to store applications programs independently as well as
what Advani teaches. Certainly, in view of the above noted case law, there
can be no valid assertion that the Examiner has exercised prohibited
hindsight in the combination of the teachings from the applied prior art.
Similarly, this case law also supports the same conclusion of obviousness of
the argued features with respect to independent claim 14 on appeal in the
second stated rejection.

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V. CONCLUSION
In view of the foregoing, we have concluded that Appellant has not
shown that the Examiner erred in rejecting all the claims on appeal under
35 U.S.C. § 103. The claims are not patentable.

VI. DECISION
Thus, we affirm the Examiner’s separate rejections under 35 U.S.C.
§ 103 of claims 1 through 13, 24 through 30, 35, 36, 38 through 46, 50
through 54, 57 through 64, 68, 69, 72, 76 through 79, 82, 85 through 88, and
92 through 120 in a first stated rejection and of claims 14 through 23 in a
second stated rejection.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. §1.136(a). See 37 C.F.R.
§ 1.136(a)(1)(iv).
AFFIRMED

pgc

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