Ex Parte CHOI et alDownload PDFPatent Trial and Appeal BoardSep 6, 201613185105 (P.T.A.B. Sep. 6, 2016) Copy Citation UNITED STA TES p A TENT AND TRADEMARK OFFICE APPLICATION NO. FILING DATE 13/185,105 07/18/2011 58027 7590 09/08/2016 RC PARK & ASSOCIATES, PLC 1894 PRESTON WHITE DRIVE RESTON, VA 20191 FIRST NAMED INVENTOR Young Joo CHOI UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www .uspto.gov ATTORNEY DOCKET NO. CONFIRMATION NO. P4354USOO 1681 EXAMINER BELL, LAUREN R ART UNIT PAPER NUMBER 2816 NOTIFICATION DATE DELIVERY MODE 09/08/2016 ELECTRONIC Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the following e-mail address( es): PATENT@PARK-LAW.COM PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE BEFORE THE PATENT TRIAL AND APPEAL BOARD Ex parte YOUNG JOO CHOI, WOO GEUN LEE, KAP SOO YOON, KI-WON KIM, SANG WAN JIN, JAE WON SONG, and ZHU XUN Appeal2014-005393 Application 13/185,105 Technology Center 2800 Before BRADLEY R. GARRIS, TERRY J. OWENS, and JAMES C. HOUSEL, Administrative Patent Judges. OWENS, Administrative Patent Judge. DECISION ON APPEAL STATEMENT OF THE CASE The Appellants appeal under 35 U.S.C. § 134(a) from the Examiner's rejection of claims 1, 2, and 4--12. We have jurisdiction under 35 U.S.C. § 6(b). The Invention The Appellants claim a thin film transistor array panel. Claim 1 is illustrative: 1. A thin film transistor array panel, comprising: a substrate; a gate line disposed on the substrate and comprising a gate electrode; Appeal2014-005393 Application 13/185,105 a first gate insulating layer disposed on the gate line and comprising silicon nitride; a second gate insulating layer disposed on the first gate insulating layer and comprising silicon oxide; an oxide semiconductor disposed on the second gate insulating layer; a data line disposed on the oxide semiconductor and comprising a source electrode; a drain electrode disposed on the oxide semiconductor and facing the source electrode; and a pixel electrode that is connected to the drain electrode, wherein a thickness of the first gate insulating layer is greater than 2000 A and less than or equal to 5000 A, and wherein a thickness of the second gate insulating layer is greater than or equal to 200 A and less than 500 A. Takeguchi Yamazaki The References US 2010/0176399 Al US 2011/0024751 Al The Rejection July 15, 2010 Feb. 3, 2011 Claims 1, 2, and 4--12 stand rejected under 35 U.S.C. § 103 over Takeguchi in view of Yamazaki. OPINION We affirm the rejection. The Appellants state that the claims stand or fall together (App. Br. 6). We therefore limit our discussion to one claim, i.e., claim 1, which is the sole independent claim. See 37 C.F.R. § 41.37(c)(l)(iv) (2012). Takeguchi discloses a display including a thin film transistor (108) comprising, in order, 1) an insulating substrate (10), 2) a gate electrode (11 ), 3) a first gate insulating layer (an approximately 350 nm (3500 A) thick SiN film (12) which has a relatively high dry etching rate and good processability and is thick to secure a breakdown voltage), 4) a second gate 2 Appeal2014-005393 Application 13/185,105 0 insulating layer (an approximately 50 nm (500 A) thick SiO film (13) which has a low dry etching rate and is thin to prevent degradation of productivity) and 5) a polycrystalline semiconductor film (14) (i-fi-f 29, 39--41, 50; Fig. 2). "The thicknesses of the SiN film 12 and the SiO film 13 are not limited to those thicknesses, and they may be determined in consideration of a breakdown voltage, insulating film capacitance, productivity and so on" (i-f 50). The transistor "has a high mobility and good reliability because the part where the channel of the semiconductor film [ 14] is formed has crystallinity" (i-f 46). Due to the crystallinity at the semiconductor film (14)/SiO film (13) interface "[i]t is thereby possible to suppress increase in S value and degradation of mobility" (id.) and "the shift of a threshold voltage, which is considered to be a cause of weak junction, does not easily occur" (id.). Yamaguchi discloses a display including a thin film transistor ( 448) comprising, in order, 1) a substrate (400), 2) a gate electrode (421a), 3) a 100-500 nm thick gate insulating layer (402) which can be a single layer of silicon oxide, silicon nitride, silicon oxynitride, silicon oxide nitride, aluminum oxide, or a stacked layer thereof wherein a first layer is 50- 200 nm thick, a second layer is 50-300 nm thick and the first layer has a lower electric resistivity than the second layer, 4) a first oxide semiconductor layer ( 442) and 5) a second oxide semiconductor layer ( 443) (i-fi-f 32, 58, 103, 123, 129, 221; Fig. 2E). "By manufacturing a thin film transistor using this stack of layers, a thin film transistor with excellent electrical characteristics (for example, electrical field mobility) can be obtained" (i-f 32). 3 Appeal2014-005393 Application 13/185,105 The Appellants assert that Takeguchi's disclosure that "[t]he thicknesses of the SiN film 12 and the SiO film 13 are not limited to those thicknesses, and they may be determined in consideration of a breakdown voltage, insulating film capacitance, productivity and so on" (i-f 50), "with its myriad conditions, is insufficient to even begin to teach one of ordinary skill in the art the claimed range for the thickness of the second gate insulating layer" (App. Br. 8). The Appellants' claim 1 requires a second gate insulating layer thickness greater than or equal to 200 A and less than 500 A. Takeguchi' s second gate insulating layer thickness is "approximately 50 nm [500 AJ" (i-f 50). The term "approximately," like the term "about," permits some tolerance. See In re Ayers, 154 F.2d 182, 185 (CCPA 1946). Hence, Takeguchi's second gate insulating layer thickness of approximately 500 A includes values somewhat less than 500 A and, therefore, overlaps the Appellants' range. Consequently, Takeguchi would have rendered thicknesses within the Appellants' recited range prima facie obvious to one of ordinary skill in the art. See In re Peterson, 315 F.3d 1325, 1329-30 (Fed. Cir. 2003) ("In cases involving overlapping ranges, we and our predecessor court have consistently held that even a slight overlap in range establishes a prima facie case of obviousness"). Moreover, Takeguchi' s disclosure that the second gate insulate layer is thin to prevent degradation of productivity and is not limited to the disclosed approximately 500 A thickness (i-f 50) would have led one of ordinary skill in the art, through no more than ordinary creativity, to minimize that layer's thickness such that, if possible, it is less than 500 A. See KSR Int'! Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007) (in making an obviousness determination one "can take 4 Appeal2014-005393 Application 13/185,105 account of the inferences and creative steps that a person of ordinary skill in the art would employ"). The Appellants assert that "one of ordinary skill in the art would not combine the thickness limits for the first and second gate insulating layers taught by Yamazaki, which does disclose an oxide semiconductor, with the teachings of Takeguchi, which does not disclose an oxide semiconductor layer, to arrive at the thicknesses claimed in the present application. Furthermore, even if the teachings of these references were to be combined, the combination fails to disclose an oxide semiconductor disposed on a second gate insulating layer comprising silicon oxide" (Reply Br. 5). Takeguchi discloses that the polycrystalline semiconductor, which is on a silicon oxide gate insulating layer, suppresses degradation of mobility (i-fi-f 41, 46). Similarly, Yamazaki discloses that the oxide semiconductor, which can be on a silicon oxide gate insulating layer, provides excellent electrical field mobility (i-fi-f 32; 123; 125). Thus; one of ordinary skill in the art, through no more than ordinary creativity, would have used an oxide semiconductor as an alternative to Takeguchi's polycrystalline semiconductor to obtain the desired good mobility. See KSR, 550 U.S. at 418; In re O'Farrell, 853 F.2d 894, 903---04 (Fed. Cir. 1988) ("Obviousness does not require absolute predictability of success .... For obviousness under§ 103, all that is required is a reasonable expectation of success."). For the above reasons we are not persuaded of reversible error in the rejection. 5 Appeal2014-005393 Application 13/185,105 DECISION/ORDER The rejection of claims 1, 2, and 4--12 under 35 U.S.C. § 103 over Takeguchi in view of Yamazaki is affirmed. It is ordered that the Examiner's decision is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a). AFFIRMED 6 Copy with citationCopy as parenthetical citation