Ex Parte Chng et al

Board of Patent Appeals and Interferences

Mar 28, 2012

10973485 (B.P.A.I. Mar. 28, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/973,485 10/26/2004 YongPeng Chng S01.12-1054/STL 11808 1962
27365 7590 03/29/2012
SEAGATE TECHNOLOGY LLC
C/O WESTMAN, CHAMPLIN & KELLY, P.A.
SUITE 1400
900 SECOND AVENUE SOUTH
MINNEAPOLIS, MN 55402-3244
EXAMINER
CHOE, YONG J
ART UNIT PAPER NUMBER
2185
MAIL DATE DELIVERY MODE
03/29/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte YONGPENG CHNG, LIANYONG TAN,
YAMPHENG THAM, HUAYUAN CHEN, and WESLEY
WINGHUNG CHAN

____________________

Appeal 2009-012899
Application No. 10/973,4851
Technology Center 2100
____________________

Before MURRIEL E. CRAWFORD, MARC S. HOFF, and CARLA M.
KRIVAK , Administrative Patent Judges.

HOFF, Administrative Patent Judge.

DECISION ON APPEAL

STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134 from a Final Rejection of
claims 1-21.2 We have jurisdiction under 35 U.S.C. § 6(b).

1 The real party in interest is Seagate Technology LLC.
2 The Examiner has withdrawn the § 112 rejection of claims 1, 13, and 17.
Appeal 2009-012899
Application 10/973,485

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We affirm-in-part.
Appellants’ invention concerns partition selection circuitry configured
to selectably provide individual access to multiples ones of a plurality of
partitions of a data storage component by a host device without multiple
partition support. The partition selection circuitry uses a logical block
addressing (LBA) address generated by the host device, and an operating
mode indicator indicative of a particular partition, to allow the partitions of
the data storage component to be accessed by the host device without
multiple partition support (Spec. 2).
Claim 1 is exemplary of the claims on appeal:
1. An apparatus comprising:

a data storage component configured to provide a plurality of
partitions; and

partition selection circuitry configured to selectably provide
individual access to multiple ones of the plurality of partitions of the data
storage component by a host device without multiple partition support.

The Examiner relies upon the following prior art in rejecting the
claims on appeal:
Weber US Pat. Pub. 2004/0044871 March 4, 2004
Neuman US Pat. Pub. 2005/0027978 Feb. 3, 2005

Claims 1-10 and 13-21 stand rejected under 35 U.S.C. § 102(b) as
being anticipated by Weber.
Claims 11 and 12 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Weber in view of Neuman.
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Application 10/973,485

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Throughout this decision, we make reference to the Appeal Brief
(“App. Br.,” filed Dec. 9, 2009) and the Examiner’s Answer (“Ans.,” mailed
March 6, 2009) for their respective details.
ISSUES
Appellants argue that the Examiner erred in rejecting claims 1-10 and
13-21 as being anticipated by Weber. Appellants assert that Weber contains
no teaching that host system 106 is incapable, absent the use of interface
controller 102, of accessing multiple partitions of a storage element (App.
Br. 13).
With respect to claim 2, Appellants argue that Weber does not teach
that a plurality of portions of a data storage component share the same LBA
address space (App. Br. 14).
With respect to claims 3 and 14, Appellants contend that Weber does
not teach a switch configured to selectably provide individual access to
multiple partitions as a function of a mode indicator (App. Br. 15).
With respect to claims 8 and 15, Appellants argue that Weber does not
teach an address translation engine configured to translate a partition number
and an LBA address generated by the host device into a native LBA address
(App. Br. 15).
With respect to claim 17, Appellants argue that Weber does not teach
accessing a data storage component having a plurality of partitions, using the
host device which does not support multiple partitions, as a function of the
generated LBA address and operating mode (App. Br. 15-16).
Appellants’ contentions present us with the following issues:
Appeal 2009-012899
Application 10/973,485

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1. Does Weber teach partition selection circuitry selectably providing
individual access to multiple partitions of a data storage component by a
host device which does not support multiple partitions?
2. Does Weber teach that a plurality of portions of a data storage
component share the same LBA address space?
3. Does Weber teach a switch configured to selectably provide
individual access to multiple partitions as a function of a mode indicator?
4. Does Weber teach an address translation engine configured to
translate a partition number and an LBA address generated by the host
device into a native LBA address?
5. Does Weber teach accessing a data storage component having a
plurality of partitions, using the host device which does not support multiple
partitions, as a function of the generated LBA address and operating mode?
PRINCIPLES OF LAW
“A rejection for anticipation under section 102 requires that each and
every limitation of the claimed invention be disclosed in a single prior art
reference.” See In re Buszard, 504 F.3d 1364, 1366 (Fed. Cir. 2007)
(quoting In re Paulsen, 30 F.3d 1475, 1478-79 (Fed. Cir. 1994)).
ANALYSIS
CLAIMS 1, 9, 10, 13, AND 16
We select claim 1 as representative of this group of claims, pursuant
to our authority under 37 C.F.R. § 41.37(c)(1)(vii).
We are not persuaded by Appellants’ argument, summarized supra,
that Weber lacks a teaching that the host device does not support multiple
partitions (App. Br. 13). We agree with the Examiner’s finding that Weber’s
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Application 10/973,485

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host systems 106, 108 are not able to access multiple partitions without
interface controller 102 (Ans. 8-9; Weber Fig. 1).
Appellants state in further support of their argument that Weber
teaches that the storage partitions of one or more storage elements are
mapped into merged partitions (App. Br. 13-14). We note, however, that
Figure 2 of Weber illustrates that host systems 206, 208 are not able to
access these merged partitions without the mapping, from partitions to
multiple storage devices, provided in interface controller 202.
We find that the Examiner did not err in rejecting claims 1, 9, 10, 13,
and 16 under § 102. We will sustain the Examiner’s rejections.
CLAIMS 2-8, 14, 15, AND 17-21
We do not agree with the Examiner’s finding that Weber teaches all
the limitations of claims 2-8, 14, 15, and 17-21. In particular, we do not
agree with the Examiner’s finding that Weber (¶ [0033]) teaches the LBA
features recited in the dependent claims (see Ans. 9-12). We agree with
Appellants that Weber does not teach (a) a plurality of portions of a data
storage component sharing the same LBA address space; (b) a switch
configured to selectable provide individual access to multiple partitions as a
function of a mode indicator; (c) an address translation engine configured to
translate a partition number and an LBA address generated by the host
device into a native LBA address; or (d) accessing a data storage component
having a plurality of partitions, using the host device which does not support
multiple partitions, as a function of the generated LBA address and
operating mode (see App. Br. 14-16).
We find that the Examiner erred in rejecting claims 2-8, 14, 15, and
17-21 under § 102. We will not sustain the rejection.
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Application 10/973,485

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CLAIMS 11 AND 12
Appellants’ sole argument with respect to these claims is that
Neuman does not cure the deficiencies of Weber (App. Br. 16). Because
we find that the Examiner did not err in rejecting independent claim 1 as
being anticipated by Weber, we also find that the Examiner did not err in
rejecting dependent claims 11 and 12 under § 103 as being unpatentable
over Weber in view of Neuman, for the same reasons. We will sustain the
Examiner’s rejection.

CONCLUSIONS
1. Weber teaches partition selection circuitry selectably providing
individual access to multiple partitions of a data storage component by a
host device which does not support multiple partitions.
2. Weber does not teach that a plurality of portions of a data storage
component share the same LBA address space.
3. Weber does not teach a switch configured to selectable provide
individual access to multiple partitions as a function of a mode indicator.
4. Weber does not teach an address translation engine configured to
translate a partition number and an LBA address generated by the host
device into a native LBA address.
5. Weber does not teach accessing a data storage component having a
plurality of partitions, using the host device which does not support multiple
partitions, as a function of the generated LBA address and operating mode.
ORDER
The Examiner’s rejection of claims 1, 9-13, and 16 is affirmed.
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Application 10/973,485

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The Examiner’s rejection of claims 2-8, 14, 15, and 17-21 is
reversed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).
AFFIRMED-IN-PART

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