Ex Parte Cheng et al

Patent Trial and Appeal Board

Oct 11, 2016

13278621 (P.T.A.B. Oct. 11, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/278,621 10/21/2011
43859 7590 10/13/2016
SLATER MATSIL, LLP
17950 PRESTON ROAD, SUITE 1000
DALLAS, TX 75252
FIRST NAMED INVENTOR
Ming-Da CHENG
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TSMP20110930USOO 2553
EXAMINER
ESKRIDGE, CORYW
ART UNIT PAPER NUMBER
2898
NOTIFICATION DATE DELIVERY MODE
10/13/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
docketing@slatermatsil.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MING-DA CHENG, KUEI-WEI HUANG,
YU-PENG TSAI, CHENG-TING CHEN, HSIU-JEN LIN,
and CHUNG-SHI LIU
Appeal2015-003781
Application 13/278,621
Technology Center 2800
Before TERRY J. OWENS, BEYERL YA. FRANKLIN, and
JULIA HEANEY, Administrative Patent Judges.
OWENS, Administrative Patent Judge.
DECISION ON APPEAL
STATEMENT OF THE CASE
The Appellants appeal under 35 U.S.C. § 134(a) from the Examiner's
rejection of claims 1-16 and 21-24. We have jurisdiction under
35 U.S.C. § 6(b).
The Invention
The Appellants claim a semiconductor package and device. Claim 1
is illustrative:
1. A semiconductor package, comprising:
a workpiece comprising a conductive trace; and
a chip comprising a bump structure,
Appeal2015-003781
Application 13/278,621
wherein the chip is attached to the workpiece and the
bump structure is electrically connected to the conductive
trace to form a bump-on-trace (BOT) interconnect structure;
and
wherein the BOT interconnect structure comprises a
solder region, wherein the solder region covers a portion of
sidewalls of the conductive trace, and a silver (Ag) content in
the solder region is not greater than 1.8 weight percent.
Mis
Lee
Alley
Pendse
The References
US 2006/0030139 Al
US 7 ,208,834 B2
US 2009/0072385 Al
US 2010/0193947 Al
The Rejections
Feb.9,2006
Apr. 24, 2007
Mar. 19, 2009
Aug. 5, 2010
The claims stand rejected under 35 U.S.C. § 103 as follows: claims 1-
16 and 21-24 over Lee in view of Mis and Pendse, claim 8 over Lee in view
of Mis, Pendse and Alley, claims 1-16, 21, 23, and 24 over Alley in view of
Mis and Pendse and claims 5, 14, 22, and 23 over Alley in view of Mis,
Pendse and Lee.
OPINION
We affirm the rejections.
The Appellants argue the claims as a group (App. Br. 7-15).
Although some claims are addressed under separate headings, the Appellants
do not provide a substantive argument as to the separate patentability of
those claims (App. Br. 9-10, 13-14). We therefore limit our discussion to
one claim, i.e., claim 1. Claims 2-16 and 21-24 stand or fall with that
claim. See 37 C.F.R. § 37 C.F.R. § 41.37(c)(l)(iv) (2012).
Lee discloses a flip chip semiconductor package comprising a
chip ( 510) having a bump structure (cylindrical bonding structure 514
2
Appeal2015-003781
Application 13/278,621
including ball contact metallic layer 514a, conductive pillar 514b and solder
cap 514c) electrically connected to a conductive pad (522) on a
substrate (520) (col. 8, 11. 57----67; col. 9, 11. 19-24; Fig. 5C). "Compared
with a conventional design using spherical bumps, the cylindrical bonding
structure can provide a smaller contact separation" (col. 10, 11. 34--36).
"[W]hen the solder cap [514c] has a cylindrical shape, the length and outer
diameter of the pillar may be adjusted to fit into the opening leading to the
pad [522]. Consequently, outer diameter of the opening may be reduced and
separation between neighboring pads may be reduced" (col. 10, 11. 41--43).
Alley discloses a flip chip semiconductor package comprising a
chip (405) having a bump structure (solder 209, thermoelectric element 203,
copper pillar 211 and solder 215) electrically connected to a copper
trace (217) on a substrate ( 419) (i-f 50; Fig. 4 ). The copper pillar (211) is
used with the solder (215) to "increase a height/thickness of a metal
interconnection while reducing a width (e.g., providing reduced pitch)
and/or reducing a solder volume used" (i-f 104).
Pendse discloses that in prior art flip chip semiconductor packages
"traces are nominally 30 µm wide, and they can be spaced as close together
as 30 µm" (i-f 38) and "[t ]he width of capture pads (or diameter, for circular
pads) is typically about the same as the ball (or bump) diameter, and can be
as much as two to four times wider than the trace width. This results in
considerable loss of routing space on the top substrate layer" (i-f 36). Pendse
uses bump-on-narrow pad interconnects which "can equal the finest trace
pitch offered by the substrate technology" (i-f 43) and can provide "a routing
density which is approximately 90% higher than is achieved in a
conventional bump-on-capture pad arrangement" (id.). Pendse's "narrow
3
Appeal2015-003781
Application 13/278,621
interconnection pad has a nominal or design width at least about 120% of the
nominal or trace design rule width" (i-f 46), and a bump-on-narrow-pad
interconnection "includes bumps connected to widened parts of traces that
are greater than about 120% of the nominal or trace design rule width, and
less than the bump base diameter" (id.), whereas "an interconnection site
that has a width less than about 120% does not constitute a narrow
interconnect pad, and interconnection made by connecting bumps onto
portions of leads that are less than about 120% of the nominal or trace
design rule width is referred to as a 'bump-on-lead' interconnection" (id.).
Regarding the benefit of bump-on-narrow-pad interconnects, Pendse states
(i-f 49):
[A] s the techniques for forming the traces improves, it is
possible to reliably form traces having nominal or design rule
widths less than about 25 µm. The reduced trace widths can
provide for increased routing density. However, the mechanical
reliability of a "bump-on-lead" flip chip interconnect on leads
less than about 25 µm may be unsatisfactory, because the
dimensions of the interface between the bump and the lead are
small, and may not provide sufficient bonding strength to
provide a good electrical interconnection. The invention
provides for reliable mechanical connection (and good
electrical interconnection) by forming a narrow interconnect
pad by widening the lead to an extent dimensionally related to
the bump base diameter, and limited to less than the bump base
diameter.
The Appellants argue that one of ordinary skill in the art would
not have made the opening in Lee's solder mask (524; Fig. 5C) large
enough for solder (514c) to cover a portion of the pad (522)'s
sidewalls because doing so would increase the minimum distance
4
Appeal2015-003781
Application 13/278,621
between neighboring pads (522) whereas Lee desires reduced
separation between pads (App. Br. 8-9).
Lee does not indicate that the pad (522) is anything other than a
conventional pad (col. 8, 11. 65----67; col. 9, 11. 19-24). Although
Pendse' s interconnect has solder ( 65) on the narrow pad ( 66)' s top
and sides (Fig. 7), the narrow pad ( 66) is narrower than a conventional
pad (i.e., as narrow as 120% of the trace design rule width (which can
be one half to one fourth the width of a typical capture pad)) (i-fi-f 36,
41, 46, 4 7) such that Pendse' s interconnect appears to be narrower
than Lee's interconnect. One of ordinary skill in the art, through no
more than ordinary creativity, would have replaced Lee's interconnect
having a pad (522) with solder (514c) only on its top (Fig. 5C) with
Pendse's interconnect having a narrow pad (66) with solder (65) on its
top and sides (Fig. 7) to obtain the benefits of doing so indicated by
Pendse, i.e., the finest trace pitch offered by the substrate technology
(e.g., a routing density approximately 90% higher than that of a
conventional bump-on-capture pad interconnect), reliable mechanical
connection and good electrical connection (i-fi-f 43, 46, 47, 49). See
KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007) (in making an
obviousness determination one "can take account of the inferences
and creative steps that a person of ordinary skill in the art would
employ").
The Appellants argue that one of ordinary skill in the art would
not have covered a portion of the sidewalls of Alley's trace (217) with
solder (215) because doing so would increase the volume and width of
5
Appeal2015-003781
Application 13/278,621
the solder, contrary to Alley's goal of decreasing the solder's volume
and width (App. Br. 12).
Pendse's narrow pad's width is at least 120% of the trace
design rule width such that Pendse' s solder on the side of the narrow
pad is wider than the trace design rule width (i-fi-f 46, 4 7; Fig. 7).
However, Pendse indicates that because the narrow pad is at least 20%
wider than the trace design rule width and has solder on its sides, the
solder's bond strength is increased such that the trace can be narrower
(e.g., less than about 25 µm vs. 30 µm (i-fi-f 38, 49)). Hence, Pendse
would have led one of ordinary skill in the art, through no more than
ordinary creativity, to use Pendse's narrow pad/solder interconnect in
Alley's semiconductor package so that reliable mechanical connection
and good electrical connection are achievable with a narrower trace
(i-f 49). See KSR, 550 U.S. at 418.
For the above reasons we are not persuaded of reversible error in the
rejections.
DECISION/ORDER
The rejections under 3 5 U.S. C. § 103 of claims 1-16 and 21-24 over
Lee in view of Mis and Pendse, claim 8 over Lee in view of Mis, Pendse and
Alley, claims 1-16, 21, 23, and 24 over Alley in view of Mis and Pendse and
claims 5, 14, 22, and 23 over Alley in view of Mis, Pendse and Lee are
affirmed.
It is ordered that the Examiner's decision is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).
AFFIRMED
6