Ex Parte Chen et al

Patent Trial and Appeal Board

Sep 29, 2016

13452516 (P.T.A.B. Sep. 29, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE
13/452,516 04/20/2012
43859 7590 10/03/2016
SLATER MATSIL, LLP
17950 PRESTON ROAD, SUITE 1000
DALLAS, TX 75252
FIRST NAMED INVENTOR
Ryan Chia-Jen Chen
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
TSMll-1556 9453
EXAMINER
GONDARENKO, NATALIA A
ART UNIT PAPER NUMBER
2891
NOTIFICATION DATE DELIVERY MODE
10/03/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
docketing@slatermatsil.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte RYAN CHIA-JEN CHEN, YIH-ANN LIN, CHIA TAI LIN, and
CHAO-CHENG CHEN
Appeal2015---002885
Application 13/452,516
Technology Center 2800
Before BEYERL YA. FRANKLIN, MONTE T. SQUIRE, and
BRIAND. RANGE, Administrative Patent Judges.
FRANKLIN, Administrative Patent Judge.
DECISION ON APPEAL
Appellants request our review under 35 U.S.C. § 134 of the
Examiner's decision rejecting claims 1, 3, 4, and 9--14. We have jurisdiction
over the appeal under 35 U.S.C. § 6(b ).
Appeal2015-002885
Application 13/452,516
STATEMENT OF THE CASE
Claim 1 is illustrative of Appellants' subject matter on appeal and is
set forth below:
1. A device comprising:
a semiconductor substrate;
a plurality of semiconductor fins parallel to each other, wherein the
plurality of semiconductor fins is a portion of the semiconductor substrate;
a Shallow Trench Isolation (STI) region on a side of the plurality of
semiconductor fins, wherein the STI region comprises a top surface and a
non-flat bottom surface, and wherein the plurality of semiconductor fins is
over the top surface of the STI region;
a plurality of STI regions in the semiconductor substrate;
a plurality of fin extensions underlying and aligned to the plurality of
semiconductor fins, wherein sidewalls of the plurality of fin extensions are
in contact with sidewalls of the plurality of STI regions; and
a fin extension residue having a bottom substantially level with
bottom surfaces of the plurality of fin extensions, wherein the fin extension
residue extends into the STI region from a bottom surface of the STI region.
The Examiner relies on the following prior art references as evidence
of unpatentability:
Yamagami et al., US 7,719,043 B2 May 18, 2010
(hereafter "Y amagami")
THE REJECTION
Claims 1, 3, 4, and 9--14 have been rejected under 35 U.S.C. § 103(a)
as being unpatentable over Y amagami.
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Appeal2015-002885
Application 13/452,516
ANALYSIS
We reverse the rejection based upon Appellants' arguments as set
forth in the record. We add the following for emphasis.
The Examiner's proposed modification of Y amagami is to extend the
bottom of the isolation region 612 upwardly, as discussed by the Examiner
on pages 3-5 of the Answer, and as depicted in the modified Figure 59 of
Yamagami (set forth on page 4 of the Answer). This modified Figure 59 of
Y amagami is reproduced below:
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M2~~J'~<;::''"' ,,~;:M:· ' , r;,,, . 1 . '""
r·;,~'\'~•~• .. ~·~j .,/~:;;;!\,~;,~,,,~~ii ~~~t~~~~~;;,~~;~~:~~;;;1-~~~;,~~;;~~~:=~;~~f~il~ii;\::~i~~~i~~~\rt~Klo~'~$'
2fre· ~>·)~:~ b~i· ·rn't-ct~h~'i F~·~:~.D·t·:~· S~ ·of \<~~~1).:ag8t~1~ ~~·n(" r~t-i '$~~->an~'bt}t) ::"~~~~¢:{'::$
t.l1 .. 3} (l~~t~}.:;tg·~~r~s,~ .. (:ot. 3·~~ ~~n€~~~ ~~~l--~33:).
Modified Figure 59 of Y amagami
Appellants persuasively explain that, as shown in Figures 54(a), 55(a),
56(a), and 57(a) ofYamagami (which Appellants reproduce on pages 6-7 of
the Reply Brief), the deep trench, which is formed in Figure 56(a), is formed
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Appeal2015-002885
Application 13/452,516
by a separate lithography and etching process so that the deep trench may be
deeper than the shallow trench. Reply Br. 8. Appellants explain that as a
result, in the resulting structure, both deep trench and shallow trench co-
exist. Appellants argue that according to the Examiner's suggestion (as
shown in the above-reproduced Modified Figure 59 of Yamagami), there is
no longer the need to form the deep trench. Accordingly, Appellants argue
that the process steps shown in Figures 55(a) and 56(a) will not be
performed, and the structure shown in Figure 55(a) will be used to form
FinFETs. Id.
Appellants explain that since Figure 61 of Y amagami illustrates the
resulting FinFETs, Appellants reproduced Figure 61 of Yamagami, and
modified a part of the structure in Figure 61 of Yamagami, according to
Examiner's suggestion, to help demonstrate how the Examiner's proposed
modification goes against the objectives of Yamagami. This modification is
on page 9 of the Reply Brief. Appellants explain that Y amagami discloses
that deep trench causes the density of FinFETs to be low, and that shallow
trench causes the parasitic capacitances to be high, both being undesirable.
Appellants further explain that, if the Examiner's suggested modification is
made to the structure in Figure 61 of Y amagami, the structure is essentially
brought back to the structure in Figure 3c of Yamagami, and the high
capacitance C 1 and C2 will be exactly what Y amagami wants to avoid.
Reply Br. 10-11. We agree with Appellants' arguments.
In view of the above, we are persuaded of reversible error in the
Examiner's rejection because "if the proposed modification would render the
prior art invention being modified unsatisfactory for its intended purpose,
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Appeal2015-002885
Application 13/452,516
then there is no suggestion or motivation to make the proposed
modification." In re Gordon, 733 F.2d 900, 902 (Fed. Cir. 1984).
DECISION/ORDER
The Examiner's rejection of claims 1, 3, 4, and 9-14 is reversed.
REVERSED
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