Ex Parte Chen

Patent Trial and Appeal Board

Oct 18, 2016

13786044 (P.T.A.B. Oct. 18, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
13/786,044 03/05/2013 Bo-Ting CHEN
95496 7590 10/20/2016
Hauptman Ham, LLP (TSMC)
2318 Mill Road
Suite 1400
Alexandria, VA 22314
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
T5057-Kl39UA 9086
EXAMINER
ALMO, KHAREEM E
ART UNIT PAPER NUMBER
2842
NOTIFICATION DATE DELIVERY MODE
10/20/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address( es):
tsmc@ipfirm.com
sramunto@ipfirm.com
pair_lhhb@firsttofile.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte BO-TING CHEN1
Appeal2015-003327
Application 13/786,044
Technology Center 2800
Before N. WHITNEY WILSON, CHRISTOPHER C. KENNEDY, and
JENNIFER R. GUPTA, Administrative Patent Judges.
KENNEDY, Administrative Patent Judge.
DECISION ON APPEAL
This is an appeal under 35 U.S.C. § 134(a) from the Examiner's
decision to reject claims 1-5, 7-15, and 21. We have jurisdiction under
35 U.S.C. § 6(b).
We REVERSE.
BACKGROUND
The subject matter on appeal relates to level shifters and integrated
circuits comprising level shifters. E.g., Spec. i-f 2; Claim 1. Claim 1 is
reproduced below from page 18 (Claims Appendix) of the Appeal Brief:
1 According to the Appellant, the real party in interest is TAIWAN
SEMICONDUCTOR MANUFACTURING COMP ANY. App. Br. 2.
Appeal2015-003327
Application 13/786,044
1. An integrated circuit comprising:
a first level shifter configured to receive a first input signal and a
first power supply signal, the first level shifter configured to
output a first output signal;
a first inverter configured to receive the first output signal from
the first level shifter, the first inverter configured to output a first
inverter signal;
a second level shifter configured to receive a second input signal
and a second power supply signal, the second level shifter
configured to output a second output signal, wherein a voltage
level of the second power supply signal is different from a
voltage level of the first power supply signal;
a second inverter configured to receive the second output signal
from the second level shifter, the second inverter configured to
output a second inverter signal; and
an output buffer configured to receive the first inverter signal and
the second inverter signal, the output buffer configured to output
a buff er output signal.
Claims 1-5, 7-15, and 21 stand rejected under 35 U.S.C. § 102(b) as
anticipated by Sanchez et al. (US 2007/0008001 A 1, published Jan. 11,
2007). 2 The Appellant presents arguments for claims 1 and 9. We limit our
discussion to those claims.
2 The Examiner indicates that claim 6 is covered by the rejection. E.g.,
Ans. 2. The Appellant explains, however, that claim 6 was omitted in the
originally filed application and has now been listed as "canceled." E.g.,
Office Action Response dated September 20, 2013, at 8; see also App. Br.
19 (Claims Appendix) (listing claim 6 as "[ c ]anceled"). Therefore, claim 6
is not subject to the rejection and is not before us in this appeal.
2
Appeal2015-003327
Application 13/786,044
Claim 1.
In rejecting claim 1, the Examiner relies principally on Figures 1 and
3 of Sanchez, which are reproduced below:
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