Ex Parte Carr

Board of Patent Appeals and Interferences

Sep 11, 2009

10141197 (B.P.A.I. Sep. 11, 2009)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte JEFFREY DOUGLAS CARR
____________

Appeal 2009-000235
Application 10/141,197
Technology Center 2400
____________

Decided: September 11, 2009
____________

Before HOWARD B. BLANKENSHIP, ST. JOHN COURTENAY III, and
STEPHEN C. SIU, Administrative Patent Judges.

BLANKENSHIP, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE
This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1-20 and 22-28, which are all of the pending claims in
this application. We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
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Invention
Appellant’s invention relates to systems and methods that may
configure features or functions of a device, such as a set top box, for
example, using a chip. The chip may include a processor and a memory
array. The memory array may include a non-volatile memory and may be in
communications with the processor. The non-volatile memory may include
a set of mode control bits, each mode control bit being one-time
programmable. The device features may be securely programmed via the set
of mode control bits of the non-volatile memory that may be programmed
during a programming cycle and may not be modified further after the
completion of the programming cycle. Abstract.

Representative Claims
18. A system for configuring functions of a device using an
on-chip one-time programmable non-volatile memory, the non-
volatile memory comprising:
a set of mode control bits whose bit values correspond to a
particular configuration of the device functions, the set of mode
control bits being one-time programmable during a programming
cycle.

27. The method according to claim 20, wherein the device is
a set top box.

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Prior Art
Weiss 5,390,317 Feb. 14, 1995
Vainsencher 6,240,516 B1 May 29, 2001
Trimberger 7,058,177 B1 Jun. 6, 2006

Examiner’s Rejections
Claims 18-20 and 22-26 stand rejected under 35 U.S.C. § 102(b) as
being anticipated by Weiss.
Claims 1-16 and 28 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Weiss and Trimberger.
Claims 17 and 27 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Weiss, Trimberger and Vainsencher.

Claim Groupings
Based on Appellant’s arguments in the Appeal Brief, we will decide
the appeal on the basis of claims 18 and 27. See 37 C.F.R.
§ 41.37(c)(1)(vii).

ISSUES
(1) Has Appellant shown that Weiss does not disclose a set of
mode control bits whose bit values correspond to a particular configuration
of the device functions as recited in claim 18?
(2) Has Appellant shown that the combination of Weiss,
Trimberger, and Vainsencher does not teach determining programmed
configurations of the set top box as recited in claim 27?

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FINDINGS OF FACT
Weiss
1. Weiss teaches a technique to support progressively
programmable nonvolatile memory. Title.
2. Some applications require nonvolatile memory that can be
reprogrammed a limited number of times. An example of such an
application is an automobile engine controller that uses nonvolatile memory
to store calibration constants that might need to be changed several times
over the lifetime of the automobile. Col. 1, ll. 20-30.
3. Referring to Figures 2A-2D, four block diagrams illustrate four
methods by which nonvolatile memory 28 can be partitioned into sections.
Option A of Figure 2A partitions nonvolatile memory 28 into eight sections
where each section contains one byte. Option A allows the user to
effectively program the same one byte of nonvolatile data at address location
$0 up to eight times. Although the user is actually programming different
bytes in nonvolatile memory 28, it appears to the user that he is
reprogramming the same byte of memory at location $0 in his software
program. The nonvolatile control 24 keeps track of which byte contains the
current information and which bytes have not yet been used. Option B
partitions nonvolatile memory 28 into four sections where each section
contains two bytes. Option B of Figure 2B allows the user to effectively
program two byte of nonvolatile data at address locations $0 and $1 up to
four times. Option C of Figure 2C partitions nonvolatile memory 28 into
two sections where each section contains four bytes. Option C allows the
user to effectively program four bytes of nonvolatile data at address
locations $0-$3 twice. Option D of Figure 2D leaves nonvolatile memory 28
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as one entire block containing eight bytes. Option D only allows the user to
program the memory once at address locations $0-$7. Option D is the
typical way in which most existing nonvolatile memory arrays are accessed.
Figs. 2A-2D; col. 4, l. 61 to col. 5, l. 19.
4. The user selects which option he wants by way of a mask
option metal layer during manufacturing. Col. 5, ll. 20-21.
5. Weiss discloses an alternative embodiment in which nonvolatile
memory stores a value that determines the number of sections into which
the memory is to be functionally divided. The value could be programmed
into any type of nonvolatile memory, including ROM, EPROM, one time
programmable memory, or EEPROM. Col. 4, ll. 45-55.

Vainsencher
6. Vainsencher discloses a highly integrated, single chip computer
system having not only a central processing unit (CPU) but also specialized
coprocessors. The improved security offered by the single chip computer
system enables program code or data stored external to the single chip
computer system to be encrypted so as to hinder unauthorized access, while
internal to the single computer system the program code or data is decrypted.
The single chip computer system is particularly suitable for video game
consoles having high quality graphics and/or video, digital video disk
(DVD) players, and set-top boxes. Col. 2, ll. 23-45; col. 4, ll. 33-52.
7. Since all the external transmissions of the program code or data
are in an encrypted form, unauthorized third parties are unable to copy the
program code or data without knowing the private encryption key stored in
the code ROM. Col. 6, ll. 56-61.
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8. The computer system boots up using computer code stored in
the internal code ROM. Col. 7, ll. 26-27.

Appellant’s Specification
9. Fig. 1 shows an example of a device 100 including a chip 110
according to the present invention. The chip 110 may include a processor
120, a memory array 130 and a chip interface 140. The memory array 130
may include a non-volatile memory such as, for example, a one-time
programmable non-volatile memory. In one embodiment, the device 100 is
a set top box. Fig. 1; ¶ [0015].
10. Other features and functions of the device 100 that may be
configured via the mode control bits include, for example, display, sound, or
authentication configurations. The described features and functions of the
device 100 are not intended to be exhaustive and may be dependent upon the
choice of the device 100. Accordingly, one of ordinary skill in the art can
determine additional features and functions of the device 100 (e.g., a set top
box) that can be configured by the control mode bits without undue
experimentation. ¶ [0025].

PRINCIPLES OF LAW
Claim Interpretation
During examination, claims are to be given their broadest reasonable
interpretation consistent with the specification, and the language should be
read in light of the specification as it would be interpreted by one of ordinary
skill in the art. In re Amer. Acad. of Sci. Tech Ctr., 367 F.3d 1359, 1364
(Fed. Cir. 2004) (citations omitted). The Office must apply the broadest
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reasonable meaning to the claim language, taking into account any
definitions presented in the specification. Id. (citing In re Bass, 314 F.3d
575, 577 (Fed. Cir. 2002)).

Anticipation
“A claim is anticipated only if each and every element as set forth in
the claim is found, either expressly or inherently described, in a single prior
art reference.” Verdegaal Bros. Inc. v. Union Oil Co. of California, 814
F.2d 628, 631 (Fed. Cir. 1987).

Obviousness
The question of obviousness is resolved on the basis of underlying
factual determinations including (1) the scope and content of the prior art,
(2) any differences between the claimed subject matter and the prior art, and
(3) the level of skill in the art. Graham v. John Deere Co., 383 U.S. 1, 17
(1966). “The combination of familiar elements according to known methods
is likely to be obvious when it does no more than yield predictable results.”
KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 416 (2007).

ANALYSIS
Section 102 rejection of claims 18-20 and 22-26
Appellant contends that Weiss does not disclose “a set of mode
control bits whose bit values correspond to a particular configuration of the
device functions” as recited in claim 18 (App. Br. 4-6; Reply Br. 2-4). In
particular, Appellant contends that Weiss discloses selecting one of four
options, A through D, of partitioning a memory into sections by way of a
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mask option metal layer during manufacturing. Therefore, “the values of
control bits 20 do not correspond to the selection of one and only one of
OPTIONS A, B, C and D. Whether the data processor performs OPTION A,
B, C or D is independent of the control bits 20.” App. Br. 5.
Weiss discloses selecting one of four options for partitioning a
memory into sections (FF 3). One embodiment of selecting an option for
partitioning the memory is by way of a mask option metal layer (FF 4).
However, Weiss discloses another embodiment for selecting an option, by
storing a value in a one time programmable memory (FF 5). In other words,
the value stored in the one time programmable memory is expressed in bits
“whose bit values correspond to a particular configuration of the device
functions.” Therefore, Weiss discloses “a set of mode control bits whose bit
values correspond to a particular configuration of the device functions” as
recited in claim 18.
Appellant does not submit separate arguments for claims 19, 20, and
22-26, but relies on the arguments made with respect to claim 18 (App. Br.
6).

Section 103(a) rejection of claims 1-16 and 28
Appellant does not submit separate arguments for claims 1-16 and 28
but relies on the arguments made with respect to claim 18 (App. Br. 8-9).

Section 103(a) rejection of claims 17 and 27
Appellant reiterates the contention presented for claim 18 that the
control bits of Weiss do not configure OPTIONS A-D of memory 28.
Appellant further contends that Vainsencher merely mentions a set top box
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but does not teach determining configurations of the set top box by reading
control bits. App. Br. 8.
Appellant has not provided a definition for the term “configurations”
that excludes options for configuring partitions of a nonvolatile memory
contained within the set top box (FF 9-10). An option for configuring
partitions of the nonvolatile memory of Weiss can be determined by a value
stored in a one time programmable memory (FF 3, 5). When the nonvolatile
memory of Weiss is contained within the set top box of Vainsecher, the
several options for configuring the nonvolatile memory are “configurations”
of the set top box within the meaning of claim 27.
Appellant raises a new argument in the Reply Brief that the high
performance processor of Vainsencher teaches away from using the cheap
and inefficient memory of Weiss in place of the high performance RAM
used by Vainsencher (Reply Br. 5-7). Such an argument could have been
raised in the Appeal Brief and is therefore untimely.
Even so, the memory of Weiss is a nonvolatile ROM memory (FF 1,
5) which could be used in place of the ROM memory disclosed by
Vainsencher (FF 7-8). Appellant has not provided any evidence to show that
a high performance, expensive ROM memory is required by the device of
Vainsencher to perform the functions of storing an encryption key (FF 7) or
storing boot up code (FF 8).
Furthermore, according to Appellant, one of ordinary skill in the art
can determine additional features and functions of the set top box that can be
configured by the control mode bits without undue experimentation (FF 10).
Therefore, one of ordinary skill in the art can determine additional features
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and functions of the set top box of Vainsencher that can be configured by the
control mode bits of Weiss without undue experimentation.

CONCLUSIONS OF LAW
(1) Appellant has not shown that Weiss does not disclose a set of
mode control bits whose bit values correspond to a particular configuration
of the device functions as recited in claim 18.
(2) Appellant has not shown that the combination of Weiss,
Trimberger, and Vainsencher does not teach determining programmed
configurations of the set top box as recited in claim 27.

DECISION
The rejection of claims 18-20 and 22-26 under 35 U.S.C. § 102(b) as
being anticipated by Weiss is affirmed.
The rejection of claims 1-16 and 28 under 35 U.S.C. § 103(a) as being
unpatentable over Weiss and Trimberger is affirmed.
The rejection of claims 17 and 27 under 35 U.S.C. § 103(a) as being
unpatentable over Weiss, Trimberger and Vainsencher is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a).

AFFIRMED

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