Ex Parte Camacho et alDownload PDFBoard of Patent Appeals and InterferencesJun 7, 201011307128 (B.P.A.I. Jun. 7, 2010) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________ Ex parte ZIGMUND RAMIREZ CAMACHO, HENRY D. BATHAN, ARNEL TRASPORTO and JEFFREY D. PUNZALAN ____________ Appeal 2009-007820 Application 11/307,1281 Technology Center 2800 ____________ Decided: June 8, 2010 ____________ Before ROBERT E. NAPPI, SCOTT R. BOALICK, and MARC S. HOFF, Administrative Patent Judges. BOALICK, Administrative Patent Judge. DECISION ON APPEAL 1 The real party in interest is STATS ChipPAC Ltd. Appeal 2009-007820 Application 11/307,128 2 This is an appeal under 35 U.S.C. § 134(a) from the final rejection of claims 1-10. Claims 11-20 have been withdrawn. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. STATEMENT OF THE CASE Appellants’ invention relates to an integrated circuit package system manufactured by forming a lead tip hole in a lead finger, mounting an integrated circuit die having a solder bump on the lead finger and reflowing the solder bump on the lead tip hole of the lead finger. (Abstract.) Claim 1 is exemplary: 1. An integrated circuit package system comprising: forming a lead finger; forming a lead tip hole through the lead finger; mounting an integrated circuit die having a solder bump on the lead finger; and reflowing the solder bump on the lead tip hole of the lead finger. Claims 1-8 and 10 stand rejected under 35 U.S.C. § 103(a) as being obvious over Lee (U.S. Patent Application Publication 2004/0089879 A1) and Lin (U.S. Patent 6,440,835 B1). Claim 9 stands rejected under 35 U.S.C. § 103(a) as being obvious over Lee, Lin and Shiu (U.S. Patent Application Publication 2005/0156291 A1). ISSUES First, Appellants argue that the Examiner improperly combined Lee and Lin “because Lee teaches a flip chip package . . . and Lin teaches away from the Lin invention being used with flip chip technology.” (App. Br. 12.) Appeal 2009-007820 Application 11/307,128 3 Second, with respect to independent claim 1, Appellants argue that the combination of Lee and Lin does not teach or suggest “forming a lead tip hole through the lead finger.” (App. Br. 14.) In particular, Appellants argue that “Lin does not teach or suggest deepening a hole [i.e., the second concavity 312a of Lee] but instead Lin teaches depositing a trace 42 [sic, 32] having a through-hole 44.” (App. Br. 14.) Appellants also argue that “Lin cannot use a flip-chip bump for electrical conductivity because in Lin a bump is not placed on a lead finger, the flip-chip is not placed on a bump, and the lead finger and flip-chip are not bonded by reflow soldering.” (App. Br. 14.) Independent claim 6 recites similar limitations. Appellants’ arguments present the following dispositive issues: 1. Has the Examiner erred by improperly combining Lee and Lin? 2. Has the Examiner erred in finding that the combination of Lee and Lin teaches or suggests “forming a lead tip hole through the lead finger”? FINDINGS OF FACT The record supports the following findings of fact (FF) by a preponderance of the evidence. Lee 1. Lee “relates to a flip chip package.” (¶ [0002].) In one embodiment, a flip chip package includes a lead frame 31, a chip 32 and a plurality of bumps 33. (¶ [0025]; fig. 3.) The bumps 33 include first bumps 331 and second bumps 332. (¶ [0025].) The lead frame 31 has a plurality of leads 312 with a second concavity 312a. (¶ [0025].) The active surface 321 of the chip 32 is electrically connected to the lead frame 31 with the bumps 33 (¶ [0025]) using a reflow process Appeal 2009-007820 Application 11/307,128 4 (¶ [0026]). The second bumps 332 reside in the second concavities 312a to more securely attach the chip 32 to the lead frame 31. (¶ [0028].) Lin 2. Lin “relates to a semiconductor chip assembly, and more particularly to a method of mechanically and electrically connecting a conductive trace to a semiconductor chip.” (Col. 1, ll. 7-10.) Lin describes techniques for connecting semiconductor chips to external circuits (col. 1, ll. 13-15) including wire bonding, tape automated bonding and flip-chip bonding, all of which are widely used (col. 1, ll. 17-20). Lin further describes that although flip-chip bonding has “tremendous advantages” over the other two techniques, some cost and technical limitations include: the significant cost of forming bumps on pads; the increased complexity of underfilling an adhesive between the chip and support circuit to avoid thermal mismatch; the formation of cracks and voids in the solder joint; and environmental concerns over lead- based solders. (Col. 2, ll. 6-18.) 3. In one embodiment, a conductive trace 32 (i.e., a metallic layer (col. 11, ll. 58-61) formed by electroplating (col. 5, ll. 12-13)) is attached to an adhesive 46 and electrically connected to a conductive pad 16 on a semiconductor chip 10. (Col. 3, ll. 5-13; fig. 1k.) A through-hole 44 is formed through the conductive trace 32 and the adhesive 46. (Col. 6, ll. 54-57; fig. 1j.) A wire ball 62 enters the through-hole 44 and contacts the conductive trace 32 and the pad 16 (col. 7, ll. 53-56; fig. 4b) such that the wire ball 62 fills the through- Appeal 2009-007820 Application 11/307,128 5 hole 44 and deforms into a mushroom-shaped ball bond 70 (col. 7, l. 66 to col. 8, l. 2; fig. 4c). Lin further describes that this process is flexible enough to accommodate the flip-chip bonding technique. (Col. 15, ll. 47-51.) ANALYSIS Claims 1-8 and 10 We are not convinced by Appellants’ arguments (App. Br. 11-14; see also Reply Br. 3-6) that the combination of Lee and Lin does not teach or suggest “forming a lead tip hole through the lead finger” and that Lin has been improperly combined with Lee. The Examiner found that Lee teaches or suggests all the limitations of claim 1 (Ans. 3; FF 1) except “forming a lead tip hole through the lead finger” (Ans. 3). The Examiner cited to Lin for the disclosure of a ball bond 70 that fills a through-hole 44 in a conductive trace 32 and an adhesive 46. (Ans. 3-4.) The Examiner found that it would have been obvious “to have modified the hole taught by Lee to have a hole through the finger to provide a low cost highly reliable connection as taught by Lin.” (Ans. 4.) We agree with the Examiner. Lee relates to flip chip packages including electrically connecting a chip 32 to a plurality of leads 312 using second bumps 332. (FF 1.) Lin relates to a semiconductor chip assembly including bonding a conductive trace 32 (i.e., a metallic layer formed by electroplating) and an adhesive 46 to a semiconductor chip 10. (FF 3.) Lin teaches that a ball bond 70 fills a through-hole 44 formed through the conductive trace 32 and the Appeal 2009-007820 Application 11/307,128 6 adhesive 46, bonding the conductive trace 32 and the adhesive 46 to the semiconductor chip 10. (FF 3.) Combining Lee and Lin is no more than the simple substitution of Lin’s known method of bonding the conductive trace 32 and the adhesive 46 to the semiconductor chip 10 (i.e., filling the through-hole 44 with the ball bond 70) for Lee’s known method of electrically connecting the lead frame 31 to the chip 32 with a plurality of bumps 33, with no unexpected results. See KSR Int’l Co. v. Teleflex, Inc., 550 U.S. 398, 417 (2007). Appellants have not presented any convincing arguments or evidence that the Examiner erred in combining Lee and Lin. Appellants’ argument that “Lin teaches away from the Lin invention being used with flip chip technology” (App. Br. 12) is not convincing. Lin teaches that the inventive process is flexible enough to accommodate the flip-chip bonding technique (FF 3) and that flip-chip bonding has “tremendous advantages” over the other two known techniques of wire bonding and tape automated bonding (FF 2). However, flip-chip bonding also exhibits cost and technical limitations. (FF 2.) Thus, Lin describes that some characteristics of flip-chip bonding as “somewhat inferior,” rather than “teaching away” from the use of flip-chip bonding. See In re Gurley, 27 F.3d 551, 553 (Fed. Cir. 1994). Next, Appellants’ argument that “Lin does not teach or suggest deepening a hole [i.e., the second concavity 312a of Lee] but instead Lin teaches depositing a trace 42 [sic, 32] having a through-hole 44” (App. Br. 14) is not convincing. As discussed previously, the rejection of claim 1 is based on the simple substitution of one known bonding method for another, rather than “deepening” the second concavity 312a on the leads 312 of Lee. Appeal 2009-007820 Application 11/307,128 7 Finally, Appellants’ argument that “Lin cannot use a flip-chip bump for electrical conductivity because in Lin a bump is not placed on a lead finger, the flip-chip is not placed on a bump, and the lead finger and flip- chip are not bonded by reflow soldering” (App. Br. 14) is not convincing. As discussed previously, the Examiner cited to Lee for the disclosure of these features. (Ans. 3; FF 1.) Therefore, the Examiner has not erred in combining Lee and Lin and has not erred in finding that the combination of Lee and Lin teaches or suggests “forming a lead tip hole through the lead finger.” We conclude that the Examiner has not erred in rejecting claim 1 under 35 U.S.C. § 103(a). Because Appellants have not presented separate arguments regarding dependent claims 2-5, we affirm the rejection of these claims for the same reasons as for claim 1, from which they depend. Independent claim 6 recites limitations similar to those discussed, with respect to independent claim 1, and we conclude that the Examiner has not erred in rejecting this claim, as well as claims 7, 8 and 10, which depend from claim 6, for the reasons discussed with respect to claim 1. Claim 9 Although Appellants nominally argue the rejection of dependent claim 9 separately (App. Br. 15), the arguments presented do not point out with particularity or explain why the limitations of the dependent claim are separately patentable. Instead, Appellants state that “this dependent claim depends from independent claim 6 and stands and falls with the independent claim from which it depends.” (App. Br. 15.) Thus, claim 9 falls together with claim 6. Appeal 2009-007820 Application 11/307,128 8 CONCLUSION Based on the findings of fact and analysis above, we conclude that the Examiner has not erred in rejecting claims 1-10 under 35 U.S.C. § 103(a). DECISION The rejection of claims 1-10 under 35 U.S.C. § 103(a) is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED bim LAW OFFICES OF MIKIO ISHIMARU 333 W. EL CAMINO REAL SUITE 330 SUNNYVALE, CA 94087 Copy with citationCopy as parenthetical citation