Ex Parte Cabillic et al

Board of Patent Appeals and Interferences

Mar 31, 2011

11116897 (B.P.A.I. Mar. 31, 2011)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte GILBERT CABILLIC, JEAN-PHILIPPE LESOT,
GERARD CHAUVEL, DOMINIQUE D'INVERNO,
and JAQUES MEQUIN
____________

Appeal 2009-009676
Application 11/116,897
Technology Center 2100
____________

Before HOWARD B. BLANKENSHIP, JEAN R. HOMERE, and
JOHN A. JEFFERY, Administrative Patent Judges.

BLANKENSHIP, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE
This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1-22, which are all the claims in the application. We
have jurisdiction under 35 U.S.C. § 6(b).
We affirm.

Appeal 2009-009676
Application 11/116,897

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Invention
Appellants’ invention relates to a “PACK” instruction that permits the
creation of a bit stream by copying some or all of the contents of a source
register to a designated location within a destination register. Spec.
¶ [0016]. As shown in Figure 5, the contents of a source data field 200 are
copied from the lowest order bits of a source register (Rs1) to a destination
register (Rd) at a location identified by a position value P. Id., ¶ [0030].
The instruction includes a “programmable bit” (field 258, Figs. 6, 7) that
specifies whether the P value is contained in the instruction itself (field 262,
Fig. 7), or that the instruction includes a pointer to a register that contains
the P value (field 256, Fig. 6). Id., ¶¶ [0032]-[0037].

Representative Claim
1. A processor executing a plurality of instructions,
comprising:

an arithmetic logic unit (ALU); and

a plurality of registers coupled to the ALU;

wherein said processor executes an instruction that
causes a source data field from a first source register to be
copied to a destination register at a programmable position
within the destination register; and

wherein the instruction comprises a programmable bit
that specifies whether the instruction comprises a value of the
position or whether the instruction comprises a pointer to a
register containing the value of the position.

Appeal 2009-009676
Application 11/116,897

3
Examiner’s Rejections
Claims 1-22 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Gadre (US 6,308,253 B1) and Dulong (US 5,384,722).
The Examiner in the Final Rejection entered a provisional rejection
against claims in the instant application, on the ground of non-statutory
obviousness-type double patenting, over claims in co-pending Application
No. 11/116,918. The rejection was repeated in the Answer. Appellants did
not contest the rejection. Ans. 4. However, according to USPTO records,
Application No. 11/116,918 is now an abandoned application, with no
indication that its claims are contained in a continuing application. Because,
on this record, the claims in the “reference” application no longer exist, we
dismiss the provisional double patenting rejection as moot.

FINDINGS OF FACT
We rely on the findings set forth by the Examiner in the Answer.

PRINCIPLES OF LAW
What a reference teaches is a question of fact. In re Baird, 16 F.3d
380, 382 (Fed. Cir. 1994); In re Beattie, 974 F.2d 1309, 1311 (Fed. Cir.
1992).

ANALYSIS
Appellants submit in the Appeal Brief that the rejection of claim 1, as
set forth in the Final Rejection, errs. However, the rejection in the Answer
(at 5-8) relies on some different teachings in the references to demonstrate
obviousness. The Examiner finds that Gadre teaches the subject matter of
Appeal 2009-009676
Application 11/116,897

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claim 1; in particular, that the reference teaches at Figure 7B and column 10,
lines 4 through 18, an “instruction” as claimed that causes a source data field
from a first source register to be copied to a destination register at a
programmable position within the destination register. The Examiner
acknowledges that Gadre does not teach that the instruction comprises a
programmable bit that specifies whether the instruction comprises a value of
the position or whether the instruction comprises a pointer to a register
containing the value of the position. The rejection turns to Dulong, as
disclosed in material at columns 9 and 10, for teachings with respect to how
an instruction can contain different addressing modes for identifying source
operands; e.g., an “immediate” mode where the value is in the instruction
itself and a “register” mode where the value can be retrieved from a register.
See Dulong col. 10, ll. 17-60; Table III. The Examiner further provides
reasons why it would have been obvious to use a “programmable bit” to
select one of the two prior art modes for providing a value. Ans. 7-8.
Appellants had the right and the opportunity to respond to the new
findings in the Answer, by filing a reply brief. In the Reply Brief,
Appellants first appear to agree with the Examiner’s findings with respect to
Dulong. “The source field in Dulong . . . is used to identify a source
location (e.g., a register or the instruction itself) for the operation at hand.”
Reply Br. 1. Appellants continue, however, that the source field of Dulong
is not described as being used to program a position within a specified
destination register, or not used to specify where the position within a
destination register can be found to which source bits are to be copied.
Dulong “does not teach that the position within the destination register can
be programmed.” Id.
Appeal 2009-009676
Application 11/116,897

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We are not persuaded of error, to any extent, in the rejection the
Examiner sets out in the Answer. The rejection relies on Gadre, not Dulong,
for the teachings with respect to the effects of the “instruction.” The
rejection relies on Dulong only to demonstrate the obviousness of including
a “programmable bit” in an instruction, for the flexibility of providing a
value in the instruction itself or in a pointer to a register that contains the
value.
We sustain the rejection of claim 1. Claims 2 through 22, not
separately argued, fall with claim 1. See 37 C.F.R. § 41.37(c)(1)(vii).

DECISION
The rejection of claims 1-22 under 35 U.S.C. § 103(a) as being
unpatentable over Gadre and Dulong is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 41.50(f).

AFFIRMED

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