Ex Parte Byers et alDownload PDFBoard of Patent Appeals and InterferencesSep 4, 201211231295 (B.P.A.I. Sep. 4, 2012) Copy Citation UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________ Ex parte LARRY L. BYERS, JOSEBA M. DESUBIJANA, GARY R. ROEBECK, and WILLIAM W. DENNIN ____________ Appeal 2010-001651 Application 11/231,295 Technology Center 2100 ____________ Before JOSEPH L. DIXON, JEAN R. HOMERE, and ANDREW J. DILLON, Administrative Patent Judges. DILLON, Administrative Patent Judge. DECISION ON APPEAL Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s rejection of claims 14-19 and 23-28. App. Br. 3.1 Claims 1-13 and 20-22 have been cancelled. Id. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. 1 Throughout this opinion, we refer to the Appeal Brief filed March 16, 2009; the Examiner’s Answer mailed June 19, 2009; and, the Reply Brief filed August 18, 2009. Appeal 2010-001651 Application 11/231,295 2 STATEMENT OF THE CASE Appellants’ invention is directed to a system for monitoring plural components in an embedded disk controller. See Spec. 51, Abstract of the Disclosure. Claim 14, the only independent claim, is illustrative, with key disputed limitations emphasized: 14. An embedded disk controller, comprising: a first bus located in the embedded disk controller; a first processor that communicates with said first bus; a second bus located in the embedded disk controller; a first device that communicates with one of said first and second buses; a second processor that communicates with said second bus; a history module that is located in the embedded disk controller, that communicates with the first bus and the second bus, and that at least one of monitors transaction information of said first device and masks transaction information of said first device based on setup information. The Examiner relies on the following as evidence of unpatentability: Hester US 2004/0093538 A1 May 13, 2004 THE REJECTIONS2 1. The Examiner rejected claims 14-19, 23-25, and 28 under 35 U.S.C. § 102(e) as anticipated by Hester. Ans. 3-5. 2. The Examiner rejected claims 26 and 27 under 35 U.S.C. § 103(a) as unpatentable over Hester. Ans. 5-6. 2 The rejection of claim 24 under 35 U.S.C. § 112, first paragraph, as failing to comply with the enablement requirement is withdrawn. Ans. 6. Appeal 2010-001651 Application 11/231,295 3 ISSUE Based upon our review of the record, the arguments proffered by Appellants and the findings of the Examiner, we find the following issue to be dispositive of the claims on appeal: Under §102, has the Examiner erred in rejecting claim 14 by finding that Hester discloses a first and second bus located within an embedded disk controller? ANALYSIS Appellants argue that the Examiner has improperly rejected claims 14-19 and 23-28 as either anticipated by or unpatentable over Hester in view of the failure of Hester to disclose a first and second bus located within an embedded disk controller. The basis for Appellants’ position is an assertion that the bus labelled “TO/FROM HOST” in Figure 3 of Hester is necessarily external to disk controller 301. App. Br. 6-7. The Examiner finds that Hester expressly discloses that the various components of Hester that are shown and described “may be combined as a single module” (Hester, ¶[0042]) (Ans. 9) and further, that the bus labelled “TO/FROM HOST” in Figure 3 of Hester, even if external to disk controller 301, must necessarily be connected to an internal bus, within disk controller 301, which couples processor 321 to an external connection. Ans. 7-8. Appellants argue, in their Reply Brief, that there is no evidence that a connection exists between processor 321 and the “TO/FROM HOST” bus, or that such a connection is a “bus.” Reply Br. 8-9. We find Appellants’ Reply Brief arguments unpersuasive. That is, we find that the Examiner’s assertion to be well founded that a connection Appeal 2010-001651 Application 11/231,295 4 between processor 321 and the “TO/FROM HOST” bus must exist within the depicted disk controller, and that such connection must be a “bus.” Further, even in the absence of such a finding, we are convinced that Hester, as noted by the Examiner, expressly contemplates the inclusion of all disclosed elements of their system within a single module. Consequently, we find the Examiner did not err in rejecting claim 14 as anticipated by Hester, and it follows that claims 15-19 and 23-28, not separately argued, are properly rejected as well. CONCLUSION The Examiner did not err in rejecting claims 14-19 and 23-28 under either § 102 or § 103. ORDER The Examiner’s decision rejecting claims 14-19 and 23-28 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED llw Copy with citationCopy as parenthetical citation