Ex Parte Buchwalter et al

Patent Trial and Appeal Board

Aug 2, 2016

13312456 (P.T.A.B. Aug. 2, 2016)

UNITED STA TES p A TENT AND TRADEMARK OFFICE
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR
13/312,456 12/06/2011 Leena P. Buchwalter
47939 7590 08/02/2016
NOV AK DRUCE CONNOLLY BOVE+ QUIGG LLP
(FOR IBM YORKTOWN - DC OFFICE)
1875 I Street, N.W.
Suite 1100
WASHINGTON, DC 20006
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www .uspto.gov
ATTORNEY DOCKET NO. CONFIRMATION NO.
YOR920050343US3 7222
EXAMINER
PIZARRO CRESPO, MARCOS D
ART UNIT PAPER NUMBER
2814
MAILDATE DELIVERY MODE
08/02/2016 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE
THE PA TENT TRIAL AND APPEAL BOARD
Exparte LEENA P. BUCHWALTER, 1
Paul S. Andry, Matthew J. Farinelli, Sherif A. Goma,
Raymond R. Horton, and Edmund J. Sprogis
Appeal2015-001247
Application 13/312,456
Technology Center 2800
Before BEYERL YA. FRANKLIN, MARK NAGUMO, and
JENNIFER R. GUPTA, Administrative Patent Judges.
NAGUMO, Administrative Patent Judge.
DECISION ON APPEAL
Leena P. Buchwalter, Paul S. Andry, Matthew J. Farinelli,
Sherif A. Goma, Raymond R. Horton, and Edmund J. Sprogis ("IBM")
timely appeal under 35 U.S.C. § 134(a) from the Final Rejection2 of
claims 2-11, 24-26, and 28-30, which are all of the pending claims.
We have jurisdiction. 35 U.S.C. § 6. We affirm.
1 The real party in interest is identified as International Business Machines
Corporation ("IBM"). (Appeal Brief, filed 12 February 2014 ("Br."), 2.)
2 Office action mailed 17 September 2013 ("Final Rejection"; cited as
"FR").
Appeal2015-001247
Application 13/312,456
A. Introduction3
OPINION
The subject matter on appeal relates to methods of joining ultra-thin
silicon chips-particularly chips already having CMOS BEOL wiring4-to a
substrate without damage arising from handling. (Spec. 3, 11. 2--4.) Fig. 2A,
reproduced below, shows principal aspects of the claimed invention.
{Fig. 2A shows chip 200 adhered to glass wafer 100 irradiated by uv 600}
3 Application 13/312,456, Laser release process for very thin Si-carrier
build, 6 December 2011, is a continuation of 12/167,745, 3 July 2008, now
U.S. Patent No. 8,187,923, which is a continuation of 11/341,458,
filed 30 January 2006, now abandoned. We refer to the
'" 456 Specification," which we cite as "Spec."
4 CMOS is the acronym for Complementary Metal Oxide Semiconductor, a
standard semiconductor device structure. BEOL is the acronym for "Back
End of Line" processing, the stage at which individual devices or
components (transistors, capacitors, etc.) are connected to one another by
conductive traces, vias, etc. FEOL is the acronym for Front End Of Line
processing, in which the individual devices are patterned in the
semiconductor substrate.
2
Appeal2015-001247
Application 13/312,456
The '456 Specification explains that chips [2005] thinned to less than
about 200 µm require external support [100] in order to be processed by
existing CMOS fabrication facilities. (Id. at 7, 1st full para.) Chips that are
to be thinned to about 150 µm down to BEOL + FEOL thickness (id. at 3d
para.) are first adhered to glass handler wafer [100] that is CTE-[coefficient
of thermal expansion]-matched to the Si wafer, and also transparent to UV
laser radiation (id. at 7, 2d full para.).
After thinning, further CMOS BEOL processing, including
C4 ball [ 400] deposition6 occurs; the wafer may be diced; and the diced
assembly joined to a substrate [300] by standard techniques to form an
integrated circuit module. (Id. at 3d full para.) The Specification reveals
that C4 balls [ 400] exacerbate the stress placed on carrier [200], rendering
the thinned wafer even more vulnerable to cracking. (Id. at 2, 1st para.)
According to the Specification, "thinned carrier fracture [may be avoided]
by applying a chip underfill material to give added support to the thinned
Si-device prior to laser release processing." (Id. at 9, 3d full para.) In the
words of the Specification, "The underfill material can be any of the
materials known in the art that will cure at temperatures below the
decomposition onset of polyimide adhesives or at temperatures less than
about 350 °C." (Id.)
5 Throughout this Opinion, for clarity, labels to elements are presented in
bold font, regardless of their presentation in the original document.
6 C4 is the abbreviation for Controlled Collapse Chip Connection, also
referred to as "flip chip" processing, in which solder balls or bumps are
placed on chip pads. The chips are aligned with the solder balls matched to
pads on an external circuit, and the solder reflowed (melted) to complete the
interconnections.
3
Appeal2015-001247
Application 13/312,456
Sole independent claim 6 is representative and reads:
An integrated circuit module comprising an article, which
comprises a semi-conductor carrier or device wafer, comprising:
a semi-conductor substrate [200] having CMOS BEOL
wiring defined thereon;
a glass handler wafer [100];
a layer of less than 10 µm of a synthetic resin
release adhesive [500] applied to and cured
on the semi-conductor substrate [200], or
on the glass handler wafer [100], or both;
wherein the adhesive upon curing can withstand
temperatures of at least 400°C, but is abatable
[sic: ablatable] upon exposure to excimer laser
radiation [600];
wherein the glass handler wafer [100] is laminated with
the adhesive [500] located between the semi-conductor
substrate [200] and the glass handler wafer [100], and
further comprising
C4 balls [ 400] deposited on the semi-conductor substrate [200];
wherein the article is diced to a pre-determined size;
and a substrate [300] having
the article joined thereon by the C4 balls [ 400] and
an underfill composition located between said semi-conductor
substrate [200] and said carrier or wafer [300],
wherein said underjill composition cures at a
temperature below the decomposition temperature of
said adhesive.
(Claims App., Br. 12; indentation, paragraphing7, emphasis, and bracketed
labels to Fig. 2A added.)
7 In compliance with 37 C.F.R. § l.75(i) (2013): "Where a claim sets forth a
plurality of elements or steps, each element or step of the claim should be
separated by a line indentation."
4
Appeal2015-001247
Application 13/312,456
The integrated circuit module, with the glass handler wafer still
adhered, is then exposed to UV radiation, as shown in Fig 2A, which ablates
(degrades) the adhesive. The glass handler wafer may then be removed (see
Fig. 5A-C, not reproduced here), and the chip further processed to remove
remaining adhesive, etc.
The Examiner maintains the following grounds of rejection8:
A. Claims 2-9, 24-26, and 28-30 stand rejected under
35 U.S.C. § 103(a) in view of the combined teachings of
Draney,9 Wood, 10 Jones, 11 Lee, 12 and Carden. 13
Al. Claims 10 and 11 stand rejected under 35 U.S.C. § 103(a) in
view of Draney Wood, Jones, Lee, Carden, and Akamatsu. 14
8 Examiner's Answer mailed 26 August 2014 ("Ans.").
9 Nathan R. Draney and Michael E. Connell, Method and apparatus for
forming thin microelectronic dies, U.S. Patent No. 6,762,074 Bl (2004).
10 Alan G. Wood and Warren M. Farnworth, Process for packaging a
semiconductor die using dicing and testing, U.S. Patent No. 5,851,845
(1998).
11 Keith D. Jones, Materials for electronic devices, U.S. Patent
No. 7,148,577 B2 (12 December 2006), based on an application
filed 31 December 2003.
12 Kyung Rok Lee et al., Polyimidefor high temperature adhesive, U.S.
Patent No. 6,307,008 Bl (2001).
13 Timothy F. Carden and Aleksander Zubelewicz, Assembly process for flip
chip package having a low stress chip and resulting structure, U.S. Patent
No. 6,488,806 B2 (2002).
14 Takayoshi Akamatsu et al., Circuit board, ... , U.S. Patent
No. 7,105,221 B2 (12 September 2006), based on an international
application accorded a 35 U.S.C. § 37l(c)(l), (2), (4) date of 13 July 2003.
5
Appeal2015-001247
Application 13/312,456
B. Discussion
Findings of fact throughout this Opinion are supported by a
preponderance of the evidence of record.
All of IBM's substantive arguments for patentability are based on
limitations recited in claim 6, including separately rejected claims 10 and 11.
All claims therefore stand or fall with claim 6. 37 C.F.R. § 41.37(c)(l)(iv)
(2013).
Briefly, the Examiner finds that Draney shows most aspects of the
claimed invention, including a glass handler wafer that transmits radiation
for effective ablation of an underlying adhesive (FR 2; Ans. 2-3 (same)), an
assessment IBM does not deny (Br. 5). The Examiner finds that the
remaining cited references teach the missing aspects, and concludes that it
would have been obvious to combine the teachings of the references in an
integrated circuit module within the scope of the appealed claims. (FR 3--4;
Ans. 3-5 (same).)
IBM acknowledges the Examiner finding that Wood discloses
attachments using C4 balls, but urges that Wood does not disclose use of an
underfill or the relation of the underfill cure temperature to the adhesive
layer decomposition temperature. (Br. 6, 1st para.) Nor, IBM urges, would
Wood have rendered obvious the use of a releasable adhesive. (Id.)
These arguments are not persuasive of harmful error because
Examiner does not rely on Wood for the "missing" disclosures. Moreover,
as discussed infra, IBM does not show harmful error in the conclusions the
Examiner adduced from those findings, combined with the Examiner's
findings regarding the other references.
6
Appeal2015-001247
Application 13/312,456
IBM's contention (Br. 6, 3d para.) that Jones does not disclose the
curing temperature of a filled epoxy bonding material used as an underfill at
column 6, lines 44-54, cited by the Examiner (FR 3, 3d para.), is well-taken.
However, we do not consider this error harmful. Nor is IBM's criticism that
Jones does not disclose a release adhesive persuasive of harmful error,
because the Examiner does not rely on Jones for such a teaching. As the
Examiner explains (FR 5, ,-i 4), it is well-settled that rejections based on the
combination of teachings of various references cannot be defeated by
criticizing the failure of individual references to teach particular elements.
Rather, it is the combined teachings of the references that must be addressed.
In the present case, IBM has not shown error in the Examiner's
conclusion that the teachings of Jones together with the teachings of Lee
(disclosing polyimide adhesives that do not decompose at drying
temperatures of more than 250°C, or preferably more than 300°C (Lee,
col. 11, 11. 23-28), and the teachings of Carden (Carden, col. 4, 11. 47--49,
teaching underfills cured simultaneously with adhesives at the same
temperature and pressure profile) suffice to establish a reasonable
evidentiary basis that the selection of an underfill material that is
temperature-compatible with the radiation-ablatable adhesive would have
been obvious (FR 5, ,-i 4).
Similarly, IBM's criticisms of Jones (Br. 6, 3d para., last sentence),
Lee (id. at 6, 11. 1-3)) , and Carden (id. at 11. 6-7) as not being concerned
with the problems addressed by the claimed invention are not persuasive.
IBM does not show harmful errors in the Examiner's findings that the
properties of the underfills and adhesives, disclosed by these references
would have commended these materials to the artisan for their intended uses.
7
Appeal2015-001247
Application 13/312,456
IBM's unembellished argument that the silence of Draney, Wood, and
two other patents assigned to Micron Technology, Inc., indicate the non-
obviousness of using C4 balls for attachment (Br. 6, 2d para.) are not
persuasive, as they amount to mere speculation by counsel.
We are not persuaded of harmful error in the appealed rejections, and
we therefore affirm.
C. Order
It is ORDERED that the rejection of claims 2-11, 24-26, and 28-30 is
affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § l.136(a).
AFFIRMED
8