10988484 (B.P.A.I. Mar. 20, 2012)

Ex Parte Bhavnagarwala et al

Board of Patent Appeals and InterferencesMar 20, 2012

10988484 (B.P.A.I. Mar. 20, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE UNITED STATES DEPARTMENT OF COMMERCE United States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS P.O. Box 1450 Alexandria, Virginia 22313-1450 www.uspto.gov APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO. 10/988,484 11/12/2004 Azeez J. Bhavnagarwala YOR920040598US1 1536 7590 03/21/2012 Daniel P. Morris, Ph.D., Esq.. IBM CORPORATION Intellectual Property Law Dept. P.O. Box 218 Yorktown Heights, NY 10598 EXAMINER SANDVIK, BENJAMIN P ART UNIT PAPER NUMBER 2826 MAIL DATE DELIVERY MODE 03/21/2012 PAPER Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication. PTOL-90A (Rev. 04/07) UNITED STATES PATENT AND TRADEMARK OFFICE ____________ BEFORE THE BOARD OF PATENT APPEALS AND INTERFERENCES ____________ Ex parte AZEEZ J. BHAVNAGARWALA, STEPHEN V. KOSONOCKY, SATYANARAYANA V. NITTA, and SAMPATH PURUSHOTTHAMAN Appeal 2010-000262 Application 10/988,484 Technology Center 2800 ____________ Before THU A. DANG, CAROLYN D. THOMAS, and ANDREW J. DILLON, Administrative Patent Judges. DILLON, Administrative Patent Judge. DECISION ON APPEAL Appellants appeal under 35 U.S.C. § 134(a) from the Examiner’s rejection of claims 1-5, 7-13, 36, 37, and 47. Claims 6, 14-35, 38-46, and 48 have been cancelled. We have jurisdiction under 35 U.S.C. § 6(b). We affirm. Appeal 2010-000262 Application 10/988,484 2 STATEMENT OF THE CASE Appellants’ invention is directed to “a] hybrid interconnect structure that possesses a higher interconnect capacitance in one set of regions than in other regions on the same microelectronic chip.” See Spec. 16, Abstract. Claim 1 is illustrative, with key disputed limitations emphasized: 1. An interconnect structure comprising: a multitude of conductors in the same plane disposed atop and in contact with a first dielectric comprising a first k value wherein a first subset of conductors are interconnect wires located within an SRAM portion of a microelectronic chip and wherein spaces between the first subset of said multitude of conductors are occupied by a second dielectric comprising a second k value and spaces between a second subset of said multitude of conductors are occupied by a third dielectric comprising a third k value, wherein said first, second and third dielectrics comprise first, second and third materials which are different from each other, wherein said third k value is greater than said first k value and said second k value is less than or equal to said first k value and wherein said second dielectric and said third dielectric are not disposed between said multitude of conductors and said first dielectric. The Examiner relies on the following as evidence of unpatentability: Chiang US 6,777,320 B1 Aug. 17, 2004 (filed Nov. 13, 1998) Domae US 2002/0005584 A1 Jan. 17, 2002 Kita US 2002/0056885 A1 May 16, 2002 Kim US 2002/0102807 A1 Aug. 1, 2002 Brintzinger US 6,495,918 B1 Dec. 17, 2002 Shao US 6,657,302 B1 Dec. 2, 2003 Appeal 2010-000262 Application 10/988,484 3 THE REJECTIONS 1. The Examiner rejected claims 1-5, 7, 9-12, 36, and 37 under 35 U.S.C. § 103 (a) as unpatentable over Chiang, Shao, and Domae. Ans. 3-6.1 2. The Examiner rejected claim 8 under 35 U.S.C. § 103 (a) as unpatentable over Chiang, Shao, Domae, Brintzinger, and Kita. Ans. 6-7. 3. The Examiner rejected claims 13 and 47 under 35 U.S.C. § 103 (a) as unpatentable over Chiang, Shao, Domae, and Kim. Ans. 7-8. ANALYSIS Appellants argue, with respect to claims 1-5, 7, 9-12, 36, and 37, that the Examiner’s rejection of those claims as unpatentable over Chiang, Shao, and Domae is not well founded. Specifically, regarding claim 1, from which the remaining claims depend, the Appellants argue that the cited references fail to show or suggest an interconnect structure which comprises a multitude of conductors in the same plane disposed atop and in contact with a first dielectric comprising a first k value, wherein the conductors include a first subset of conductors disposed in an SRAM portion of a microelectronic chip and the spaces between the first subset of said multitude of conductors is occupied by a second dielectric comprising a second k value, and wherein the spaces between a second subset of said multitude of conductors in the non-SRAM portion of the chip are occupied by a third dielectric comprising a third k value. Appellants also argue the cited references fail to show or suggest an interconnect structure wherein the first, second, and third 1 Throughout this opinion, we refer to the Appeal Brief filed February 9, 2009, the Examiner’s Answer mailed May 28, 2009, and the Reply Brief filed July 28, 2009. Appeal 2010-000262 Application 10/988,484 4 dielectrics comprise first, second, and third materials which are different from each other and wherein said third k value is greater than said first k value and said second k value is less than or equal to said first k value, and wherein said second dielectric and said third dielectric are not disposed between said multitude of conductors and said first dielectric. App. Br. 10- 11, Reply Br. 2-3. The Examiner finds that Chiang teaches a multitude of conductors in the same plane, disposed atop of and in contact with a first dielectric comprising a non-disclosed first k value wherein the spaces between a first subset of said multitude of conductors is occupied by a second dielectric comprising a second k value and spaces between a second subset of said multitude of conductors is occupied by a third dielectric comprising a third k value wherein the second dielectric and the third dielectric comprise second and third materials which are different from each other such that the third k value is greater than silicon oxide and the second k value is less than silicon oxide, wherein the second dielectric and the third dielectric are not disposed between the multitude of conductors and the first dielectric. The Examiner finds that Chang does not teach that the first dielectric material has a first k value such that the third k value is greater than the first k value and the second k value is less than or equal to the first k value; however, the Examiner finds that Shao teaches an underlying insulating film formed of silicon dioxide and finds that it would have been obvious to form the first dielectric of Chiang of silicon dioxide such that the dielectric constants satisfy the claimed limitations. Ans. 3-4. Appeal 2010-000262 Application 10/988,484 5 Further, the Examiner finds that Chiang teaches the desirability of providing different capacitance values in different portions of an interconnect structure. Ans. 8-9. We concur with the Examiner’s findings regarding Chiang, and adopt them as our own. The Appellants also argue that the combination of Shao with Chiang is improper, since Shao teaches the use of silicon dioxide within each interconnect and consequently a combination of Shao with Chiang would alter the intended purpose of Chiang (the provision of different capacitance values in different portions of an interconnect structure). App. Br. 13-14. It is well settled that one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Merck & Co., 800 F.2d 1091, 1097 (Fed. Cir. 1986). Finally, the Appellants argue that there is no teaching in Chiang or Domae which would lead one having ordinary skill in the art to modify the teaching of Chiang with the Domae teaching of SRAM conductors. App. Br. 15-16. The Examiner finds that Domae discloses a first subset of conductors located within an SRAM portion of a microelectronic chip comprising word and power lines of SRAM cells and a second subset of conductors located in regions other than the SRAM cells. The Examiner finds that it would have been obvious to one of ordinary skill in the art at the time the invention was made to arrange the first subset of conductors of Chiang in an SRAM portion of a chip and a second subset of conductors in a non-SRAM portion, as taught by Domae. Appeal 2010-000262 Application 10/988,484 6 We find that the recitation of the interconnect wires in claim 1 as “located within an SRAM portion of a microelectronic chip” is a mere recitation of intended use, since there is no positive recitation of an SRAM circuit. The “intended use” of a machine is not germane to the issue of patentability of the machine itself. See In re Casey, 370 F.2d 576, 580 (CCPA 1967). We are therefore not persuaded that the Examiner erred in rejecting representative claim 1 and claims2-5, 7, 9-12, 36, and 37, not separately argued with particularity. With respect to claim 8, Appellants argue that, despite the teaching within Brintzinger and Kita that dielectric material may be selectively placed, these references fail to address the alleged failure of Chiang, Shao, and Domae to suggest three different dielectric materials which are disposed in specific relationship to the conductors in an SRAM structure. App. Br. 19-20. For the reasons set forth above we find this argument unpersuasive and we find the Examiner did not err in rejecting claim 8. Finally, with respect to claims 13 and 47, the Appellants argue that the citation of Kim fails to cure the argued deficiencies of Chiang, Shao, and Domae, noting that the mere addition of the memory cell of Kim would not result in the claimed interconnect structure having a high interconnect capacitance in some regions and low interconnect capacitance in other regions. App. Br. 20-22. As we note above, we find that Chiang discloses the provision of different capacitance values in different portions of an interconnect Appeal 2010-000262 Application 10/988,484 7 structure. As a result, and for the same reasons we set forth above, we find the Examiner did not err in rejecting claims 13 and 47. CONCLUSION The Examiner did not err in rejecting claims 1-5, 7-13, 36, 37, and 47 under § 103. ORDER The Examiner’s decision rejecting claims 1-5, 7-13, 36, 37, and 47 is affirmed. No time period for taking any subsequent action in connection with this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv). AFFIRMED llw