Ex Parte Beale

Patent Trial and Appeal Board

Dec 20, 2016

10537195 (P.T.A.B. Dec. 20, 2016)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
10/537,195 06/02/2005 Martin W. Beale 12-0213 3437
102469 7590 12/22/2016
PARKER JUSTISS, P.C./Nvidia
P.O. Box 832570
Richardson, TX 75083
EXAMINER
TRAN, PABLO N
ART UNIT PAPER NUMBER
2649
NOTIFICATION DATE DELIVERY MODE
12/22/2016 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
docket@pj-iplaw.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte MARTIN W. BEALE
Appeal 2015-005881
Application 10/537,195
Technology Center 2600
Before CARLA M. KRIVAK, JEFFREY S. SMITH, and
AARON W. MOORE, Administrative Patent Judges.
KRIVAK, Administrative Patent Judge.
DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from a final rejection of
claims 1—68, 91, 92, 94, and 95. We have jurisdiction under 35 U.S.C.
§ 6(b).
We affirm.
Appeal 2015-005881
Application 10/537,195
STATEMENT OF THE CASE
Appellant’s invention is directed to “wireless CDMA systems
operating in time division duplex (TDD) mode” (Spec. 1:6—9).
Independent claim 1, reproduced below, is exemplary of the subject
matter on appeal.
1. A method for supporting of a plurality of chip rates in
a code division multiple access (CDMA) system between a
plurality of user equipment (UE) sharing a plurality of timeslots
in a frame, the method comprising:
allocating to a UE at least a first timeslot of the plurality
of timeslots in the frame at a first chip rate of the plurality of
chip rates based on a chip rate capability of the UE on a per
timeslot basis.
REFERENCES and REJECTIONS
The Examiner rejected claims 1—5, 10-16, 23—28, 33—39, 46—51, 56—
62, 91, 92, 94, and 95 under 35 U.S.C. § 102(b) as anticipated by Gitlin (US
6,018,528).
The Examiner rejected claims 6—9, 17—22, 29—32, 40-45, 52—55, and
63—68 under 35 U.S.C. § 103(a) based upon the teachings of Gitlin and
Chuah (US 6,115,390).
ANALYSIS
Appellant contends the Examiner erred in finding Gitlin teaches chip
rate and timeslot allocation is based on the chip rate capability of the UE
(user equipment) (App. Br. 6—7).
The Examiner made specific, reasonable findings in the Final Office
Action and Answer regarding the chip rate and UE, which Appellant does
not address. For, example, Appellant cites to Gitlin’s column 4, which was
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Appeal 2015-005881
Application 10/537,195
not used in the rejection, but does not address columns 6, 8, and 9 relied on
by the Examiner (Final Act. 2-4; Ans. 3—4).
Thus, we sustain the Examiner’s rejection of claims 1—5, 10-16, 23—
28, 33—39, 46—51, 56—62, 91, 92, 94, and 95 as anticipated by Gitlin, and
claims 6—9, 17—22, 29—32, 40-45, 52—55, and 63—68 as obvious over Gitlin
and Chuah, which were argued for their dependency on the independent
claims.
DECISION
The Examiner’s decision rejecting claims 1—68, 91, 92, 94, and 95 is
affirmed.1
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
1 In the event of any further prosecution, the Examiner should consider
rejecting the claims under 35 U.S.C. § 112(a) (first paragraph (pre AIA)) as
directed to a single means. The Examiner should also consider the
references cited by the British patent office, particularly EP0701 337A3
(page 18, lines 10-11, for example).
3