Ex Parte Balko et al

Patent Trial and Appeal Board

Feb 23, 2017

12327771 (P.T.A.B. Feb. 23, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/327,771 12/03/2008 Soren Balko 34874-420F01US/2008P00245 5765
64280 7590 02/27/2017
Mintz Levin/SAP
Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
One Financial Center
Boston, MA 02111
EXAMINER
PETRANEK, JACOB ANDREW
ART UNIT PAPER NUMBER
2183
NOTIFICATION DATE DELIVERY MODE
02/27/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
IPDocketingBOS @ mintz.com
IPFileroombos @ mintz. com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte SOREN BALKO and MATTHIAS MILTZ
Appeal 2016-003032
Application 12/327,771
Technology Center 2100
Before ROBERT E. NAPPI, JAMES R. HUGHES and
NATHAN A. ENGELS, Administrative Patent Judges.
NAPPI, Administrative Patent Judge.
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134(a) from the final
rejection of claims 1 through 3, 5 through 10, 12 through 17, 19, and 20. We
have jurisdiction under 35 U.S.C. § 6(b).
We affirm.
INVENTION
This invention is directed to a method for scheduling a ready set of
actions in which each action is scheduled for execution using a separate,
concurrent thread and the concurrency of the actions is controlled using a
control mechanism. See Abstract. Claim 1 is representative of the invention
and reproduced below.
Appeal 2016-003032
Application 12/327,771
1. A non-transitory computer-readable medium
containing instructions to configure a processor to perform a
method, the method comprising:
receiving, at a correlation engine, a message including
one or more rules comprising one or more event-condition-
action rules, the correlation engine interfaced between a user
interface and a database;
evaluating, at the correlation engine, the one or more
rules to determine whether the one or more rules include one or
more conditions triggering the enablement of one or more
actions in a ready set of actions for the database interfaced to
the correlation engine; and
scheduling, at the correlation engine, the ready set of
actions, each of which is scheduled for execution and
subsequently executed according to the scheduling,
wherein the correlation engine executes each of the ready
set of actions using a separate, concurrent thread, and
wherein the concurrency of the actions is controlled by
the correlation engine using a concurrency control mechanism
that schedules the ready set of actions by at least locking one or
more state variables associated with the correlation engine.
REJECTION AT ISSUE
The Examiner has rejected claims 1 through 3, 5 through 10, 12
through 17, 19, and 20 under 35 U.S.C. § 103(a) as unpatentable over
Yalamanchi (US 2005/0222996 Al, Oct. 6, 2005) and Burdick (US
2006/0130062 Al, June 15, 2006). Final Action 2—6.1
1 Throughout this Decision, we refer to the Appeal Brief filed May 14, 2015,
the Reply Brief filed January 29, 2016, Final Action mailed September 11,
2014, and the Examiner’s Answer mailed December 4, 2015.
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Appeal 2016-003032
Application 12/327,771
ISSUES
Appellants argue, on pages 11 through 14 of the Appeal Brief that the
Examiner’s rejection of independent claims 1, 8, and 15 is in error. These
arguments present us with the following issues:
1) Did the Examiner err in finding that the combination of
Yalamanchi and Burdick teach locking state variables as
recited in representative claim 1?
2) Did the Examiner err in finding that the combination of
Yalamanchi and Burdick teach scheduling threads,
associated with ready set actions, by locking state variables
as recited in representative claim 1 ?
We note on pages 3 through 5 of the Reply Brief, Appellants argue for the
first time that the combination of the references does not teach the
concurrency of actions is controlled by a concurrency control mechanism.
Appellants have not shown good cause as to why these arguments could not
be presented earlier. As such, these arguments are waived and have not been
considered. See Ex parte Borden, 93 USPQ2d 1473, 1473—74 (BPAI
2010) (informative) (absent a showing of good cause, the Board is not
required to address arguments in Reply Brief that could have been presented
in the principal Appeal Brief); 37 C.F.R. § 41.41(b)(2).
ANALYSIS
We have reviewed Appellants’ arguments in the Appeal Brief and the
Reply Brief, the Examiner’s rejection, the Examiner’s response to
Appellants’ arguments, and the evidence of record. Appellants’ arguments
have not persuaded us of error in the Examiner’s rejection of independent
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Appeal 2016-003032
Application 12/327,771
claim 1 or claims 2, 3, 5 through 10, 12 through 17, 19, and 20 which are not
argued separately and thus grouped with claim 1.
Regarding the first issue, the Examiner finds that Burdick teaches an
executing thread can request a lock of shared data (state variable) and that
the lock grants the requesting thread exclusive access to the data. Answer 3
(citing Burdick, paras. 8, 13, 14, 74, and 82—87, and Figures 3 and 4);
accord Final Act. 4. We concur with the Examiner.
Contrary to Appellants’ argument that Burdick teaches locks that are
on memory that contain portions of code and not variables (Appeal Br. 12—
13), Burdick teaches the locks are used to provide a thread with exclusive
control of a shared memory location to which data can be read and written
(i.e. the memory contains variables). See Burdick paras. 7—8 (describing a
situation in which more than one thread can read and modify data in shared
memory and using locks to avoid such a situation); see also Spec. para. 32.
Accordingly, Appellants’ arguments directed to the first issue have not
persuaded us of error in the Examiner’s rejection.
Regarding the second issue, the Examiner finds that Burdick teaches
the limitation of scheduling execution of threads by locking one or more
state variables with its teaching that executing threads either gain possession
of a lock to shared data or are placed in a wait queue for threads waiting for
the release of a lock. Answer 3^4 (citing Burdick || 8, 13—14, 63—64, 74,
82—87). Appellants argue “Burdick selects threads [from the wait queue for
awakening] based on each thread’s priority level and sequence of arrival as
reflected in the wait queue,” “not by locking state variables as claimed.”
App. Br. 14. In other words, Appellants argue “[wjhereas Burdick selects a
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Appeal 2016-003032
Application 12/327,771
thread by releasing a lock, claim 1 schedules a ready set of actions by
locking one or more state variables.” App. Br. 14 (bolding omitted).
We disagree with Appellants and concur with the Examiner. As cited
by the Examiner, Burdick teaches that threads that require access to shared
data either gain possession of a lock or are placed in a wait queue. Answer
3^4 (citing Burdick || 8, 13—14, 63—64, 74, 82—87). Burdick teaches that
once a thread has acquired the lock on shared data, the thread is scheduled
and executed. While Burdick discloses additional scheduling considerations
such as thread priority (see Burdick | 60), nothing prohibits such additional
scheduling considerations from the scope of claim 1. Accordingly,
Appellants’ arguments directed to the second issue have not persuaded us of
error in the Examiner’s rejection and we sustain the Examiner’s rejection of
claims 1 through 3, 5 through 10, 12 through 17, 19, and 20.
DECISION
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(l)(iv).
AFFIRMED
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