Ex Parte Allen et al

Board of Patent Appeals and Interferences

Aug 9, 2011

11239597 (B.P.A.I. Aug. 9, 2011)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________
Ex parte KENNETH R. ALLEN, WILLIAM A. BROWN, RICHARD K.
KIRKMAN, and KENNETH C. VOSSEN
____________
Appeal 2009-011633
Application 11/239,5971
Technology Center 2100
____________

Before ALLEN R. MACDONALD, KRISTEN L. DROESCH, and
MICHAEL R. ZECHER, Administrative Patent Judges.

ZECHER, Administrative Patent Judge.

DECISION ON APPEAL

1 Filed on September 29, 2005. The real party in interest is International
Business Machines Corp. (Br. 1.)
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I. STATEMENT OF THE CASE
Appellants appeal under 35 U.S.C. § 134(a) (2002) from the
Examiner’s final rejection of claims 1 and 3-7. (Br. 2.) Claims 2 and 8-20
have been cancelled. (Id.) We have jurisdiction under 35 U.S.C. § 6(b)
(2008).
We affirm.

Appellants’ Invention
Appellants invented a method for allocating memory in a multi-node
computer. (Spec. 1, ll. 4-5.)
Illustrative Claim
1. A method for memory allocation in a multi-node
computer, the method comprising:

evaluating memory affinity among nodes;

wherein memory affinity comprises the level of
computer hardware separation between nodes containing
processors and memory;

wherein evaluating memory affinity among nodes
comprises assigning to nodes weighted coefficients of
memory affinity, each weighted coefficient representing
a desirability of allocating memory of a node to a
processor of a node; and

allocating memory in dependence upon the evaluations;

wherein allocating memory comprises allocating
memory in dependence upon the weighted coefficients of
memory affinity.

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Prior Art Relied Upon
Richardson US 6,249,802 B1 June 19, 2001
Hamilton II US 2004/0221121 A1 Nov. 4, 2004

Rejections on Appeal
The Examiner rejects claims 1 and 3-7 under 35 § U.S.C. 103(a) as
being unpatentable over the combination of Richardson and Hamilton II.
Appellants’ Contentions
Appellants contend that Hamilton II’s disclosure of using performance
parameters to reallocate memory in a logically partitioned environment does
not teach or fairly suggest “weighted coefficient[s] representing a
desirability of allocating memory of a node to a processor of a node,” as
recited independent claim 1. (Br. 5-6.) Appellant also argue that Hamilton
II’s disclosure of reallocating memory in a logically partitioned environment
amounts to allocating memory to components of a system that are not
physically separated. (Id. at 6.) Therefore, Appellants allege that since
Hamilton II does not disclose allocating memory among physically separate
nodes, Hamilton II cannot teach or fairly suggest measuring the “desirability
of allocating memory of a node to a processor of a node,” as claimed.
(Id. at 6-7.)
Further, Appellants allege that Richardson does not cure the noted
deficiencies of Hamilton. (Id. at 7.) In particular, Appellants contend that
Richardson discloses searching for a set of nodes that match a memory
configuration request, and assigning memory to available memory space in
the nodes based on such request. (Id.) Therefore, Appellants argue that
Richardson does not teach or fairly suggest “allocating memory of a node to
a processor of a node,” as claimed. (Id. at 7-8.) Appellants also maintain
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that Richardson’s disclosure of distributing memory space across a set of
nodes in accordance with a memory configuration request does not teach or
fairly suggest “allocating memory in dependence upon the evaluation,” as
claimed. (Id. at 8-9.)
Examiner’s Findings and Conclusions
The Examiner finds that Richardson’s disclosure of a physical
memory allocator searching for a set of nodes in a distributed shared
memory (hereinafter “DSM”) network that fulfill a configuration request, in
conjunction with Hamilton II’s disclosure of using performance parameters
to measure the workload of a memory block, teaches or fairly suggests
“evaluating memory affinity among nodes comprises assigning to nodes
weighted coefficients of memory affinity, each weighted coefficient
representing a desirability of allocating memory of a node to a processor of a
node,” as recited in independent claim 1. (Ans. 9-11, 14-15.) Moreover, the
Examiner finds that while independent claims 1 does not explicitly recite a
physical separation among the claimed “nodes,” Richardson’s disclosure of
nodes in a DSM network, each of which have processors and memory and
are physically separated by hardware, teaches or fairly suggests a level of
computer hardware separation between nodes. (Id. at 12-13.)
Further, the Examiner reiterates that Richardson’s disclosure of a
physical memory allocator searching for nodes in a DSM network that fulfill
a configuration request, in conjunction with Hamilton II’s disclosure of
using performance parameters to measure the workload of a memory block,
teaches or fairly suggests “allocating memory in dependence upon the
evaluation,” as claimed. (Id. at 16-17.)

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II. ISSUE
Have Appellants shown that the Examiner erred in concluding that the
combination of Richardson and Hamilton II renders independent claim 1
unpatentable? In particular, the issue turns on whether the proffered
combination teaches or fairly suggests the following claim limitations:
(a) “evaluating memory affinity among nodes comprises assigning
to nodes weighted coefficients of memory affinity, each weighted coefficient
representing a desirability of allocating memory of a node to a processor of a
node;” and
(b) “allocating memory in dependence upon the evaluations.”

III. FINDINGS OF FACT
The following Findings of Fact (hereinafter “FF”) are shown by a
preponderance of the evidence.
Richardson
FF 1. Richardson disclose a physical memory allocator that searches
for a set of nodes in a DSM network that fulfill a memory configuration
request based on a search of global geometry data. (Col. 2, ll. 1-4.)
Richardson discloses that the memory configuration request includes
parameters that define at least one of geometry or topology, memory
amount, and resource affinity. (Id. at ll. 4-6.) After a successful search,
Richardson discloses distributing physical memory address space across the
set of nodes in the DSM network in accordance with the memory
configuration request. (Id. at ll. 9-12.)
FF 2. Richardson’s figure 2A depicts a non-uniform memory access
computer system (220) that includes a plurality of processing nodes
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(204A-204C), each of which is physically distinct and separate from one
another. (Col. 5, ll. 56-60.)
Hamilton II
FF 3. Hamilton II discloses reallocating memory in a logically
partitioned environment. (¶ [0006].) In particular, Hamilton II discloses a
Reallocation Program (hereinafter “RP”) that compiles performance data for
the memory and calculates a composite parameter. (Id.)
FF 4. Hamilton II discloses that a performance parameter is one or
more parameters used to measure the workload on a memory block. (¶
[0019].) Hamilton II also discloses that performance parameters include
available memory, paging activity, pages in, or pages out. (Id.)

IV. ANALYSIS
Claim 1
Independent claim 1 recites, inter alia: 1) “evaluating memory
affinity among nodes comprises assigning to nodes weighted coefficients of
memory affinity, each weighted coefficient representing a desirability of
allocating memory of a node to a processor of a node;” and 2) “allocating
memory in dependence upon the evaluations.”
As detailed in the Findings of Fact section above, Richardson
discloses using a memory configuration request to search for a set of nodes
in a DSM network and, subsequently, allocate physical memory space across
the set of nodes based on such request. (FF 1.) In particular, Richardson
discloses that the memory configuration request includes parameters that
define resource affinity. (Id.) Further, Richardson discloses that the nodes
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in the DSM network are physically distinct and separate from one another.
(FF 2.)
We find that Richardson’s disclosure of using a memory configuration
request, which includes parameters that define resource affinity, to search
for a set of nodes in a DSM network amounts to evaluating the resource or
memory affinity among the nodes in a network. Moreover, we agree with
the Examiner that since Richardson discloses that the nodes within the DSM
network are physically distinct and separate from one another, there is a
level of computer hardware separation between each node. (Ans. 12-13.)
Next, Hamilton II discloses reallocating memory in a logically
partitioned environment by using an RP that compiles performance data for
memory and calculates a composite parameter. (FF 3.) In particular,
Hamilton II discloses using performance parameters, such as available
memory, paging activity, pages in, or pages out, to measure the workload on
a memory block. (FF 4.)
We find that Hamilton II’s cited disclosure teaches or fairly suggests
allocating memory in a logically partitioned environment based on the
assignment of performance parameters to individual memory blocks. In
particular, since Hamilton II’s performance parameters are indicative of the
portion of available memory space within an individual memory block, we
find that an ordinarily skilled artisan at the time of the claimed invention
would have understood that such performance parameters amount to
“weighted coefficient[s] representing a desirability of allocating memory of
a node to a processor of a node,” as claimed.
In summary, we find that an ordinarily skilled artisan at the time of
the claimed invention would have readily appreciated evaluating the
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memory affinity among Richardson’s nodes, each of which are separated by
a level of computer hardware, by assigning Hamilton II’s performance
parameters to the individual memory blocks located in each node. Thus, we
find that the combination of Richardson and Hamilton II teach or fairly
suggest “evaluating memory affinity among nodes comprises assigning to
nodes weighted coefficients of memory affinity, each weighted coefficient
representing a desirability of allocating memory of a node to a processor of a
node,” as recited in independent claim 1. Moreover, in accordance with
each evaluation, we find that an ordinarily skilled artisan at the time the
claimed invention would have understood allocating memory to the portion
of available memory space within the individual memory blocks located in
each of Richardson’s nodes. Thus, we find that the combination of
Richardson and Hamilton II also teach or fairly suggest “allocating memory
in dependence upon the evaluations,” as recited in independent claim 1. It
follows that Appellants have not shown that the Examiner erred in
concluding that the combination of Richardson and Hamilton II renders
independent claim 1 unpatentable.
Claims 3-7
Appellants do not provide separate and distinct arguments for
patentability with respect to dependent claims 3-7. Therefore, we select
independent claim 1 as representative of the cited claims. Consequently,
Appellants have not shown error in the Examiner's rejection of dependent
claims 3-7 for the same reasons set forth in our discussion of independent
claim 1. See 37 C.F.R. § 41.37(c)(1)(vii).

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V. CONCLUSION OF LAW
Appellants have not shown that the Examiner erred in rejecting claims
1 and 3-7 as being unpatentable under 35 U.S.C. § 103(a).

VI. DECISION
We affirm the Examiner’s decision to reject claims 1 and 3-7 as being
unpatentable under 35 U.S.C. § 103(a).
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

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