Ex Parte Aldana

Patent Trial and Appeal Board

Mar 29, 2013

11192493 (P.T.A.B. Mar. 29, 2013)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

Ex parte CARLOS H. ALDANA
____________

Appeal 2010-009893
Application 11/192,493
Technology Center 2600
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Before JOHN A. JEFFERY, MARC S. HOFF, and DANIEL N. FISHMAN,
Administrative Patent Judges.

FISHMAN, Administrative Patent Judge.

DECISION ON APPEAL
Appellant appeals under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1-19. Br. 41 We have jurisdiction under 35 U.S.C. § 6(b).
We affirm.

1 Throughout this opinion, we refer to (1) the Appeal Brief filed February
19, 2010 (“Br.”); (2) the Examiner’s Answer mailed April 9, 2010 (“Ans.”);
and (3) the Specification filed July 29, 2005 (“Spec.”).
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STATEMENT OF THE CASE
THE INVENTION
The invention generally provides a transmitter having two or more
transmit antennas and includes a bit parser for providing two or more data
streams to an interleaver of the transmitter. The bit parser receives bits
representing data to be transmitted over the transmit antennas, and parses the
bits into a number of data streams equal to a number of the transmit antennas
such that the bits are divided into bit groups, each bit group having no more
than two of the bits, and each of the data streams include non-adjacent ones
of the bit groups. See generally Abstract.
Claim 1 is illustrative with a key disputed term emphasized:
1. A bit parser connected to provide two or more data streams
to an interleaver of a transmitter having two or more transmit streams,
said bit parser comprising:
an input operably coupled to receive bits representing data to be
transmitted over the transmit antennas;
a processing device operable to parse the bits into a number of
data streams equal to a number of operating ones of the transmit
antennas such that the bits are divided into bit groups of consecutive
ones of the bits, each of the bit groups having no more than two of the
bits regardless of the type of modulation scheme, and each of the data
streams includes non-adjacent ones of the bit groups; and
an output operable to output the data streams to the interleaver.
THE REJECTIONS
The Examiner rejected claims 1-9 and 12-18 under 35 U.S.C.
§ 102(e) as anticipated by Wallace (US 2006/0187815 A1; published Aug.
24, 2006; filed Jan. 24, 2005). Ans. 3-10.
The Examiner rejected claims 10 and 19 under 35 U.S.C. § 103(a) as
unpatentable over Wallace and Ghosh (US 2006/0036924 A1; published
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Feb. 16, 2006; filed Aug. 12, 2005; claiming priority to Aug. 16, 2004). Ans.
10-11.
The Examiner rejected claim 11 under 35 U.S.C. § 103(a) as
unpatentable over Wallace and van Nee (US 2006/0002486 A1; published
Jan. 5, 2006; filed July 1, 2005). Ans. 11-12.
Appellant argues independent claims 1, 5, 12, and 15 and dependent
claims 2-4, 6-9, 13, 14, and 16-18 together. Br. 12-15. Appellant’s
arguments regarding dependent claims 10, 11, and 19 rely on the arguments
made for their base claims (claims 5 and 15). Br. 17. Accordingly, we will
discuss Appellant’s contentions by reference to claim 1.
THE CONTENTIONS
The Examiner finds that Wallace discloses every feature of
independent claim 1, specifically reading the recited input as encoder 210 of
Fig. 2, reading the processing device as parser 220 of Fig. 2 (citing ¶ [0065]
of Wallace), and reading the output as stream processors 230a through 230m
of Fig. 2. Ans. 3-4.
Appellant argues that Wallace does not show a processing device
operable (emphasis in original) “to parse the bits into a number of data
streams equal to a number of operating ones of the transmit antennas such
that the bits are divided into bit groups of consecutive ones of the bits, each
of the bit groups having no more than two of the bits regardless of the type
of modulation scheme, and each of the data streams includes non-adjacent
ones of the bit groups.” Br. 12.
ISSUE
Has the Examiner erred in finding that Wallace teaches a processor
device operable “to parse the bits into a number of data streams equal to a
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number of operating ones of the transmit antennas such that the bits are
divided into bit groups of consecutive ones of the bits, each of the bit groups
having no more than two of the bits regardless of the type of modulation
scheme, and each of the data streams includes non-adjacent ones of the bit
groups”?
ANALYSIS
THE § 102 REJECTION
The Examiner finds that Wallace shows all elements of claim 1
including a processor device that distributes bits to multiple streams as
claimed. Appellant does not dispute the Examiner’s finding of the claimed
input and output in Wallace. Specifically, the Examiner finds that Wallace
shows:
a processing device (see figure 2, Parser 220) operable to parse
the bits into a number of data streams equal to a number of
operating ones of the transmit antennas such that the bits are
divided into bit groups of consecutive ones of the bits, each of
the bit groups having no more than two of the bits regardless of
the type of modulation scheme, and each of the data streams
includes non-adjacent ones of the bit groups (see, ¶ [0065];
“Parser 220 may also distribute the code bits form encoder 210
to the M streams, one code bit at a time....”)
Ans. 3-4. In other words, the Examiner finds that ¶ 0065 of Wallace shows
that bits are distributed to streams one bit at a time such that each bit is a bit
group and thus each bit group has “no more than two of the bits.”
Appellant argues (emphasis added) that “the cited passage (paragraph
[0065]) of Wallace describes how to distribute the bits to the different bit
streams, not how to divide the bits into bit groups of consecutive bits on each
bit stream.” Br. 12. Appellant further argues that Wallace shows only
parsing bits one bit at a time whereas the number of consecutive bits
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distributed to each stream varies based on the modulation scheme utilized
for each stream.2 Br. 13-15. Appellant also argues in reference to Wallace ¶
0065 that “[I]t simply means that the bit parser handles each bit
individually… it is clear that the number of consecutive bits placed onto
each data stream does vary based on the modulation scheme.” Br. 13.
Appellant concludes:
Therefore, in Wallace, regardless of whether the bit
parser parses the bits individually or in puncture cycles, the bits
are divided into bit groups of consecutive bits, whose number is
dependent upon the modulation scheme used. By contrast, in
the presently claimed invention, the bit parser parses the bits
such that no more than two consecutive bits are placed into any
bit group regardless of the type of modulation scheme
employed. This is not shown or suggested in Wallace.
Br. 15. We are not persuaded by Appellant’s argument.
The Examiner explains (with reference to Appellant’s Fig. 5) that
claim 1 encompasses an embodiment where each bit group consists of a
single bit and that:
In such an instance, bit parser 212 would divide the outbound
data bits 94 into bit groups where b0 is a first bit group, b1 is a
second bit group, and so on. Bit parser 212 would then
distribute the bit groups, which in this case each comprise a
single bit, to the data streams 320-324 such that adjacent bit
groups (e.g., b0 and b1) are not placed on the same data stream.

2 We note that claim 1 recites that “the bits are divided into bit groups of
consecutive ones of the bits” (emphasis added) suggesting that a bit group is
to be construed as having multiple bits (i.e., a plurality of bits to constitute
“consecutive ones”). However, the language of claim 1 makes clear that a bit
group could consist of only a single bit (i.e., “no more than two of the bits”)
and claim 2 explicitly confirms that a bit group may have a single bit.
Appellant does not dispute that a bit group could consist of a single bit.
Thus, we construe “bit group” to consist of either single bit of a stream or
two consecutive bits of a stream.
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For example, b0 could be placed on data stream 320, b1 could be
placed on data stream 322, b2c [b2 could] be placed on data
stream 324, b3 could be placed on data stream 320, and so on.
Ans. 15. We agree and find that Wallace teaches that bits are divided into bit
groups of consecutive ones of the bits, each of the bit groups having no more
than two of the bits (e.g., bit groups each consisting of a single bit).
Regarding Appellant’s argument that the number of bits per bit group
in Wallace depends on the modulation mode of each stream, the Examiner
finds that the selected mode (i.e., selected modulation scheme) determines
the total number of bits to be placed (distributed) to a data stream—not the
number of consecutive bits in each bit group. Ans. 16. The Examiner
discusses various exemplary embodiments shown in Wallace (Ans. 16-19)
and concludes (emphasis added):
Parsing on a per code bit basis (instead of per puncture cycle
basis) may provide good performance under certain
circumstances (e.g., if the same code rate is used for all streams
(¶ [0065, lines 12-18). The modulation scheme of each stream
has no bearing on the number of consecutive bits parsed to the
data streams (one bit at a time). The modulation scheme affects
the total number of bits that are ultimately placed in the data
stream.
Ans. 19. Thus, the Examiner concludes that: “Wallace discloses a processing
device operable to "parse the bits into a number of data streams equal to a
number of operating ones of the transmit antennas such that the bits are
divided into bit groups of consecutive ones of the bits, each of the bit groups
having no more than two of the bits regardless of the type of modulation
scheme, and each of the data streams includes non-adjacent ones of the bit
groups." Ans. 19. We agree and find that the modulation scheme of Wallace
has no bearing on the number of bits in each bit group and hence we find
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that Wallace shows dividing the bits into bit groups of one or two bits
“regardless of the type of modulation scheme.”
The Examiner’s positions as recited in the Answer stand unrebutted in
that Appellant did not file a Reply Brief. In view of the above discussion, we
conclude that Wallace teaches all elements of claim 1 including a processor
device operable “to parse the bits into a number of data streams equal to a
number of operating ones of the transmit antennas such that the bits are
divided into bit groups of consecutive ones of the bits, each of the bit groups
having no more than two of the bits regardless of the type of modulation
scheme, and each of the data streams includes non-adjacent ones of the bit
groups.”
We are not persuaded that the Examiner erred in rejecting claim 1 and
claims 2-9 and 12-18 not separately argued with particularity. Br. 15. We
therefore sustain the rejection of claims 1-9 and 12-18 under § 102.
THE § 103 REJECTIONS
The Examiner rejected claims 10, 11, and 19 applying Wallace as in
claim 1 in combination with other references for the specific additional
recitations of each claim. Ans. 10-12. Appellant argues only that these
claims are allowable as dependent from their respective base claims. Br. 17.
We therefore are not persuaded of error for the same reasons expressed
above with respect to claim 1 and we sustain the rejections under § 103.

ORDER
The Examiner’s decision rejecting claims 1-19 is affirmed.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1) (2010).
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AFFIRMED

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