Ex Parte Akram

Board of Patent Appeals and Interferences

Mar 26, 2012

10292155 (B.P.A.I. Mar. 26, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________________

Ex parte SALMAN AKRAM
____________________

Appeal 2010-000184
Application 10/292,1551
Technology Center 2800
____________________

Before JOSEPH L. DIXON, LANCE LEONARD BARRY, and
JAMES R. HUGHES, Administrative Patent Judges.

HUGHES, Administrative Patent Judge.

DECISION ON APPEAL

STATEMENT OF THE CASE
Appellant appeals from the Examiner’s rejection of claims 21-24 and
26-32. Claims 1-20, 25, and 58-65 have been canceled. Claims 38-57 have
been withdrawn. Claims 33-37 have been indicated as containing allowable
subject matter. We have jurisdiction under 35 U.S.C. § 6(b).

1 Application filed November 11, 2002. The real party in interest is Micron
Technology, Inc. (App. Br. 2.)
Appeal 2010-000184
Application 10/292,155

2

We affirm.
Appellant’s Invention
The invention at issue on appeal concerns a method for assembling a
chip-scale package including a semiconductor interposer. (Spec. ¶¶ [0008]-
[0009]; Abstract.)2
Representative Claim
Independent claim 21, reproduced below with the key disputed
limitations emphasized, further illustrates the invention:
21. A method for assembling a chip-scale package,
comprising:
providing a semiconductor device having an active
surface and having at least one bond pad on the active surface;
positioning an interposer comprising a semiconductive
material over the active surface;
after positioning the interposer over the active surface,
introducing conductive material into at least one aperture
formed through the interposer and aligned over the at least one
bond pad; and
bonding the conductive material to the at least one bond
pad.
Rejections on Appeal
1. The Examiner rejects claims 21, 22, 28, and 29 under 35 U.S.C.
§ 103(a) as being unpatentable over U.S. Patent No. 6,392,296 B1 issued
May 21, 2002 (“Ahn”).

2 We refer to Appellant’s Specification (“Spec.”); Appeal Brief (“App. Br.”)
filed February 17, 2009; and Reply Brief (“Reply Br.”) filed June 29, 2009.
We also refer to the Examiner’s Answer (“Ans.”) mailed April 29, 2009.
Appeal 2010-000184
Application 10/292,155

3

2. The Examiner rejects claims 21-24 and 26-30 under 35 U.S.C.
§ 103(a) as being unpatentable over the combination of U.S. Patent No.
5,946,555 issued Aug. 31, 1999 (“Crumly”) and Ahn.
3. The Examiner rejects claims 21, 22, and 28-32 under 35 U.S.C.
§ 103(a) as being unpatentable over the combination of U.S. Patent No.
6,458,623 B1 issued Oct. 1, 2002 (“Goldmann”) and Ahn.
4. The Examiner rejects claims 23, 24, 26, and 27 under 35 U.S.C.
§ 103(a) as being unpatentable over the combination of Goldmann, Ahn, and
U.S. Patent No. 6,440,771 B1 issued Aug.27, 2002 (“Pierce”).

ISSUES
Based on our review of the administrative record, Appellant’s
contentions, and the Examiner’s findings and conclusions, the pivotal issues
before us are as follows:
1. Does the Examiner err in concluding that Goldmann in
combination with Ahn would have collectively taught or fairly suggested:
positioning an interposer comprising a semiconductive
material over the active surface;
after positioning the interposer over the active surface,
introducing conductive material into at least one aperture
formed through the interposer and aligned over the at least one
bond pad; and
bonding the conductive material to the at least one bond
pad
as recited in claim 21?
2. Does the Examiner err in concluding that the combination of
Goldmann, Ahn, and Pierce would have collectively taught or fairly
suggested “providing the semiconductor device comprises providing a large-
Appeal 2010-000184
Application 10/292,155

4

scale substrate having a plurality of semiconductor devices formed thereon”
as recited in claim 23?
FINDINGS OF FACT
We adopt the Examiner’s findings in the Answer and Final Office
Action as our own, except as to those findings that we expressly overturn or
set aside in the Analysis that follows.

ANALYSIS
Appellant argues independent claim 21 together with dependent
claims 22 and 28-32 as a group based on claim 21. (App. Br. 9-10; see id. at
7-8.) Appellant also argues dependent claims 23, 24, 26, and 27 together as
a group. (Id. at 10-11.) Therefore, we select claims 21 and 23 as
representative of Appellant’s arguments and groupings. 37 C.F.R.
§ 41.37(c)(1)(vii). See In re Nielson, 816 F.2d 1567, 1572 (Fed. Cir. 1987).
We consider only those arguments that Appellant has actually raised in the
Briefs. Arguments that Appellant could have made but chose not to make in
the Briefs have not been considered and are deemed to be waived. See 37
C.F.R. § 41.37(c)(1)(vii).
Appellant has the opportunity on appeal to the BPAI to demonstrate
error in the Examiner’s position. See In re Kahn, 441 F.3d 977, 985-86
(Fed. Cir. 2006) (citing In re Rouffet, 149 F.3d 1350, 1355 (Fed. Cir. 1998)).
The Examiner sets forth a detailed explanation of the obviousness rejections
in the Examiner’s Answer with respect to each of the claims (Ans. 3-15)
and, in particular, claim 21 (id. at 7-8, 12-13; see also id. at 3) and claim 23
(id. at 9, 13-15). Therefore, we look to the Appellant’s Briefs to show error
in the proffered findings and conclusions. See Kahn, 441 F.3d at 985-86.
Appeal 2010-000184
Application 10/292,155

5

The Rejection of Claim 21 Over Goldmann & Ahn
The Examiner rejects Appellant’s independent claim 21 as being
obvious over the combination of Goldmann and Ahn. (Ans. 7-8, 12-13; see
also id. at 3.) Specifically, the Examiner submits that Goldmann teaches: a
semiconductor device (e.g., element 20) which has an active surface and at
least one bond pad (the “connection contact array”) (Ans. 7 (citing col. 9, ll.
38-45; Fig. 3)); an interposer (e.g., element 10) that may be positioned over
the active surface (id. at 7; Fig. 3); introducing conductive material (e.g.,
element 30) into at least one aperture (element 14) formed through the
interposer after positioning the interposer over the active surface and
aligning it over the at least one bond pad (id. at 7 (citing col. 9, ll. 38-64;
Fig. 3)); and bonding said conductive material (30) to said at least one bond
pad (id.). The Examiner further submits that Ahn teaches an interposer
(element 110) formed of a semiconductor material (silicon) (Ans. 7-8 (citing
col. 1, ll. 60-67; cols. 3-8 (generally) and Figs. 1 and 3).) The Examiner also
provides a rationale for combining Goldmann and Ahn – “to prevent . . .
coefficient of expansion mismatches between the semiconductor device and
the interposer.” (Ans. 8.)
Appellant does not dispute the Examiner’s findings with respect to
Goldmann and Ahn. (App. Br. 9-10; Reply Br. 5.) Rather, Appellant
confines the arguments to the combinability of Goldmann and Ahn, arguing
“that one of ordinary skill in the art wouldn’t have found any ‘apparent
reason’ to combine teachings from Ahn with Goldmann” because “ the
‘interposers’ of Goldmann and the ‘interposers’ of Ahn are . . . very different
from each other.” (App. Br. 10.)
Appeal 2010-000184
Application 10/292,155

6

Upon consideration of the evidence on this record and each of
Appellant’s contentions, we find that the preponderance of evidence on this
record supports the Examiner’s conclusion that the subject matter of
Appellant’s claim 21 is unpatentable over the combination of Goldmann and
Ahn. Accordingly, we sustain the Examiner’s rejection of claim 21 for the
reasons set forth in the Answer, which we incorporate herein by reference.
(Ans. 3, 7-8, 12-13.)
As explained by the Examiner, Goldman describes each feature of
Appellant’s claim, except for “an interposer comprising a semiconductive
material” (claim 21). (Ans. 7-8, 12-13) As further explained by the
Examiner, Ahn discloses a silicon (semiconductive material) interposer. (Id.
at 8; see id. at 3.) We agree with the combination of Goldmann and Ahn
teaches each feature of Appellant’s claim.
We also agree with the Examiner that Goldmann and Ahn are
properly combinable. Goldmann and Ahn are analogous art, in that each
reference teaches an electronic packaging assembly including an interposer
(Goldmann, Abstract (“insulating polymer matrix”); Ahn, Abstract
(“interposer”)). The Examiner also provides a rationale for combining
Goldmann and Ahn. (Ans. 8.) We find the Examiner’s articulated rationale
“to prevent . . . coefficient of expansion mismatches between the
semiconductor device and the interposer” (Ans. 8) – i.e., improved
efficiency and functionality – is based on “some rational underpinning to
support the legal conclusion of obviousness.” KSR Int’l Co. v. Teleflex Inc.,
550 U.S. 398, 418 (2007) (quoting Kahn, 441 F.3d at 988). Further,
combining Ahn’s teaching of silicon interposer with Goldmann’s chip
packaging is tantamount to the predictable use of prior art elements and
Appeal 2010-000184
Application 10/292,155

7

techniques according to their established functions – an obvious
improvement. See KSR, 550 U.S. at 417. Accordingly, we conclude, as did
the Examiner, that the combination of Goldmann and Ahn would have
taught or fairly suggested the disputed features of representative claim 21.
Thus, we find Appellant’s contrary arguments unpersuasive of error in
the Examiner’s rejection for the reasons explained above. It follows that
Appellant does not persuade us of error in the Examiner’s obviousness
rejection of representative claim 21. Appellant also does not persuade us of
error in the Examiner’s obviousness rejection of dependent claims 22 and
28-32 not separately argued with particularity (supra). Accordingly, we
affirm the Examiner’s obviousness rejection of claims 21, 22, and 28-32.
The Rejection of Claim 23 Over Goldmann, Ahn, & Pierce
The Examiner rejects Appellant’s dependent claim 23 as being
obvious over the combination of Goldmann, Ahn, and Pierce. (Ans. 9, 13-
15.) Specifically, the Examiner submits that Goldmann and Ahn teach the
features of claim 21 (supra) and Pierce describes a semiconductor device
comprising a large-scale substrate (element 100 (“wafer”)) with multiple
semiconductor devices formed thereon, as well as an interposer (element 260
(“no-flow underfill”)) disposed adjacent to the semiconductor device. (Ans.
9, 13-15 (citing Pierce, col. 3, generally; Figs. 1 and 2).)
As with claim 21 (supra), Appellant does not dispute the Examiner’s
findings with respect to the references (Goldmann, Ahn, and Pierce). (App.
Br. 10-11.) Rather, Appellant confines the arguments to the combinability
of Goldmann, Ahn, and Pierce, arguing “that Pierce, which teaches a
temporary, wafer-scale test interposer (see, e.g., Abstract; Summary), does
not provide the ‘apparent reason’ that is missing from the asserted
Appeal 2010-000184
Application 10/292,155

8

combination of teachings from Goldmann and Ahn” because the references
describe “such different structures that serve purposes that are so diverse
from one another that the only possible source of motivation to combine
teachings from these references in the asserted manner would have been
improper reliance upon the disclosure and claims.” (App. Br. 10-11.)
Upon consideration of the evidence on this record and each of
Appellant’s contentions, we find that the preponderance of evidence on this
record supports the Examiner’s conclusion that the subject matter of
Appellant’s claim 23 is unpatentable over the combination of Goldmann,
Ahn, and Pierce. Accordingly, we sustain the Examiner’s rejection of claim
23 for the reasons set forth in the Answer, which we incorporate herein by
reference. (Ans. 9, 13-15.)
Goldman and Ahn describe each feature of Appellant’s claim (supra),
except for “providing a large-scale substrate having a plurality of
semiconductor devices formed thereon” (claim 23). As explained by the
Examiner, “it would have been obvious to those skilled in the art to form the
large-scale substrate (wafer) as taught by Pierce into the process of Goldman
. . . [and] Ahn to reduce production time and materials.” (Ans. 9.) We
agree.
As with Goldmann and Ahn (supra), Pierce is analogous art, in that it
teaches chip packaging (“die packaging”) including an interposer
(“interposer substrate”) (Pierce, Abstract). The Examiner also provides a
rationale for combining Pierce with Goldmann and Ahn. (Ans. 9.) We find
the Examiner’s articulated rationale “to reduce production time and
materials” (Ans. 9) – i.e., improved efficiency and functionality – is based
on “some rational underpinning to support the legal conclusion of
Appeal 2010-000184
Application 10/292,155

9

obviousness.” KSR, 550 U.S. at 418. We further find combining Pierce’s
teaching of a large-scale substrate (wafer) with the process of chip
packaging taught by Goldmann and Ahn is tantamount to the predictable use
of prior art elements and techniques according to their established functions
– an obvious improvement. See KSR, 550 U.S. at 417. Accordingly, we
conclude, as did the Examiner, that the combination of Goldmann, Ahn, and
Pierce would have taught or fairly suggested the disputed features of
representative claim 23.
Thus, we find Appellant’s contrary arguments unpersuasive of error in
the Examiner’s rejection for the reasons explained above. It follows that
Appellant does not persuade us of error in the Examiner’s obviousness
rejection of representative claim 23. Appellant also does not persuade us of
error in the Examiner’s obviousness rejection of claims 24, 26, and 27 not
separately argued with particularity (supra). Accordingly, we affirm the
Examiner’s obviousness rejection of claims 23, 24, 26, and 27.

CONCLUSION OF LAW
Appellant has not shown that the Examiner erred in rejecting claims
21-24 and 26-32 under 35 U.S.C. § 103(a).

DECISION
We affirm the Examiner’s rejection of claims 21-24 and 26-32 under
35 U.S.C. § 103(a).3

3 We need not specifically address the Examiner’s rejections of claims 21,
22, 28, and 29 with respect to Ahn or the Examiner’s rejection of claims 21,

Appeal 2010-000184
Application 10/292,155

10

No time period for taking any subsequent action in connection with this
appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv).

AFFIRMED

peb

22, and 28-32 with respect to Crumly and Ahn. “The affirmance of the
rejection of a claim on any of the grounds specified constitutes a general
affirmance of the decision of the examiner on that claim, except as to any
ground specifically reversed.” 37 C.F.R. § 41.50(a)(1).