Ex Parte 6366130 et al

Patent Trial and Appeal Board

Mar 26, 2014

95000657 (P.T.A.B. Mar. 26, 2014)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
95/000,657 01/19/2012 6366130 19968-0006RX1 8472
74642 7590 03/27/2014
CLIFFORD H. KRAFT
320 ROBIN HILL DR.
NAPERVILLE, IL 60540
EXAMINER
HUGHES, DEANDRA M
ART UNIT PAPER NUMBER
3992
MAIL DATE DELIVERY MODE
03/27/2014 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________

SK HYNIX SEMICONDUCTOR INC.
Requester

v.

ELBRUS INTERNATIONAL, LIMITED and exclusive licensee:
CASCADES COMPUTER INNOVATION, LLC.
Patent Owner
____________

Appeal 2014-000434
Reexamination Control No. 95/000,657
Patent 6,366,130 B1
Technology Center 3900
____________

Before RICHARD M. LEBOVITZ, DAVID M. KOHUT, and
ANDREW J. DILLON, Administrative Patent Judges.

KOHUT, Administrative Patent Judge

DECISION ON APPEAL
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Requester filed a withdrawal of appeal on January 7, 2014 after the
parties reached a settlement. The oral hearing scheduled for May 5, 2014
was waived by Patent Owner on January 24, 2014 and Patent Owner
requested that the cross-appeal be decided on the briefs. Thus, this is a
decision on the cross-appeal by the Patent Owner of the Examiner’s decision
to reject claims 9-11. Even though Third Party Requester, SK Hynix
Semiconductor Inc., withdrew their appeal, we will address the Examiner’s
decision not to reject claim 12 under 35 U.S.C. § 112(a). The Board’s
jurisdiction for this appeal is under 35 U.S.C. §§ 6(b), 134, and 315.
We affirm-in-part.

STATEMENT OF THE CASE
This proceeding arose from a request by SK Hynix Semiconductor
Inc. for an inter partes reexamination of U.S. Patent 6,366,130 B1, titled
“High Speed Low Power Data Transfer Scheme,” and issued to
Podlesny et al. on April 2, 2002 (the “’130 patent”).
The ’130 patent describes a data transfer arrangement circuit that uses
low power and operates at a high speed.
Claims 9-12 on appeal were added during reexamination and are
dependent upon claim 1 which reads as follows:
1. A data transfer arrangement comprising:
two bus drivers;
a voltage precharge source;
a differential bus coupled to the bus drivers and to
the voltgage precharge source;
a latching sense amplifier coupled to the
differential bus;
wherein the latching sense amplifier comprises:
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a first stage including a cross-coupled latch
coupled to a differential data bus;
an output stage coupled to an output of said first
stage;
wherein the output of the first stage is coupled to
an input of the output stage;
wherein the differential bus and the differential
data bus are precharge[d] to a voltage Vpr between Vdd
and ground, where Vpr=K*Vdd, and K is a precharging
voltage factor.

Patent Owner appeals the Examiner’s adoption of the following
rejection of claims 9-11 under 35 U.S.C. § 112(a) or 35 U.S.C. § 112, first
paragraph (pre-AIA), as failing to comply with the written description
requirement.
Third Party Requester appealed the Examiner’s determination (1) not
to adopt Requester’s proposed rejection of claims 1,2, and 5-7 as anticipated
by European Patent Publication No 0 597 231; and (2) not to adopt
Requester’s proposed rejection of claim 12 as failing to comply with the
written description and enablement requirement of 35 U.S.C. § 112, first and
second paragraphs. Since Requester withdrew the Appeal, we shall not
consider Ground 1). However, we shall address proposed rejection 2).

ISSUES
Did the Examiner err in finding that newly added claims 9-11 fail to
comply with the written description requirement set forth by 35 U.S.C.
§ 112(a) or 35 U.S.C. § 112, first paragraph (pre-AIA)?
Did the Examiner err in failing to adopt Requester’s proposed
rejection claim 12 under 35 U.S.C. § 112?
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ANALYSIS

During reexamination, Patent Owner added claims 9-12 and alleged
support for these claims could be found in Figures 1 and 2 and various parts
of the Specification.
1
The Examiner, in both the Action Closing Prosecution
(ACP), mailed Jan. 23, 2013, and the Right of Appeal Notice (RAN), mailed
April 5, 2013, disagreed and rejected claims 9-11 under 35 U.S.C. § 112(a)
or 35 U.S.C. § 112, first paragraph (ACP 6-8; RAN 3-4), while finding
claim 12 to be patentable (ACP 8; RAN 5).
Title 35 U.S.C. § 112 requires a patentee to provide a written
description that allows a person of skill in the art to recognize that the
patentee invented what is claimed. Ariad Pharms., Inc. v. Eli Lilly & Co.,
598 F.3d 1336, 1351 (Fed. Cir. 2010) (en banc). To that end, to satisfy the
written description requirement, the inventor “must . . . convey with
reasonable clarity to those skilled in the art that, as of the filing date sought,
he or she was in possession of the invention.” Vas-Cath Inc. v. Mahurkar,
935 F.2d 1555, 1563-64 (Fed. Cir. 1991).
Claim 9 recites “[t]he data transfer arrangement of claim 1 wherein
the differential bus is precharged to a different voltage than the differential
data bus.” Patent Owner contends that Figure 1 and column 2, lines 19-21
of the ’130 Patent, show that the differential bus (LT/LC) is precharged to a
voltage Vpr while Figure 2 and column 2, lines 55-56, of the ’130 Patent,
show that the differential data bus is precharged to a voltage Vdd, where

1
Response to Non-Final Office Action and Amendment, filed May 1, 2012,
2 (hereinafter Resp. Non-Final).
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Vdd is different than Vpr. Resp. Non-Final 4. While the Examiner agrees
that the differential bus is precharged to the voltage Vpr, the Examiner
disagrees that the Figures and the Specification show that the differential
data bus is precharged to a different voltage than the differential data bus
because “the value of Vpr with respect to Vdd is not disclosed.” RAN 3.
In response to the Examiner, Patent Owner argues that it is clear from
the Specification that Vpr can be different than Vdd because column 2,
lines 25-28, states that Vdd-Vt can be more positive than Vpr. PO App.
Br. 5. Additionally, Patent Owner cites to column 3, line 24, which
indicates the following formula: “Vpr=K*Vdd, where K=1/3 for the ideal
MOS model.” PO App. Br. 5. Thus, Patent Owner contends that Vpr is less
than, and different, than Vdd. PO App. Br. 5.
On page 3 of the Patent Owner’s Appeal Brief, Patent Owner
indicates that the differential data bus is described as being segments N3 to
N6 and N2 to N8 shown in Figure 2 of the ’130 Patent. See also 3PR Resp.
Br. 3. As a result, Requester argues that Patent Owner misinterpreted the
’130 Patent as indicating that the differential data bus is precharged to Vdd.
3PR Resp. Br. 3. First, Requester argues that in the precharge phase,
transistor P1 is not activated and the segments indicated above are, therefore,
not coupled to Vdd. 3PR Resp. Br. 3. Second, Requester argues that the
section of the ’130 Patent cited to by Patent Owner for support regarding
precharging the differential data bus (col. 2, ll. 55-56), while discussing
precharging to Vdd, applies to output nodes QT and QC and not to the
differential data bus. 3PR Resp. Br. 3-4. Lastly, Requester points to both
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parties’ experts who each indicate that QT and QC are precharged to Vdd,
not the differential data bus. 3PR Resp. Br. 4.
We agree with Requester and the Examiner that the ’130 Patent does
not provide adequate written description for newly added claim 9. While
one of ordinary skill in the art might use the disclosure to figure out a way to
precharge the indicated differential data bus to a voltage that is different than
the differential bus, a description which renders obvious a claimed invention
is not sufficient to satisfy the written description requirement of that
invention. Lockwood v. American Airlines, Inc., 107 F.3d 1565, 1572
(1997). Thus, the rejection of claim 9 as lacking written descriptive support
in the ’130 Patent is affirmed.
Claim 10 recites “[t]he data transfer arrangement of claim 1 wherein
the output stage includes cross-coupled feedback.” Patent Owner contends
that Figure 2 of the ’130 Patent provides a written description for this claim.
Resp. Non-Final 4. However, the Examiner finds that Figure 2 does not
describe “feedback.” RAN 4. In response, Patent Owner contends that one
of ordinary skill in the art knows that a “feedback [loop] is the description of
a loop in the topography of a circuit where, in addition to its input being
connected to its output, its output is also connected to its input via a different
path.” PO App. Br. 6. Patent Owner argues that the aforementioned
configuration is shown in Figure 2 where the output of QT is connected to
the gate of P5 and the output of P5 is tied to the input of P6 and the output of
P6 is tied to the input of P5. PO App. Br. 7. Patent Owner also provides
expert testimony by Dr. Philip Koopman that the setup found in Figure 2 is
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designed as a cross-coupled feedback loop. PO App. Br. 7; see also
Koopman Decl. ¶ [0020].
Requester provides several modes of operation of the circuit in
Figure 2 that Requester argues proves the circuit lacks an output stage
feedback loop. 3PR Resp. Br. 5-8. However, we do not find this evidence
to be persuasive that a cross-coupled feedback loop does not exist, especially
in light of the fact that Requester does not argue that Patent Owner’s
definition of cross-coupled feedback is in error or that the circuit is not set
up in a cross-coupled feedback loop configuration. Additionally, we
disagree with the Examiner that “feedback” is not described by the Figure.
While Patent Owner’s Specification might not make mention of the term, we
agree with Patent Owner that one of ordinary skill in the art would know
what a feedback circuit looks like and that one is disclosed by Figure 2. As
such, we cannot sustain the Examiner’s rejection of claim 10.
Claim 11 recites “[t]he data transfer arrangement of claim 1 wherein
the differential bus is precharged on a different clock phase than the
differential data bus.” We affirm the Examiner’s rejection of claim 11
because, as indicated above, we agree with the Examiner and Requester that
the ’130 Patent lacks support regarding precharging the differential data bus.

Third Party Appeal
Claim 12 recites “[t]he data arrangement of claim 1 wherein the
differential bus and the differential data bus are separate circuits.” Patent
Owner argues that support for this limitation is found in Figures 1 and 2,
wherein the differential bus and the differential data bus are shown and
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described as parts of two separate circuits. PO Resp. Br. 11-12. The
Examiner agrees and indicates the claim as allowable. RAN 4-5. Requester,
however, contends that the ’130 Patent does not describe differential bus or
differential data bus as circuits themselves, one of ordinary skill in the art
would know that a bus is not a circuit in and of itself, and there is nothing in
the ’130 Patent that describes the buses as being separate circuits.. 3PR
App. Br. 21. We agree with Requester’s reasoning. We also agree with
Requester that claim 12 should have been rejected for lacking enablement
since a circuit requires something more than just wires. 3PR App. Br. 21.
As such, we reverse the Examiner’s decision not to adopt the proposed
rejection of claim 12 under 35 U.S.C. § 112 (a) or 35 U.S.C. § 112, first
paragraph (pre-AIA) for lacking written description and enablement. A
reversal of an Examiner’s decision not to adopt a rejection is a new ground
of rejection.

CONCLUSION
The Examiner did not err in finding that newly added claims 9 and 11
fail to comply with the written description requirement set forth by
35 U.S.C. § 112(a) or 35 U.S.C. § 112, first paragraph (pre-AIA).
The Examiner erred in finding that newly added claim 10 fails to
comply with the written description requirement set forth by 35 U.S.C.
§ 112(a) or 35 U.S.C. § 112, first paragraph (pre-AIA).
The Examiner erred in in failing to adopt Requester’s proposed
rejection of claim 12 under 35 U.S.C. § 112
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DECISION
We affirm the Examiner’s decision to reject claims 9 and 11 under
35 U.S.C. § 112(a) or 35 U.S.C. § 112, first paragraph (pre-AIA).
We reverse the Examiner’s decision to reject claim 10 under
35 U.S.C. § 112(a) or 35 U.S.C. § 112, first paragraph (pre-AIA).
We reverse the Examiner’s decision not to adopt the proposed
rejection of claim 12 under 35 U.S.C. § 112(a) or 35 U.S.C. § 112, first
paragraph (pre-AIA).
The decision contains new grounds of rejection pursuant to 37 C.F.R.
§ 41.77(b). Section 41.77(b) provides that “a new ground of rejection . . .
shall not be considered final for judicial review.” That section also provides
that Patent Owner, WITHIN ONE MONTH FROM THE DATE OF THE
DECISION, must exercise one of the following two options with respect to
the new grounds of rejection to avoid termination of the appeal proceeding
as to the rejected claims:
(1) Reopen prosecution. The owner may file a response
requesting reopening of prosecution before the examiner. Such a
response must be either an amendment of the claims so rejected
or new evidence relating to the claims so rejected, or both.

(2) Request rehearing. The owner may request that
the proceeding be reheard under § 41.79 by the Board
upon the same record. The request for rehearing must
address any new ground of rejection and state with
particularity the points believed to have been
misapprehended or overlooked in entering the new
ground of rejection and also state all other grounds
upon which rehearing is sought.

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In accordance with 37 C.F.R. § 41.79(a)(1), the “[p]arties to the
appeal may file a request for rehearing of the decision within one month of
the date of: . . . [t]he original decision of the Board under § 41.77(a).” A
request for rehearing must be in compliance with 37 C.F.R. § 41.79(b).
Comments in opposition to the request and additional requests for rehearing
must be in accordance with 37 C.F.R. § 41.79(c), respectively. Under 37
C.F.R. § 41.79(e), the times for requesting rehearing under paragraph (a) of
this section, for requesting further rehearing under paragraph (c) of this
section, and for submitting comments under paragraph (b) of this section
may not be extended.
An appeal to the United States Court of Appeals for the Federal
Circuit under 35 U.S.C. §§ 141-144 and 315 and 37 C.F.R. § 1.983 for an
inter partes reexamination proceeding “commenced” on or after November
2, 2002 may not be taken “until all parties' rights to request rehearing have
been exhausted, at which time the decision of the Board is final and
appealable by any party to the appeal to the Board.” 37 C.F.R. § 41.81. See
also MPEP § 2682 (8th ed., Rev. 7, July 2008).
Requests for extensions of time in this inter partes reexamination
proceeding are governed by 37 C.F.R. § 1.956. See 37 C.F.R. § 41.79.

AFFIRMED-IN-PART
37 C.F.R. § 41.77(b)

ak

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Patent Owner:

Clifford H. Kraft
320 Robin Hill Dr.
Naperville, IL 60540

Third Party Requester:

Fish & Richardson P.C. (DC)
P.O. Box 1022
Minneapolis, MN 55440-1022