Ex Parte 6009488 et al

Board of Patent Appeals and Interferences

Jun 6, 2012

90009376 (B.P.A.I. Jun. 6, 2012)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
90/009,376 12/23/2008 6009488 0298-0001.06 6130
70653 7590 06/06/2012
LAW OFFICES OF EUGENE M. CUMMINGS, P.C.
ONE NORTH WACKER DRIVE
SUITE 4130
CHICAGO, IL 60606
EXAMINER
CHOI, WOO H
ART UNIT PAPER NUMBER
3992
MAIL DATE DELIVERY MODE
06/06/2012 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
____________

BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
____________

Ex parte MICROLINC,LLC1,
Appellant and Patent Owner
____________

Appeal 2011-010506
Reexamination Control No. 90/009,376
Patent 6,009,4882
Technology Center 3900
____________

Before SCOTT R. BOALICK, KEVIN F. TURNER, and
JONI Y. CHANG, Administrative Patent Judges.

TURNER, Administrative Patent Judge.

DECISION ON APPEAL
MicroLinc, LLC, Appellant, appeals under 35 U.S.C. §§ 134(b) and
306 from a final rejection of claims 13-18, 20-31, 33-35, and 37-53.3 We
have jurisdiction under 35 U.S.C. §§ 134(b) and 306.
We AFFIRM-IN-PART.

1 Microlinc, LLC is the Patent Owner and the real party in interest (App. Br.
5).
2 Issued December 28, 1999, to Gautam Kavipurapu.
3 The Examiner withdrew a rejection of claim 32 (Ans. 2).
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

2

STATEMENT OF THE CASE4
This proceeding arose from a request for ex parte reexamination filed
on behalf of Intel Corporation on December 23, 2008, of United States
Patent 6,009,488 (the '488 Patent), based on U.S. Patent Application
08/965,760, filed November 7, 1997. There were three prior reexaminations
of the instant patent, namely control nos. 90/008,106, 90/008,196, and
90/009,098, all filed by the instant requester, Intel Corporation (App. Br. 7).
The '488 Patent was asserted in Microlinc, LLC v. Intel Corp. et al.,
CA No. 2:07-cv-488 TJW (E.D. Tex. 2007), where that case was stayed
pending this reexamination (App. Br. 6).
We heard oral arguments from Patent Owner’s representative on
October 5, 2011, a transcript5 of which is part of the record.

CLAIMED INVENTION
Appellant’s invention relates to microprocessor based systems having
communications channels between functional components (col. 1, ll. 5-9).
With respect to the instant claims, the system employs a packet-based data
channel extending between interfaces for providing simultaneous bi-
directional communication therebetween (col. 3, ll. 2-9).

4 Our decision will make reference to the Appellant’s Appeal Brief (“App.
Br.,” filed February 8, 2011) and Reply Brief (“Reply Br.,” filed May 16,
2011), and the Examiner’s Answer (“Ans.,” mailed March 28, 2011).
5 Record of Oral Hearing (hereinafter Oral Hr’g Tr.)
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

3

Claims 13-18 and 20-53 are pending and subject to reexamination.
Claim 32, and claims 37-40 as dependent on claims 32 and 36 have been
confirmed (Ans. 2). Claims 13-18, 20-31, 33-35, and 37-53 have been
rejected and are appealed (Reply Br. 5).
We take independent claims 14 and 41 to be representative:
14. A physically non-distributed microprocessor-based
computer system comprising:
a microprocessor;
a random access memory device;
a mass storage device;
an input-output port device;
said devices each being operable in conjunction with
said microprocessor, and said microprocessor and said devices
including an interface for receiving and transmitting data in
packet form;
a packet-based data channel extending between said
microprocessor and said interfaces of said devices for
providing simultaneous bi-directional communication between
said microprocessor and said devices; and
a first of said interfaces including a first buffer for
queuing packets for a transmission, and a second buffer for
storing a copy of a packet transmitted by said first interface to
a second one of said interfaces, said second buffer storing said
copy pending receipt of a reply packet acknowledging receipt
of said transmitted packet by said second interface.

41. An interface system within a physically non-
distributed microprocessor-based computer system, having a
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

4

microprocessor, a random access memory device, a mass
storage device, and in input-output port device, wherein said
devices are operable in conjunction with said microprocessor,
comprising:
a first interface operable with said microprocessor for
receiving and transmitting data in packet form;
a second interface operable with said devices for
receiving and transmitting data in packet form;
a packet-based data channel extending between said first
interface and said second interface for providing simultaneous
bi-directional communication between the interfaces; and
said first interface including a first buffer for queuing
packets for transmission, and a second buffer for storing a copy
of a packet transmitted by said first buffer to said second
interface pending receipt of a reply packet acknowledging
receipt of said transmitted packet by said second interface.
(App. Br.; Claims App’x., amendment indications omitted)

REJECTIONS OVER ART & §§ 112, 305
The prior art references relied upon by the Examiner in rejecting the
claims are:
Tanaka 5,339,314 Aug. 16, 1994
Holzhammer 5,519,831 May 21, 1996
Carnevale 5,721,874 Feb. 24, 1998
Strand 5,991,824 Nov. 23, 1999
Yoshizawa 6,470,380 Oct. 22, 2002
S. Mohan et al., “Efficient Point-To-Point and Point-To-Multipoint
Selective-Repeat ARQ Schemes with Multiple Retransmissions: A
Throughput Analysis,” 17(5) SIGCOMM Comp. Comm. Rev. 49-57 (1988)
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

5

(“Mohan”).
IEEE STD 1596-1992, IEEE Standard For Scalable Coherent
Interface (SCI) (IEEE 1993) (“SCI 92”).
H. M. de Lima and O. C. M. B. Duarte, “An Effective Selective
Repeat ARQ Strategy for High Speed Point-To-Multipoint
Communications,” Global Telecom. Conf., 1996 1059-63 (1996) (“de
Lima”).
The Examiner maintained6 rejections of the claims on the following
bases:
 claims 14-17, 20-31, 34, 37-44, 47, and 50-53 under 35 U.S.C.
§ 103(a) as being unpatentable over Strand, SCI 92, and Mohan
and/or de Lima (Ans. 11-18);
 claims 13 and 20-25 under 35 U.S.C. § 103(a) as being unpatentable
over Strand, Yoshizawa, and Carnevale (Ans. 6-11);
 claims 18, 20, 22-25, 45, and 50-53 under 35 U.S.C. § 103(a) as being
unpatentable over Strand and Holzhammer (Ans. 18-20);
 claim 26 under 35 U.S.C. § 103(a) as being unpatentable over Strand,
Yoshizawa, Carnevale, SCI 92, and Tanaka (Ans. 23);
 claims 35, 37-40, 48, and 50-53 under 35 U.S.C. § 103(a) as being
unpatentable over Strand, SCI 92, Anderson and Mohan and/or de
Lima (Ans. 20-21);

6 The Examiner previously issued additional claim rejections under 35
U.S.C. §§ 103 & 112, second paragraph, which were withdrawn in the
Answer (Ans. 3).
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

6

 claims 33, 37, 39, 40, 46, 50, 52, and 53 under 35 U.S.C. § 103(a) as
being unpatentable over Strand and Tanaka (Ans. 21-23);
 claims 21, 38, and 52 under 35 U.S.C. § 103(a) as being unpatentable
over Strand, Tanaka, and SCI 92 (Ans. 23);
 claims 41-53 under 35 U.S.C. § 305 as improperly enlarging the scope
of the claims of the patent (Ans. 4); and
 claim 31 under 35 U.S.C. § 112, first paragraph, as lacking proper
written description (Ans. 5-6).
Appellant relies upon the following evidence in rebuttal to the
Examiner’s rejections:
 Declaration of Richard A. Belgard, dated November 11, 2009
(Evidence Appx., Exhibit A)(“Belgard Decl.”).
 Declaration of Richard A. Belgard, dated July 23, 2010 (Evidence
Appx., Exhibit B)(“Supp. Belgard Decl.”).
 Declaration of J. Scott Gardner, dated July 24, 2010 (Evidence Appx.,
Exhibit C)(“Gardner Decl.”).
 Excerpt of Deposition Transcript of Dr. Jeffery Draper, dated July 21,
2010 (Evidence Appx., Exhibit D).

ISSUES
Appellant has asserted numerous arguments as to whether the
Examiner erred in proffering the above-cited rejections, which we detail in
the analysis section below. We have considered in this decision only those
arguments that Appellant actually raised in the Briefs. Arguments which
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

7

Appellant could have made but chose not to make in the Briefs are deemed
to be waived. See 37 C.F.R. § 41.37(c)(1)(vii).
The issues arising from the respective positions of Appellant and the
Examiner, which we consider herein, are:
(i) Did the Examiner err in finding that Mohan and/or de Lima
would have been combined with Strand, SCI 92, or Anderson to reject
certain claims as being obvious?
(ii) Does the combination of Strand, Yoshizawa, and Carnevale
render claims 13 and 20-25 obvious?
(iii) Does the combination of Strand and Holzhammer render claims
18, 20-25, 32, 37-40, 45, and 50-53 obvious?
(iv) Does the combination of Strand, Yoshizawa, Carnevale,
SCI 92, and Tanaka render claim 26 obvious?
(v) Does the combination of Strand and Tanaka render claims 33,
37, 39, 40, 46, 50, 52, and 53 obvious?
(vi) Does the combination of Strand, Tanaka, and SCI 92 render
claims 21, 38, and 52 obvious?
(vii) Did the Examiner err in finding claims 41-53 to improperly
enlarge the scope of the claims of the patent?
(viii) Did the Examiner err in finding that claim 31 lacks proper
written description under 35 U.S.C. § 112, first paragraph?

Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

8

FINDINGS OF FACT
1. The '488 Patent is directed to microprocessor based systems having
communications channels between functional components (col. 1,
ll. 5-9).
2. The Specification of the '488 Patent discloses that the system
employs a packet-based data channel extending between interfaces
for providing simultaneous bi-directional communication between
those interfaces (col. 3, ll. 2-9).
3. The Specification of the '488 Patent explains that to extend the
capacity of the system to an arbitrary number of nodes, an
expanded interconnect may be used, where interconnects
employing a ring or a crossbar scheme are disclosed (col. 7, ll. 32-
63; Figs. 24, 25).
4. The Specification of the '488 Patent also discloses that the system
uses a line cache, where that line cache is a directed mapped cache
for caching response data for the functional unit (col. 8, ll. 63-64).
The system checks the line cache to see if data are ready to be
packetized and sent, where the configuration of the line cache may
be changed based on conditions (col. 9, ll. 4-18).
5. Strand discloses a system for simultaneous high bandwidth input
and output in a computer that uses a packet switch router to
implement a data pipeline between the computer elements (Abs.).
Strand discloses that those elements may be multiple types of
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

9

devices, which transfer data therebetween, independently of each
other using the packet switch router (col. 6, ll. 15-44).
6. Strand discloses that each of the devices has its own dedicated
transceiver for transmitting and receiving digital data (col. 11, ll.
40-67).
7. Mohan discloses methods for handling transmission errors in
computer networks through detection of errors and retransmission
of the erroneous messages. Mohan is concerned mostly with
satellite communications (p. 49, § I).
8. De Lima discloses methods of handling transmission errors
through the use of a point-to-multipoint selective repeat automatic-
repeat-request (ARQ) protocol (p. 1059, Abs., § 1).
9. Yoshizawa discloses a signal processing accelerator including a
plurality of processing units, with each processing unit having a
main cache and a link cache (col. 6, ll. 1-16).
10. Holtzhammer is directed to a non-volatile disk cache and discloses
that:
“a cache is an area or memory which serves as a
temporary storage area for the device (such as computer
memory or a disk drive). Frequently accessed data
resides [sic] in the cache after an initial access and a
[sic] subsequent accesses to the same data will be made
to the cache instead of the device.”
(col. 1, ll. 30-35).
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

10

11. Holtzhammer discloses the use of both volatile and non-volatile
memories, with each being formed through multiple blocks (col. 5,
l. 48 – col. 6, l. 28).
12. Tanaka discloses a packet data transmission unit having occupied,
idle, and released states, where an interface of a node transmits an
idle-type packet to the next node of the ring (col. 7, ll. 50-68).

PRINCIPLES OF LAW
“To render a later invention unpatentable for obviousness, the prior art
must enable a person of ordinary skill in the field to make and use the later
invention.” In re Kumar, 418 F.3d 1361, 1369 (Fed. Cir. 2005) (citing
Beckman Instruments, Inc., v. LKB Produkter AB, 892 F.2d 1547, 1551 (Fed.
Cir. 1989) and In re Payne, 606 F.2d 303, 314-15 (CCPA 1979)).
“Section 103 forbids issuance of a patent when ‘the differences
between the subject matter sought to be patented and the prior art are such
that the subject matter as a whole would have been obvious at the time the
invention was made to a person having ordinary skill in the art to which said
subject matter pertains.’” KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 406
(2007).
[I]t can be important to identify a reason that would have
prompted a person of ordinary skill in the relevant field to
combine the elements in the way the claimed new invention
does. This is so because inventions in most, if not all, instances
rely upon building blocks long since uncovered, and claimed
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

11

discoveries almost of necessity will be combinations of what, in
some sense, is already known.
Id. at 418.
Under 35 U.S.C. § 112, first paragraph, the written description
requirement is separate and distinct from the enablement requirement. Vas-
Cath, Inc. v.Mahurkar, 935 F.2d 1555, 1562 (Fed. Cir. 1991). The function
of the written description requirement is to ensure that the inventor had
possession of, as of the filing date of the application relied on, the specific
subject matter later claimed by him or her; how the specification
accomplishes this is not material. In re Herschler, 591 F.2d 693, 700-01
(CCPA 1979).

ANALYSIS
(i) Obviousness Over Strand, SCI 92, and Mohan and/or de Lima
Obviousness Over Strand, SCI 92, Anderson and Mohan and/or de
Lima
Independent Claims 14, 27-29, 31, 34, 35, 41, 47, and 48
Central to both of the above-cited obviousness rejections is the
combination of Mohan and/or de Lima with the other cited references.
Appellant argues that the Declarations of Mr. Belgard and Mr. Gardner have
been ignored by the Examiner (App. Br. 38), that their testimonies
demonstrate that Mohan and de Lima are non-analogous art, when compared
with the other cited references (App. Br. 43-50), and that persons of ordinary
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

12

skill in the art would not have been motivated to combine Mohan and de
Lima with the other cited references even if they had been aware of all of the
references (App. Br. 50-58). The Examiner asserts that the technical area to
be considered in making the rejection is use of two buffers for packet
transmission, taught by Mohan and de Lima, into systems, such as Strand
and SCI 92, which provide for a single buffer transmission (Ans. 25-27).
We agree with Appellant that the Examiner erred in making the rejections
applying Strand, SCI 92, Anderson, Mohan, and de Lima.
The rationale asserted by the Examiner for combining Mohan and de
Lima with the other references is that the combination would provide “for
easier management of packets to be transmitted and packets already
transmitted. With a separate retransmission queue, the new frame
transmission function becomes much simpler because it can just take the
first frame (or packet) in the queue without having to determine whether it is
a frame retained for retransmission.” (Ans. 15). However, Mr. Belgard’s
testimony makes clear that this is not a concern for the system of Strand
(Belgard Decl. ¶¶ 28-30), which would allow for transmission of multiple
packets without waiting for receipt of previously transmitted packets. Thus,
we find the rationale adopted by the Examiner to be lacking.
Additionally, the Examiner acknowledges that “[t]he only difference
between the Strand and SCI 92 combination and the claims is where a copy
of a transmitted packet is stored until the confirmation of its acceptance is
received” (Ans. 25-26). From this the Examiner deduces that two buffers
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

13

would be helpful and finds examples of such two buffer transmission
interfaces in Mohan and de Lima.
The Examiner appears to acknowledge that Mohan and de Lima are
directed to methods in satellite communication (Ans. 26), where we concur
(FF 7, 8). The Examiner also acknowledges that “the design constraints and
considerations for short and long distance communication systems are
different” (Ans. 26). The Examiner has no difficulty in making the
combination because the Examiner appears to consider all references related
to “a two buffer implementation” (id.), instead of considering the
backgrounds of the cited references. We find this consideration to have been
made in error.
While the two buffer teachings taken from Mohan and de Lima may
not be unique to satellite or long distance terrestrial communications
systems, those are the technical areas from which Mohan and de Lima arise.
We cannot divorce those teachings from their technical backgrounds and
must consider them in making a rejection under §103. Taking the teachings
in isolation from their disclosures would be clear error. We do not find the
Examiner’s stated rationale sufficient to indicate why one of ordinary skill in
the art would have ventured into the arena of long-range communications to
solve issues with short range communications between devices in a
computer system.
Additionally, while the Examiner may have considered the
testimonies of the declarants submitted, we find no persuasive evidence in
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

14

the record that any of the testimony averred therein was disputed to any
degree. Mr. Belgard’s testimony suggests that one of ordinary skill in the art
would not have looked to Mohan and de Lima to address aspects of Strand
and SCI 92 that were not deficient (Belgard Decl. ¶¶ 30-31). Mr. Gardner’s
testimony addresses the differences between non-physically distributed
computer systems and long distance communication systems (Gardner Decl.
¶¶ 23-24), speaks to the long latency periods involved in Mohan and de
Lima to explain their utilization of two buffers (Gardner Decl. ¶¶ 38-44).
Without rebuttal, the testimonies provide a rationale for why Mohan and de
Lima would not have been used by one of ordinary skill in the art to modify
Strand, SCI 92, and Anderson in any combination.
As such, we conclude that the Examiner erred in rejecting
independent claims 14, 27-29, 31, 34, 35, 41, 47, and 48 over combinations
of Strand, SCI 92, Anderson, Mohan, and de Lima. Similarly, we find that
the Examiner erred in rejecting dependent claims 15-17, 20-26, 37-40, 42-
44, and 50-53, as those claims depend on the above-cited independent
claims.

(ii) Obviousness Over Strand, Yoshizawa, and Carnevale
Independent Claim 13
Appellant argues that Yoshizawa teaches away from a combination
with Strand because such a combination would require merging the main
cache with the link cache (App. Br. 75, 78). The Examiner finds that
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

15

Appellant’s remarks, applicable to claim 18, are not similarly applicable to
claim 13 because the latter claim does not recite the same limitations (Ans.
30). As the Examiner points out (id.), the “line cache of claim 13 has no
defining characteristic other than being a direct mapped cache with variable
line size,” and that Yoshizawa clearly discloses a line cache. We agree, as
claim 13 merely recites a line cache and would not require the merger of
memories that Appellant alleges is taught away from by Yoshizawa. As
such, we do not find Appellant’s argument to be persuasive.
Appellant also argues that link cache recited in claim 13 is not
obvious in view of Carnevale (App. Br. 78-80). Appellant specifically
argues that claim 13 requires each of the enumerated devices to include a
direct mapped variable line size cache, that there is no reason for Yoshizawa
to have variable line sizes in its cache, and that Carnevale fails to disclose
the presence of a separate cache associated with each of the devices (App.
Br. 79). The Examiner finds that Appellant is attacking the cited references
individually, instead of the combination (Ans. 31). We agree with the
Examiner.
Carnevale need not disclose a separate cache associated with each
device, because Strand and Yoshizawa together provide for the same (FF 9),
which Appellant has not disputed. Appellant acknowledges that Carnevale
discloses “a multi-device (use) variable line-size cache wherein various
devices (users) can configure and access different sections of the cache”
(App. Br. 79). Appellant argues that there is no technical reason for
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

16

Yoshizawa to have variable line sizes (id.), but that is not test for
obviousness. The proper consideration is whether one of ordinary skill in
the art would have adopted the variable line sizes of Carnevale into the
device of Strand and Yoshizawa, which, as the Examiner finds (Ans. 30-31),
would have been obvious since they are performing the same function and
yielding no more than expected results from such an arrangement.
Appellant also argues that Carnevale only teaches a single cache that can be
used by different devices, each having a different fixed cache line size,
which does not the limitations of the claims (Reply Br. 38). However, as
discussed supra, Carnevale need not specifically teach the same if the
combination teaches or suggests it. As such, we do not find Appellant’s
arguments to be persuasive.
Appellant also cites Mr. Gardner’s Declaration in support of
Appellant’s contention the combination fails to teach or suggest all of the
elements of claim 13 (App. Br. 79-80). While Mr. Gardner testifies that the
control software of Carnevale would be too slow (Gardner Decl. ¶68), and
that “Carnevale is nothing like '488” (Gardner Decl. ¶69), these findings do
not address the subject matter of claim 13, which merely provides that the
“line cache being organized with a variable line size direct mapped cache.”
Carnevale demonstrates that the concept of a variable line size cache was
known at the time of invention and could have been implemented in a device
of the combination of Strand and Yoshizawa. Mr. Gardner’s assertions that
there would be no need to have variable sized caches because Yoshizawa’s
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

17

devices are identical and would not need to be changed (Gardner Decl. ¶71),
is also similarly unpersuasive in view of the multiple types of devices
disclosed in Strand (FF 5). As such, we do not find Appellant’s arguments
to be persuasive, and we do not find the Examiner erred in rejecting claim
13.

Dependent Claims 20-25
With respect to claim 21, Appellant makes specific arguments (App.
Br. 81), arguing that the interface integrated into a functional unit must be an
interface for receiving and transmitting data in packet form, which
Yoshizawa does not provide (App. Br. 81). However, as the Examiner
points out (Ans. 32), the rejection of claim 21 in this instance is based on its
dependence from claim 13, not claim 18, such that Appellant’s arguments
are not pertinent to the rejection of claim 21 (depending from13) over
Strand, Yoshizawa, and Carnevale. As such, we affirm the rejection of
claim 21.
With respect to the rejection of claims 20 and 22-25, Appellant argues
that arguments raised against the rejection of claim 13 apply equally against
the former claims by virtue of their dependence. We agree, but since we
find Appellant’s arguments against the rejection of claim 13 unpersuasive,
we affirm the rejection of claims 20 and 22-25 for the same reasons.

Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

18

(iii) Obviousness Over Strand and Holzhammer
Independent Claims 18 and 45
Appellant argues that Holtzhammer’s memory arrangement has
nothing to do with the link cache of claim 18 and does not store data
requested from anything (App. Br. 83). Appellant also argues that neither
Strand nor Holtzhammer discloses the first and second memory blocks
recited in claim 18 (App. Br. 83-84). The Examiner finds that the memory
cache in Holzhammer also stores data requested by the microprocessor for
read access (Ans. 32), and also finds that the cache memory of Holtzhammer
performs the same function disclosed for the line cache in the instant
Specification, i.e., checking the line cache to see if data are ready to be
packetized and sent (Ans. 33). The Examiner also finds that Holzhammer
discloses multiple blocks of memory in the volatile cache such that some
must contain the most recently requested data, with the other blocks storing
the balance of the data stored (Ans. 34). We agree with the Examiner.
We concur with the Examiner that the cache memory of Holtzhammer
provides the same function as disclosed for the line cache (FF 10, 4). We
find that the structure of Holtzhammer would have informed one of ordinary
skill in the art to employ a similar structure in the line cache of Strand. With
respect to the memory blocks, claim 18 recites, in part, “said line cache
comprising first and second memory blocks, said first memory block storing
a first portion of said stored data comprising the data most recently
requested, and said second memory block storing the balance of said stored
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

19

data,” with claim 45 reciting the same. We agree with the Examiner that
Holtzhammer discloses multiple blocks of memory (FF 11), and that storing
the most recently requested data in one portion would have been obvious.
Likewise, storing the remaining portion of the data in another portion would
naturally follow. As such, we are not persuaded by Appellant’s arguments.
Appellant also argues that “[e]ven if Holzhammer’s cache operates as
described by the Panel, no ‘data requested from another function unit’ is
[sic] ever stored on the non-volatile memory of Holtzhammer” (Reply Br.
39; see also App. Br. 83-84). The Examiner finds that the claims do not
require the line cache to request any data and that the ‘488 Patent does not
support such a reading of the claims (Ans. 33). We agree with the
Examiner. The limitation in claims 18 and 45 describes that the line cache
stores requested data, but that is an intended use for the cache. The line
cache does not request the data; rather the interfaces of the microprocessor
and other devices act to receive and transmit the data. Appellant does not
dispute that the elements of Strand can request and receive data (FF 6), such
that the combination of Strand and Holtzhammer would have a similar
functionality. As such, we do not find Appellant’s arguments to be
persuasive of error in the above-discussed rejection.

Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

20

(iv) Obviousness Over Strand, Yoshizawa, Carnevale, SCI 92, and
Tanaka
Dependent Claim 26
Appellant traverses the rejection of claim 26 because of the
dependence of that claim on claim 13, and the arguments addressed above
with respect to the rejections of that latter claim (App. Br. 84). As we do not
find those specific arguments to be persuasive, as discussed supra, we
likewise find no error in the rejection of claim 26 on that basis.
Appellant also argues that Strand and SCI 92 would not have been
combined by a person of ordinary skill in the art (App. Br. 63-64; Reply Br.
37). Appellant argues that “SGI’s decision to not adopt SCI 92 and to
develop an incompatible protocol is strong evidence that a person of
ordinary skill in the art would not have combined SCI 92 with Strand” (App.
Br. 64). Similarly, Gardner also avers that “[t]here were no technical
advantages in replacing Strand with SCI 92, while there were many business
disadvantages to giving up the proprietary architecture” (Gardner Decl. ¶49).
We do not agree.
As the Examiner finds (Ans. 28), the ‘488 Patent’s Specification
discloses both a ring topology and a crossbar interconnect topology as
alternative topologies that can be used to switch packets (FF 3). Appellant’s
acknowledgment of the topologies as alternatives cuts against their
arguments that a change in architecture would not have been obvious.
Similarly, the fact that scientists at Silicon Graphics did not implement a
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

21

known standard is not dispositive of unobviousness. As declarant Gardner
has testified (Gardner Decl. ¶49), there are other reasons for not adopting
such a standard that do not go to the obviousness of the combination when
view by ordinarily skilled artisans in the relevant period. Not giving up a
proprietary architecture might explain SGI’s rationale for not adopting, but
does not speak to other ordinarily skilled artisans who did not have the same
employer or constraints. As such, we agree with the Examiner (Ans. 14)
that it would have been obvious to have combined Strand and SCI 92 per the
strictures of the rejection. Thus, we find no error in the Examiner’s rejection
of claim 26.

(v) Obviousness Over Strand and Tanka
Independent Claims 33 and 46
Appellant argues that, in the context of the '488 Patent, idle packets
are addressed to specific functional units, that the idle-type packet of Tanaka
is not directed to a particular node, as required by claims 33 and 46 (App.
Br. 89; Reply Br. 41). The Examiner finds that Appellant’s argument does
not address the language of the claims (Ans. 36). We agree with the
Examiner.
Claim 33 recites, in part, “a first one of said interfaces transmitting an
idle-type packet over said packet-based data channel to another one of said
interfaces,” with claim 46 reciting a similar limitation. Appellant suggests
that the sending of an idle packet must be directed to a specific node, but the
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

22

claims do not recite such a requirement. Appellant’s argument that the idle
packet of claims 33 and 46 is “sent when the node is not presently
processing data, and can receive additional data” (App. Br. 89), also does
not comport with the claim language, as neither claim includes such
limitations. While Tanaka sends its idle packet to the next node on the ring
(FF 12), this meets the claim limitations as that next node on the ring would
be “another one of said interfaces,” per claim 33, or “said second interface,”
per claim 46.
Appellant also argues Tanaka’s system does not transmit data in
response to receipt of the idle-type packet (App. Br. 89-90). The Examiner
finds that Tanaka meets the claim limitations through a specific scenario
(Ans. 37), which Appellant disputes (Reply Br. 41-42). We agree with the
Examiner.
We note that claim 33 is directed to a computer system and claim 46
is directed to an interface system, such that they are claims drawn to
apparatuses and not methods. “Apparatus claims cover what a device is, not
what a device does.” Hewlett-Packard Co. V. Bausch & Lomb, Inc., 909
F.2d 1464, 1469 (Fed. Cir. 1990). Appellant has acknowledged that the
system in Tanaka performs this function in certain instances, but argues that
“it is mere happenstance” (Reply Br. 41). Regardless, Appellant’s
acknowledgement illustrates that Tanaka is capable of performing the
functionality recited in the claims, and we need not consider the arguments
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

23

further. Thus, we find no error in the Examiner’s rejection of claims 33 and
46.

Dependent Claims 37, 39, 40, 50, 52, and 53
Appellant addresses no arguments to these dependent claims, and thus
we find no error in their rejection, based on the discussion of the rejection of
independent claims 33 and 46 supra.

(vi) Obviousness Over Strand, Tanka, and SCI 92
Dependent Claims 21, 38, and 52
Appellant traverses the rejection of claims 21, 38, and 52, because of
the dependence of those claims on claims 18, 33, and 46, respectively, and
the arguments addressed above with respect to the rejection of those latter
claims (App. Br. 90). As we do not find those specific arguments to be
persuasive, as discussed supra, we likewise find no error in the rejection of
claims 21, 38, and 52.

(vii) Enlargement of Claim Scope Under 35 U.S.C. § 305
Claims 41-53
In rejecting claims 41-53, the Examiner finds three aspects of the
newly added claims which show enlargement of scope (Ans. 4). Appellant
argues that first two aspects represent no change in scope of the claims
(App. Br. 91-92), and also argues that the starting point for a comparison of
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

24

enlargement of claim scope should be made with respect to claims as
originally issued, and not from claims issued from an earlier Reexamination
Certificate (App. Br. 92-93).7 We need not reach this issue because
Appellant has not responded to the third aspect, as noted by the Examiner
(Ans. 37-38).
The broadest claim issued in the '488 Patent was claim 1, which
recited the limitation that the devices “includ[e] an interface for receiving
and transmitting data in packet form.” Claim 41, exemplar of the claims
rejected under 35 U.S.C. § 305, does not recite this limitation or some
similar limitation. Claim 41 does recite, in part, “a second interface operable
with said devices for receiving and transmitting data in packet form,” but
does not indicate that the second interface, nor the first interface, also
recited, are included in the recited devices. We do not find “including” and
“operable with” to necessarily have the same scope. As this comparison is
made with respect to the originally issued claim, Appellant’s question of
what claims to compare to becomes moot. Thus, we do not find that the
Examiner erred in rejecting claims 41-53 under 35 U.S.C. § 305.

7 But see Ex Parte Alpha Industries, Inc., 22 U.S.P.Q. 2d 1851 (BPAI 1992),
acknowledged by Appellant (App. Br. 93 n.16).
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

25

(viii) Written Description Under 35 U.S.C. § 112, First Paragraph
Claim 31
Appellant argues that claim 31 is fully supported by the Specification
(App. Br. 94), that prior reexamination proceedings had no issue with claim
31 (App. Br. 95), and that the rejection reads “incapable” into claim 31
(App. Br. 96). The Examiner finds that since claim 31 recites, in part, that
“upon receipt of said reply packet by said first one of said interfaces said
memory location is rendered capable of receiving new data,” the
Specification must disclose that “a memory location in a queue is ever made
incapable of receiving new data as required” (Ans. 38). The Examiner also
finds that a memory location in a queue may be made unavailable for storage
of new data, the location is still capable of being written to (Ans. 39). We
agree with Appellant.
As Appellant points out, Fig. 27 of the instant Specification discloses
that once an ECHO OKAY packet is received, a request is dequeued from
the ECHO WAITING QUEUE, which Appellant asserts would be
understood, by ordinarily skilled artisans, as freeing a memory location to
accept new data (App. Br. 95). We find that such a disclosure shows that the
inventors had possession of the concept of rendering a memory location
capable of receiving new data, per claim 31. We do not disagree with the
Examiner that “capable” has a broader meaning than “available” or
“unavailable” (Ans. 39), but rather we find that such a consideration would
go to whether the full scope of claim 31 is enabled by the Specification, and
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

26

not whether the claim lacks proper written description. We find that claim
31 has proper written description under 35 U.S.C. § 112, first paragraph, and
that the Examiner erred in rejecting the claim on that basis.

CONCLUSIONS
We conclude that: (i) the Examiner erred in finding that that Mohan
and/or de Lima would have been combined with Strand, SCI 92, or
Anderson to render claims 14-17, 20-31, 34, 35, 37-44, 47, 48, and 50-53
obvious; (ii) the combination of Strand, Yoshizawa, and Carnevale renders
claims 13 and 20-25 obvious; (iii) the combination of Strand and
Holzhammer renders claims 18, 20-25, 32, 37-40, 45, and 50-53 obvious;
(iv) the combination of Strand, Yoshizawa, Carnevale, SCI 92, and Tanaka
renders claim 26 obvious; (v) the combination of Strand and Tanaka renders
claims 33, 37, 39, 40, 46, 50, 52, and 53 obvious; (vi) the combination of
Strand, Tanaka, and SCI 92 renders claims 21, 38, and 52 obvious; (vii) the
Examiner did not err in finding that claims 41-53 as improperly enlarging
the scope of the claims of the patent; and (viii) the Examiner erred in finding
that claim 31 lacks proper written description under 35 U.S.C. § 112, first
paragraph.

DECISION
For certain rejections, we affirm the Examiner’s decision to reject
independent claims 13, 18, 33, 41, and 45-49, and claims 20-26, 37-40, 42-
Appeal 2011-010506
Reexamination Control No. 90/009,376
United States Patent 6,009,488

27

44, and 50-53 as dependent on those independent claims, and we reverse, as
to certain rejections, the Examiner’s decision to reject independent claims
14, 27-29, 31, 34, and 35, and claims 15-17, 20-26, 30, and 37-40, as
dependent on those independent claims. In summary, we find that claims
14-17 and 27-31 are patentable over the prior art of record.

AFFIRMED-IN PART

ack

cc:

FOR PATENT OWNER:
LAW OFFICES OF EUGENE M. CUMMINGS, P.C.
ONE NORTH WACKER DRIVE
SUITE 4130
CHICAGO, IL 60606

FOR THE THIRD PARTY REQUESTOR:
GOLDBERG, RICHARD
WILMER CUTLER PICKERING HALE AND DORR LLP
60 STATE STREET
BOSTON MA 02109